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| Number | Title | Issue Date |
| 8166215 | Method to control delay between lanes Method and apparatus to control delay between lanes in an I/O interface is disclosed. To control the delay between the lanes in the I/O system a programmed delay may be determined and introduced between the lanes. For this purpose the effective time âTâ of the l... | 04/24/2012 |
| 8166216 | Floating frame timing circuits for network devices A networking device includes a network port configured to receive a message from a remote networking device. The network port includes a detector configured to detect reception of the message. A queue controller is configured to integrate a timestamp with the messag... | 04/24/2012 |
| 8145809 | Busy detection logic for asynchronous communication port An embodiment of the present invention is directed to a system for synchronizing independent time domain information. The synchronization of the device resource access information allows a memory access device to reliably access memory in a time domain independent o... | 03/27/2012 |
| 8078773 | Optimized transmission of signals between a disk drive controller and a motor controller using a serial port Herein described are at least a method and a system for prioritizing the transmission of one or more types of signals through a serial port. Various aspects of the present invention may be implemented using a serial port interface module that facilitates communicati... | 12/13/2011 |
| 8069285 | Methods and systems for improving communication throughput of storage links Methods and systems for improving communication throughput of a link between SAS/SATA devices. The link, initially established at a first signal rate, is one of a SATA link and a SAS link. A SAS/SATA device increments one of the at least one counter based on an erro... | 11/29/2011 |
| 8055821 | Apparatus, system, and method for converting a synchronous interface into an asynchronous interface An apparatus, system, and method are disclosed for converting a synchronous interface into an asynchronous interface. The apparatus includes a receive module, a generate module, and a return module. The receive module receives a request for a transaction from a sync... | 11/08/2011 |
| 8041858 | Method of clock distribution for operating an automation system A method of operating an automation system with a plurality of automation devices connected for communication with a central unit is provided. Each automation device handles communication in accordance with a send clock. The central unit stores for each automation d... | 10/18/2011 |
| 8001298 | Providing extended measurement data in an I/O processing system An article of manufacture, an apparatus, and a method for providing extended measurement word data from a control unit to a channel subsystem of an I/O processing system are disclosed. The article of manufacture includes at least one computer usable medium having co... | 08/16/2011 |
| 7984213 | Control device for a USB interface and control method thereof A control device for a USB interface including at least one first terminal for inputting the data to be transmitted and at least one second terminal for the transmission of the packet data on a bus; the packet data include one end-of-packet signal. The USB interface... | 07/19/2011 |
| 7930452 | Parallel link electrical and timing parameter specification for output driver and input receiver that selects bandwidth or frequency based on timing parameters In one embodiment, an apparatus includes a driver and a receiver. The driver has an output, wherein the output of the driver has an associated output termination. In addition, the receiver has an input, wherein the input of the receiver has an associated input termi... | 04/19/2011 |
| 7890676 | Memory systems for automated computing machinery Memory systems are disclosed that include a memory controller; an outbound link, the memory controller connected to the outbound link, the outbound link comprising a number of conductive pathways that conduct memory signals from the memory controller to memory buffe... | 02/15/2011 |
| 7814244 | Calculating apparatus having a plurality of stages A calculating apparatus, or system, having a plurality of stages, such as in a pipeline arrangement, has the clocking rail or conductor positioned alongside the stages. With a large number, i.e., hundreds, of stages arranged in parallel sub-arrays, the clocking cond... | 10/12/2010 |
| 7769927 | Apparatus, system, and method for acceleration initiated association An apparatus, system, and method are disclosed for acceleration initiated association. A peripheral knock module receives a first knock command from a first accelerometer of a peripheral device. The first knock command comprises a plurality of peripheral time stamps... | 08/03/2010 |
| 7747795 | Method and system for rate adaptation A media access controller to adapt a rate of an output signal to a rate of an output medium is provided. The media access controller includes a register configured to output data to an external device, said register comprising a first input configured to control an ... | 06/29/2010 |
| 7743186 | Serialization of data for communication with different-protocol slave in multi-chip bus implementation Bus communication for components of a system on a chip. In one aspect of the invention, a system including bus communication to a slave includes a bridge operative to interface a first bus protocol to a bus matrix that uses a second bus protocol. A first serializer ... | 06/22/2010 |
| 7734848 | System and method for frequency offset testing Described is a system and method for frequency offset testing. The system comprises an electronic device, a first testing device providing a reference clock signal at a first frequency to the electronic device, and a second testing device receiving data from the ele... | 06/08/2010 |
| 7694045 | Methods and apparatus for pipeline processing of encryption data A calculating apparatus, or system, having a plurality of stages, such as in a pipeline arrangement, has the clocking rail or conductor positioned alongside the stages. With a large number, i.e., hundreds, of stages arranged in parallel sub-arrays, the clocking cond... | 04/06/2010 |
| 7689743 | Data copy system apparatus and method An apparatus, system, and method are disclosed for copying data. The present invention includes a data storage subsystem that supports fast replication and a host system that communicates a fast replication request to the data storage subsystem, estimates an expecte... | 03/30/2010 |
| 7676611 | Method and system for processing out of orders frames A method and system for processing out of order frames received by a host bus adapter is provided. The method includes, determining if a current frame is out of order; determining if a frame is within a range of transfer for an Exchange; and creating (or appending i... | 03/09/2010 |
| 7624209 | Method of and circuit for enabling variable latency data transfers A method of enabling variable latency data transfers in an electronic device, such as an FPGA with an embedded processor, is described. According to one aspect of the invention, a method comprises steps of providing an address for a data transfer between a memory co... | 11/24/2009 |
| 7606952 | Method for operating serial flash memory A transmission method for a serial periphery interface (SPI) serial flash includes the steps of providing a first system clock signal and transmitting a plurality of data strings with each two bits of the data strings transmitted in a period of the first system cloc... | 10/20/2009 |
| 7587533 | Digital programming interface between a baseband processor and an integrated radio-frequency module A circuit receives a clock signal, a data word which is emitted from a control device and has information about a read or write access to the circuit, and an enable signal which is at a predetermined value during the transmission of the data word. A determination un... | 09/08/2009 |
| 7552255 | Dynamically partitioning pipeline resources In one embodiment of the present invention, a method includes invalidating an entry of a filter coupled to a pipeline resource if an update to the entry occurs during a first context; and flushing a portion of the pipeline resource corresponding to an address space ... | 06/23/2009 |
| 7552254 | Associating address space identifiers with active contexts In one embodiment of the present invention, an apparatus includes a pipeline resource having different address spaces each corresponding to a different address space identifier. Each address space may have entries that include data values associated with the address... | 06/23/2009 |
| 7548998 | Modifying host input/output (I/O) activity to allow a storage drive to which I/O activity is directed to access requested information Provided are a method, system, and article of manufacture to process communications between a host and storage drive having a storage media. An Input/Output (I/O) request is received from the host directed to the storage media that requires requested information be ... | 06/16/2009 |
| 7536489 | Information processing system for determining payload size based on packet-to-payload size ratio An information processing system includes a high-speed serial bus that transmits and receives data independently over communication channels via a tree-structured network including a point-to-point connection, and a control unit that issues a request command based o... | 05/19/2009 |
| 7512725 | Generating a data stream from cartridge controllers using a plurality of measurement cartridges System and method for controlling cartridges to perform industrial operation(s). The system may include cartridge controllers coupled to the cartridges, timing and data routing logic coupled to the cartridge controllers, and controlling software coupled to the timin... | 03/31/2009 |
| 7509445 | Adapting a plurality of measurement cartridges using cartridge controllers System and method for controlling cartridges to perform industrial operation(s). The system may include cartridge controllers coupled to the cartridges, timing and data routing logic coupled to the cartridge controllers, and controlling software coupled to the timin... | 03/24/2009 |
| 7500031 | Ring-based cache coherent bus Managing data traffic among three or more bus agents configured in a topological ring includes numbering each bus agent sequentially and injecting messages that include a binary polarity value from the bus agents into the ring in a sequential order according to the ... | 03/03/2009 |
| 7461186 | Data handover unit for transferring data between different clock domains by parallelly reading out data bits from a plurality of storage elements The invention provides a data handover unit for transferring data from a furst clock domain to a second clock domain, comprising: a first clock unit operable to supply a first clock signal; a selector stage operable to sample an incoming data stream with respect to ... | 12/02/2008 |
| 7454539 | Method for transferring variable isochronous data and apparatus therefore A method for transferring variable isochronous data and an apparatus therefor are provided. The method for transferring variable isochronous data includes the steps of (a) determining isochronous transfer to be terminated when the bus is in an idle state for a time ... | 11/18/2008 |
| 7421692 | Real time control system A real-time control system for executing exactly a cyclic task, preventing a delay of the processing start time due to accumulation of a plurality of overhead times, thereby executing control enabling a more detailed response and control enabling a quick and reliabl... | 09/02/2008 |
| 7409471 | Data transfer control device for data transfer over a bus, electronic equipment and method for data transfer over a bus When a first mode (with-SOF mode) has been set, data transfer is performed while SOF packets are transferred at frame periods, and when a second mode (non-SOF mode) has been set and also non-periodic (bulk) transfer is being performed, the periodic transfer of SOF p... | 08/05/2008 |
| 7406546 | Long-distance synchronous bus One embodiment of a long-distance synchronous bus includes a sending unit and a receiving unit. The sending unit and receiving unit are configured to use credit-based handshaking signals to regulate data flow between themselves. The receiving unit includes a skid bu... | 07/29/2008 |
| 7404017 | Method for managing data flow through a processing system A method, apparatus and program storage device for managing dataflow through a processing system is disclosed. A buffer monitor maintains and monitors a buffer full threshold to control the write throughput to a data bus. ... | 07/22/2008 |
| 7401126 | Transaction switch and network interface adapter incorporating same A transaction switch and integrated circuit incorporating said for switching data through a shared memory between a plurality of data interfaces that support different data protocols, namely packetized interfaces like InfiniBand and addressed data interfaces like PC... | 07/15/2008 |
| 7392417 | Device for exchanging data signals between two clock domains A device for transferring data signals between a first clock domain and a second clock domain comprises a serial memory element and a parallel memory element which are coupled. The serial memory element comprises at least one extra memory position more than the para... | 06/24/2008 |
| 7383363 | Method and apparatus for interval DMA transfer access A method for intervaled memory transfer access provides periodic authorization signals to a memory access controller. The method cycles between: 1) inhibiting the memory access controller from writing data to a memory until the memory access controller receives a pe... | 06/03/2008 |
| 7382475 | Printer, information processing apparatus, and control method of interface When it is detected that a USB cable has been connected, a status of a function is discriminated. If there is no problem even if a USB enumeration is started, a USB signal is pulled up and the enumeration is started. If it is determined that trouble occurs as a func... | 06/03/2008 |
| 7380147 | Computer device employing a sliding window to set an idle mode timeout interval A computer device is disclosed comprising at least one component operable to process commands at command intervals, and control circuitry operable to set an idle mode timeout interval. The control circuitry stores a plurality of the command intervals, and then evalu... | 05/27/2008 |
