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President Rutherford B. Hayes ; Said in 1876, after Alexander Graham Bell demonstrated the telephone to him at the White House
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| Number | Title | Issue Date |
| 8122167 | Polling in a virtualized information handling system A software thread is dispatched for causing the system to poll a device for determining whether a condition has occurred. Subsequently, the software thread is undispatched and, in response thereto, an interrupt is enabled on the device, so that the device is enabled... | 02/21/2012 |
| 7613851 | Apparatus, method, and product of manufacture for transforming supply chain networks using pair-wise nodal analysis Techniques for reconstructing networks are provided. In one aspect, a method for reconstructing a synthetic network, such as a synthetic biological network, is provided. In another aspect, a method for reconstructing a supply chain network is provided. Exemplary sup... | 11/03/2009 |
| 7426589 | Network interface card for reducing the number of interrupts and method of generating interrupts A method of generating interrupts and a network interface card, which minimizes the number of times that interrupts are generated, are provided. The method includes receiving data frames; estimating a first and second time delay and counting a number of received dat... | 09/16/2008 |
| 7379418 | Method for ensuring system serialization (quiesce) in a multi-processor environment A method of ensuring system serialization in a multiprocessor multi-nodal environment is used to force all processors in a multiprocessor environment to temporarily suspend operations while one processor changes the system state. Architected designs where latencies ... | 05/27/2008 |
| 7356630 | Processor control device for stopping processor operation A processor control device includes a processor executing an instruction, a module coupled to the processor through a bus and processing independently from the processor, the module is provided in a plural number and a polling processing unit coupled to each module,... | 04/08/2008 |
| 7318113 | System and method communication system for reading or writing data to register between external card connection device and host device This invention is an information processing device such as a computer, as a host device, and a memory card as an external connection device to be connected to the host device. A memory card (1) and a host device (2) are connected with each other in acc... | 01/08/2008 |
| 7302690 | Method and apparatus for transparently sharing an exception vector between firmware and an operating system A method, apparatus and computer instructions for handling exception vectors by firmware. An exception vector is identified to form an identified exception vector when control is passed from an operating system to the firmware. The identified exception vector is sav... | 11/27/2007 |
| 7299464 | System and method for transferring data between virtual machines or other computer entities A method for communication between first and second computer programs having a shared memory. The first computer program has a first work dispatcher for a first work queue. The second computer program has a second work dispatcher for a second work queue. Without cau... | 11/20/2007 |
| 7281074 | Method and apparatus to quiesce USB activities using interrupt descriptor caching and asynchronous notifications In one embodiment, a data processing system includes, but is not limited to, a processor, a memory coupled to the processor, and a universal serial bus (USB) controller coupled to the processor and the memory. The USB controller includes a local memory to cache at l... | 10/09/2007 |
| 7263564 | Inquiring apparatus and method thereof An inquiring apparatus and method thereof is provided for assisting the CPU to inquire the state of the peripheral device. When the CPU needs to perform an inquiring process to wait for a peripheral device to come to an expected state, an inquiring apparatus is acti... | 08/28/2007 |
| 7181607 | Storage control apparatus In response to requests for I/O processing sent from a computer, I/O which should be processed at a priority is enabled to be processed without being affected by other processing, by classifying I/O into those to be processed at a priority and those not to be proces... | 02/20/2007 |
| 7124218 | System and method for providing character interactive input/output A system and method for supporting character interactive input/output operation in a half-duplex block-mode environment including a workstation and a server. Keystrokes at the workstation received into an auto enter, non-display entity on the workstation display are... | 10/17/2006 |
| 7051128 | System and method for data bus communication system between external card connection device and host device This invention is an information processing device such as a computer, as a host device, and a memory card as an external connection device to be connected to the host device. A memory card (1) and a host device (2) are connected with each other in acc... | 05/23/2006 |
| 6983337 | Method, system, and program for handling device interrupts Provided are a method, system, and program implemented by a device driver executing in a computer for handling interrupts from an associated device, wherein the device driver is capable of interfacing with the associated device. The device driver receives a call req... | 01/03/2006 |
| 6981081 | Method for SMI arbitration timeliness in a cooperative SMI/driver use mechanism A Bus Driver implements an arbitration mechanism to allow both the system management interrupt (SMI) and the Bus Driver to cooperatively use a Bus host controller hardware. This mechanism employs a hardware-based semaphore (status bit) to allow either the SMI or the... | 12/27/2005 |
| 6976158 | Repeat instruction with interrupt A processor for processing an interruptible repeat instruction is provided. The repeat instruction may include an immediate operand specifying a loop count value corresponding to the number of times that the loop is to be repeated. Alternatively, the repeat instruct... | 12/13/2005 |
| 6968411 | Interrupt processing apparatus, system, and method An interrupt processing apparatus, system, and article including a machine-accessible medium, along with a method of processing interrupts, implement interrupt processing in an efficient, parallel manner that reduces average interrupt latency. In one embodiment, the... | 11/22/2005 |
| 6963934 | Hibernation of computer systems An improved hibernation method and system, including the use of a modified DMA (Direct Memory Access) mode of transferring data to and from the disk. The use of DMA increases data transfer speed, while freeing the system processor to perform other tasks, including c... | 11/08/2005 |
| 6912607 | Method and apparatus for ascertaining the status of multiple devices simultaneously over a data bus Techniques are provided for simultaneously ascertaining the status of a plurality of devices coupled to a data bus. A master device transmits at least one status request message over the data bus to a plurality of slave devices. In response, the plurality of slave d... | 06/28/2005 |
| 6883037 | Fast data decoder that operates with reduced output buffer bounds checking Described is an improved decoder that reduces the number of bounds checks needed for typical compressed data by first guaranteeing that there is sufficient room to decode small symbol substrings and literal symbols, whereby bounds checking need not be performed on e... | 04/19/2005 |
| 6859851 | Buffer pre-loading for memory service interruptions Methods and apparatus control the loading of a memory buffer. The memory buffer may have a watermark with a first watermark value and can receive an advance indication of a memory service interruption. Based at least in part on the received advance indication of the... | 02/22/2005 |
| 6804725 | IC with state machine controlled linking module A TAP linking module provides for control and access of plural TAPs on an IC through one set of JTAG signal pins. The IC includes plural circuit modules, each with its own TAP, and boundary scan registers connected to an additional TAP. All the TAPs and the linking ... | 10/12/2004 |
| 6792483 | I/O generation responsive to a workload heuristics algorithm An apparatus, method and program product for use with a data processing system having a processor handling an I/O request in an I/O operation, main storage controlled by said processor for storing data, one or more I/O devices for sending data to or receiving data f... | 09/14/2004 |
| 6757750 | Method of dynamically selecting a physical layer A method for dynamically selecting a physical layer. When different physical layers are required to be selected to meet different transmission speeds, the method of the invention can dynamically select a physical layer without rebooting a computer. An interrupt serv... | 06/29/2004 |
| 6754738 | Low overhead I/O interrupt An apparatus, method and program product for sending data to or receiving data from one or more I/O devices in an I/O operation with a main storage controlled by a processor in a data processing system. The apparatus includes a time-of-day (TOD) register for contain... | 06/22/2004 |
| 6718412 | Apparatus and method for universal serial bus communications An apparatus and method for communicating between a controller and a message processing device over a universal serial bus (USB). The apparatus may comprise an interface having a bulk data-out endpoint for receiving a data-out packet from the controller that request... | 04/06/2004 |
| 6636929 | USB virtual devices A management sub-system connects via a USB bus to a server or computer being managed. The management sub-system also couples to a management console, which has a number of conventional peripherals, including CD-ROM, floppy drive, hard disk, keyboard, mous... | 10/21/2003 |
| 6581168 | Method and apparatus for automatic receive verification A method and apparatus for automatically verifying whether a network interface is receiving frame data properly. A network interface and a received data checker receive frame data from a network media such as a network or a network model. The network inte... | 06/17/2003 |
| 6553434 | Pseudo master/slave decoupling of high speed bus communications timing A system and method of decoupling timing in a high speed bus system. A master/slave translator is coupled between a master device and a slave device. A pseudo slave of the master/slave translator responds to the master in a first timing protocol. A pseudo... | 04/22/2003 |
| 6466998 | Interrupt routing mechanism for routing interrupts from peripheral bus to interrupt controller An interrupt routing mechanism implemented in a host chipset to eliminate the need for the general purpose I/O pins, special software and external logic devices to steer particular interrupts from a non-legacy Peripheral Component Interconnect (PCI) bus t... | 10/15/2002 |
| 6434630 | Host adapter for combining I/O completion reports and method of using the same An input/output (I/O) controller in an I/O system processes I/O requests from a host computer to a plurality of I/O devices. The I/O controller generates an interrupt to the host computer and reports a plurality of completed I/O requests from the I/O devi... | 08/13/2002 |
| 6434708 | Programmable timer & methods for scheduling time slices executed by a controller circuit A programmable timer is disclosed for use in conjunction with a microcontroller circuit. The timer is used as part of a time slice arbiter in a real time operating system, which arbiter manages device routines by allocating them to distinct code time slic... | 08/13/2002 |
| 6397272 | Interruption processing circuit for receiving and storing data associated with an event An object of the present invention is to provide an interruption processing circuit which can send out an interruption information correctly to a data processor even when timing of occurrence of an interruption event is overlapped with that of its reading... | 05/28/2002 |
| 6397243 | Method and device for processing several technical applications each provided with its particular security Method of processing several computer-controlled technical applications. The applications are executed within the same computer working in successive work cycles by allotting thereto during the work cycles at least one time slot of a previously fixed dura... | 05/28/2002 |
| 6275879 | ATA compatible adapter having a shadow register configured to intercept device select information and an automatic interrupt polling for overlapped ATA commands A method without the Host systems intervention to automatically select Devices on an ATA Cable and determine if they require to be serviced. Upon detection to the indicate to the Host that service is required. This method greatly reduces the Host system's... | 08/14/2001 |
| 6243785 | Hardware assisted polling for software drivers A method and system for programmably controlling hardware generation of interrupts by a peripheral component. In one embodiment, the present invention uses a peripheral component driver to programmably define a duration for a time cycle of a hardware time... | 06/05/2001 |
| 6173343 | Data processing system and method with central processing unit-determined peripheral device service Data processing apparatus is described comprising a processor and at least one peripheral device. The processor is arranged to service the peripheral device either in an interrupt mode in which the peripheral device is serviced in response to interrupt si... | 01/09/2001 |
| 6148360 | Nonvolatile writeable memory with program suspend command A method and apparatus suspend a program operation in a nonvolatile writeable memory. The nonvolatile writeable memory includes a memory array, a command register and memory array control circuitry. The command register decodes a program suspend command a... | 11/14/2000 |
| 6125410 | D.M.A. controller that determines whether the mode of operation as either interrupt or D.M.A. via single control line The invention discloses a communication system for exchanging data between a bus and at least one coupled data processing arrangement via a serial interface which is coupled to a microprocessor by a control line via a DMA unit. For effecting an efficient ... | 09/26/2000 |
| 6112224 | Patient monitoring station using a single interrupt resource to support multiple measurement devices A patient monitoring system for use in a telemedicine system that allows multiple medical devices to communicate with a control unit via an interface that uses a single interrupt. In architecture, the system can be implemented in hardware, or a combinatio... | 08/29/2000 |
