"To place a man in a multi-stage rocket and project him into the controlling gravitational field of the moon where the passengers can make scientific observations, perhaps land alive, and then return to earth--all that constitutes a wild dream worthy of Jules Verne. I am bold enough to say that such a man-made voyage will never occur regardless of all future advances."
Lee deForest, American radio pioneer ; 1957
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| Number | Title | Issue Date |
| 8176222 | Early termination of an I/O operation in an I/O processing system A computer program product, apparatus, and method for handling early termination of an I/O operation at a channel subsystem in an I/O processing system are provided. The computer program product includes a tangible storage medium readable by a processing circuit and... | 05/08/2012 |
| 7958279 | Asynchronous serial data apparatus for transferring data between one transmitter and a plurality of shift registers, avoiding skew during transmission A semiconductor integrated circuit apparatus, comprising a data transmitter circuit, and a plurality of data receiver circuits each having a data converter circuit which restores each of bits of identification number data and transfer data from a shift register of t... | 06/07/2011 |
| 7912998 | DMA access systems and methods Methods and systems for performing direct memory access (DMA) transfers are described. An invalidate queue (or other storage device) contains an entry associated with a DMA transfer in progress. If the invalidate queue detects an invalidation of a memory page associ... | 03/22/2011 |
| 7844755 | Image forming apparatus, image processing device, control device, and connection device A disclosed image forming apparatus includes an image processing device including plural image processing units; a control device configured to control the plural image processing units; and a connection unit configured to connect the image processing device to the ... | 11/30/2010 |
| 7752351 | Media protection notification for serial interface mass storage devices One embodiment of the present invention sets forth a technique for reducing the latency associated with media protection notification for serial interface mass storage devices, such as serial AT attachment (SATA) hard disk drives. A new link layer primitive, referre... | 07/06/2010 |
| 7707327 | Information processing apparatus, an integrated circuit, a data transfer controlling method, a data transfer controlling program, a program storage medium, a program transmission medium and a data storage medium A media utilization administering device reads a medium ID saved in a memory card, obtains last update time information indicating the respective times during a data transfer at specified time intervals, and stores state information including the medium ID and the l... | 04/27/2010 |
| 7613849 | Integrated circuit and method for transaction abortion An integrated circuit includes processing modules and an interconnect device for coupling the processing modules and for enabling a device-level communication based on transactions between the processing modules. A first processing module issues a transaction toward... | 11/03/2009 |
| 7437511 | Secondary level cache for storage area networks For use in a storage area network (SAN), a virtualization layer including at least one virtual engine having a respective local cache and a secondary cache layer, wherein the secondary cache layer includes the local caches coupled together, the local caches individu... | 10/14/2008 |
| 7426583 | Method and circuit for decoding an address of an address space Decoding an address in an address space including a plurality of local ranges and a plurality of peripheral ranges is described. Various approaches for decoding an input address include determining decoder address bits of the address space that distinguish local ran... | 09/16/2008 |
| 7409470 | Determining configuration data in connection with dynamic RDF Dynamically creating a communication path between first and second storage devices, includes creating a connection to a source volume on the first storage device and indicating that the source volume is not ready to transmit data on the communication path, after suc... | 08/05/2008 |
| 7389469 | Bus systems, apparatuses, and methods of operating a bus Data transmission between transmitting/receiving nodes in a bus system may be controlled based on an error check of received data. When an error in the received data is detected, the transmitting node may cease data transmission, and other nodes, which may not have ... | 06/17/2008 |
| 7383365 | Method and system for PCI express audiovisual output Audio and visual information processing components are co-located on a PCI Express graphics card by communicating audio and visual information received through the PCI Express interface of the graphics card to a PCI Express switch which switches audio information to... | 06/03/2008 |
| RE40261 | Apparatus and method of partially transferring data through bus and bus master control device A method of transferring data through a bus includes the steps of: occupying the bus by a first device serving as a bus master; transferring a first predetermined number of data items of all data items to be transferred while the first device is occupying the bus; d... | 04/22/2008 |
| 7356625 | Moving, resizing, and memory management for producer-consumer queues by consuming and storing any queue entries from an old queue before entries from a new queue Systems, methods, and software products for moving and/or resizing a producer-consumer queue in memory without stopping all activity is provided so that no data is lost or accidentally duplicated during the move. There is a software consumer and a hardware producer,... | 04/08/2008 |
| 7349437 | System and method for hardware based reassembly of a fragmented packet A system and method for hardware based reassembly of a fragmented packet is shown. The method includes receiving a bandwidth request to transfer a data packet from the data provider. Then, bandwidth is allocated to the data provider, where the allocated bandwidth is... | 03/25/2008 |
| 7343445 | Non-volatile memory card and transfer interruption means A memory card is provided with a transfer control circuit, a write control circuit and a judging circuit. The transfer control circuit outputs a transfer flag signal during the data transfer. The write control circuit outputs an internal busy signal during the data ... | 03/11/2008 |
| 7310695 | Port adapter for high-bandwidth bus A port adapter for connecting zero or more network interfaces to a host system having a SPI-4 bus is disclosed. The port adapter comprises zero or more network interfaces; a SPI-4 bus coupled to a host system to provide a communication channel between the host and t... | 12/18/2007 |
| 7305502 | Compressing an amount of uncompressed data less than amount of hibernation related data written to storage via DMA controller when requested write is pending An improved hibernation method and system, including the use of a modified DMA (Direct Memory Access) mode of transferring data to and from the disk. The use of DMA increases data transfer speed, while freeing the system processor to perform other tasks, including c... | 12/04/2007 |
| 7248838 | Wireless communication system within a system on a chip A communication system for transmitting data between cores embedded in an integrated circuit on a silicon chip. Communication system includes transmitter circuitry for wirelessly transmitting data between cores and receiver circuitry for wirelessly receiving the tra... | 07/24/2007 |
| 7228366 | Method and apparatus for deterministic removal and reclamation of work items from an expansion bus schedule A method and apparatus for deterministic removal and reclamation of work items from an expansion bus schedule are disclosed herein. A work item is removed from an enabled expansion bus schedule data structure and a coherency signal is then generated utilizing an exp... | 06/05/2007 |
| 7219170 | Burst transfer register arrangement Machine-readable media, methods, and apparatus are described to burst write a command and its arguments to control registers of a device and to burst read status and outputs of the command from control registers of the device. During the burst write, the arguments m... | 05/15/2007 |
| 7209711 | Dynamic channel quality measurement procedures for optimizing data transmission in a wireless digital communication system Data transmission is optimized in a wireless digital communication system including a base station and a plurality of user equipment mobile terminals (UEs). Adaptive modulation and coding (AM&C) is employed to achieve improved radio resource utilization and provide ... | 04/24/2007 |
| 7200735 | High-performance hybrid processor with configurable execution units A new general method for building hybrid processors achieves higher performance in applications by allowing more powerful, tightly-coupled instruction set extensions to be implemented in reconfigurable logic. New instructions set configurations can be discovered and... | 04/03/2007 |
| 7191259 | Method and apparatus for fast integer within-range compare A fast with-in range comparator is implemented in digital logic. A packet arrives at a device for processing. Initial packet data that is available in a first read cycle, is used to compute data that is necessary for later cycles. The initial data and the subsequent... | 03/13/2007 |
| 7164966 | Intelligent volumetric module for drink dispenser An intelligent volumetric module for use in metering pressurized syrup to a drink dispenser machine comprises a solenoid driven metering system for controlling liquid flows from a pressurized syrup container and a controller for controlling operation of said solenoi... | 01/16/2007 |
| 7146437 | Hot unpluggable media storage device Improved techniques for rendering a peripheral device removable (e.g., unpluggable) are disclosed. According to one aspect of the invention, the peripheral device is rendered removable from a host computer without preparatory user actions. In effect, the peripheral ... | 12/05/2006 |
| 7136910 | Information device, information device system control method, and information device system A device including a self-information memory which stores function data for other devices to operate the device and device name data. Upon receiving a request from another device for the device name or function data, the device sends the data stored in the self-info... | 11/14/2006 |
| 7133961 | Non-volatile memory card and transfer interruption means A memory card is provided with a transfer control circuit, a write control circuit and a judging circuit. The transfer control circuit outputs a transfer flag signal during the data transfer. The write control circuit outputs an internal busy signal during the data ... | 11/07/2006 |
| 7114016 | Page-aware descriptor management A method and apparatus to provide network buffer descriptors grouped by memory page into page groups and access a list of the page groups to manage the allocation and de-allocation of the network buffers descriptors is presented. ... | 09/26/2006 |
| 7103320 | Wireless communication system within a system on a chip A communication system (8) for transmitting data between cores (10) embedded in an integrated circuit on a silicon chip (12). Communication system (8) includes transmitter circuitry (24) for wirelessly transmitting data between cor... | 09/05/2006 |
| 7092790 | Intelligent volumetric module for drink dispenser An intelligent volumetric module for use in metering pressurized syrup to a drink dispenser machine comprises a solenoid driven metering system for controlling liquid flows from a pressurized syrup container and a controller for controlling operation of said solenoi... | 08/15/2006 |
| 7072995 | Methods and apparatus for indicating whether a device is connected to a serial ATA communications cable A Serial ATA communications system has a host, a device, and a Serial ATA communications cable that connects the host to the device. The Serial ATA communications cable includes (i) a pair of transmit lines configured to carry a differential mode transmit signal, (i... | 07/04/2006 |
| 7035959 | Adapter for controlling a measuring device, a measuring device, a controller for a measuring device, a method for processing measurement and a recording medium A measuring device, a measuring device controller, a measuring system, a measurement process performing method and a recording medium thereof which can easily and adequately perform a measurement process are provided. The present invention is constructed to include ... | 04/25/2006 |
| 7024496 | Operation method of input/output pad with monitoring ability An I/O pad has a data transmitting circuit, a data monitoring control circuit, and a control selection circuit. The control selection circuit controls the data transmitting circuit. When it is enabled, data in the data transmitting circuit are exported to a receivin... | 04/04/2006 |
| 7003594 | Streaming protocol for storage devices Various embodiments of systems and methods for implementing a streaming I/O protocol are disclosed. In some embodiments, a method may involve: receiving a packet initiating a streaming write operation, where the packet indicates that the size of the streaming write ... | 02/21/2006 |
| 6985979 | Digital data processing device, bus controlling method, bus controlling program and recording medium It is an object to restore states of isochronous resources and logic plugs to normal states when failures occur in release of the isochronous resources and disconnection of the logic plugs. Information of isochronous resources and logic plugs of which release have b... | 01/10/2006 |
| 6981074 | Descriptor-based load balancing A multiprocessor switching device substantially implemented on a single CMOS integrated circuit is described in connection with a descriptor-based packet processing mechanism for use in efficiently assigning and processing packets to a plurality of processors. A plu... | 12/27/2005 |
| 6978323 | Interface control device and computer system for controlling data transfer An interface control device controls the packet-type transfer of data between one or more computers and one or more input/output devices. According to one embodiment of the present invention, when the interface control device receives the lead packet in a series of ... | 12/20/2005 |
| 6978330 | Shared resource access via declarations that contain a sequence number of a packet Logic (also called “re-ordering semaphore”) issues semaphore grants to access a shared resource in an order different from the order in which semaphore requests for accessing the shared resource are received. The re-ordering semaphore needs to receive a semaphor... | 12/20/2005 |
| 6970953 | System and method for terminating a bus An exemplary system includes a bus (such as CAN bus) having at least two end points. A first and/or a second set of an undetermined number of devices may be connected to the bus. A controller is also connected to the bus, and is configured to establish a termination... | 11/29/2005 |