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| Number | Title | Issue Date |
| 5600803 | Data transfer system and method using data bus having bi-directional serial data line, clock line and bi-directional control line A data transfer system including a plurality of microcomputers connected to a serial data bus in parallel to each other, one of which is designated as a controller and remainder as targets each having its own sending order of data allocated beforehand, in... | 02/04/1997 |
| 5592680 | Abnormal packet processing system This invention relates to an abnormal packet processing system, and is directed to minimize processing of an abnormal packet during communication between a plurality of processing units by a receiving processor. This data processing system includes a plur... | 01/07/1997 |
| 5590378 | Apparatus for aligning and padding data on transfers between devices of different data widths and organizations A computer system which includes a DMA controller on the local I/O unit which can be programmed by either the host processor or the local processor. Semaphore flags and lock bits are provided to allow determination of control of the local DMA controller a... | 12/31/1996 |
| 5586273 | HDLC asynchronous to synchronous converter Communication, using a synchronous protocol, over a synchronous communications link, between synchronous application programs executed on a terminal (i.e., personal computer, PC) with an asynchronous byte-oriented interface and a PC with a synchronous fra... | 12/17/1996 |
| 5586294 | Method for increased performance from a memory stream buffer by eliminating read-modify-write streams from history buffer A read buffering system employs FIFOs to hold sequential read data for a number of data streams being fetched by a computer. When the system sees a read command from the CPU, it stores an incremented value of the address of the read command in a history b... | 12/17/1996 |
| 5574949 | Multi-access local area network using a standard protocol for transmitting MIDI data using a specific data frame protocol In a multi-access local area network, a plurality of stations employing a predetermined protocol (e.g., a protocol based on a CSMA/CD system) are linked together by a bus. In order to transmit MIDI data in the multi-access local area network, another stat... | 11/12/1996 |
| 5574933 | Task flow computer architecture A computer architecture has a plurality of processing cells interconnected to perform programming tasks. Each cell contains both memory and processing elements. Memory packets contain an instruction, a data element, and a pointer to another memory packet.... | 11/12/1996 |
| 5574858 | Method and apparatus for, upon receipt of data from a mouse, requiring the remainder of data needed to constitute a packet to be received within one second A method of operating a computer which has a CPU, an input/output coprocessor, and an attached pointing device, the input/output coprocessor receiving data in packets from the attached pointing device. When the coprocessor receives data from the pointing ... | 11/12/1996 |
| 5566301 | ISDN audiovisual teleservices interface subsystem The technical field of the invention generally concerns systems for audiovisual teleservices using digital telecommunication services such as Integrated Services Digital Network ("ISDN") communications. In the preferred embodiment, an interface subsystem ... | 10/15/1996 |
| 5555391 | System and method for storing partial blocks of file data in a file cache system by merging partial updated blocks with file block to be written A system and method for updating partial blocks of file data stored in a non-volatile storage within a file cache system connected to a host computer system. A first buffer and a last buffer receive from the non-volatile storage the existing portions of t... | 09/10/1996 |
| 5555438 | Method for synchronously transferring serial data to and from an input/output (I/O) module with true and complement error detection coding An industrial controller Input/Output module includes on-board processing circuitry in the form of a microprocessor and associated memory, a first programmable logic circuit and a second programmable logic circuit connected through an isolation interface.... | 09/10/1996 |
| 5551020 | System for the compacting and logical linking of data blocks in files to optimize available physical storage The present invention is a method of processing and writing data to a database wherein the method comprises four broad steps: 1) manipulating data files into a more compact and efficient bit-encoded form and preparing the files to receive additional data ... | 08/27/1996 |
| 5544317 | Method for continuing transmission of commands for interactive graphics presentation in a computer network The simultaneous, real time graphical information is shared between two or more intelligent work stations linked together in conversation via a network. Transmission of the essence of a graphical image is accomplished by fixed and variable length portions... | 08/06/1996 |
| 5539918 | Extension of data block capability in a data transfer channel An adaptive data transfer channel providing means for a data management access method (AM) to define the channel subsystem data block transfer size and to transfer an extended data block (EDB) by a single channel transfer command to avoid repeated channel... | 07/23/1996 |
| 5517670 | Adaptive data transfer channel employing extended data block capability An adaptive data transfer channel providing means for a data management access method (AM) to define the channel subsystem data block transfer size and to transfer an extended data block (EDB) by a single channel transfer command to avoid repeated channel... | 05/14/1996 |
| 5502823 | Bus system with virtual logical buffer A bus system is disclosed in which the CPU reads program controlling data from a ROM and stores the read data into a RAM through an internal bus line. The CPU causes interrupts on the RAM at predetermined timing to thereby supply data required for control... | 03/26/1996 |
| 5463762 | I/O subsystem with header and error detection code generation and checking Apparatus is provided for use in an Input/Output (I/O) subsystem. The I/O subsystem is coupled to a serial data transfer medium that transmits data from a sender to a recipient. The I/O subsystem processes a frame comprising user defined data and frame co... | 10/31/1995 |
| 5459838 | I/O access method for using flags to selectively control data operation between control unit and I/O channel to allow them proceed independently and concurrently An access method allows the separation of the command stream being sent to the control unit from the command stream interpreted by the channel. This access method allows the I/O subsystem to, first, reduce the number of interlocks required on the I/O inte... | 10/17/1995 |
| 5455907 | Buffering digitizer data in a first-in first-out memory A computer system with a digitizer based screen display in which the digitizer data is buffered through a first-in first-out memory (FIFO). The processor is only interrupted when a full digitizer data packet is available in the FIFO, rather than being int... | 10/03/1995 |
| 5455950 | Universal device for coupling a computer bus to a specific link of a network and operating system therefor An operating system (GPOS) for universal device (GPU) for coupling a computer bus (PSB) to at least one specific link of a network (RN), the device includes a microprocessor (CPU) associated with at least one memory (SRAM) containing this system and means... | 10/03/1995 |
| 5434872 | Apparatus for automatic initiation of data transmission Early initiation of transmission of data in a network interface that includes a dedicated transmit buffer is provided in a system which includes logic for transferring frames of data composed by the host computer into the transmit buffer. The amount of da... | 07/18/1995 |
| 5434980 | Apparatus for communication between a device control unit having a parallel bus and a serial channel having a serial link A device control unit operating under the protocol of a parallel bus is connected by a serial link to a channel that is primarily adapted to operate under a different protocol with device control units connected by a serial link. An extender unit intercon... | 07/18/1995 |
| 5432912 | Method and channel apparatus for rearranging received data in order of generation of addresses Where memory read requests are consecutively issued from a channel apparatus, read data and within-device identifiers in response information, which are returned from a memory control device of a main memory in order which does not always correspond to th... | 07/11/1995 |
| 5420983 | Method for merging memory blocks, fetching associated disk chunk, merging memory blocks with the disk chunk, and writing the merged data A method for reducing the number of I/O requests required to write data to a disk drive of a computer system. The computer system includes a read cache for storing old data read from the disk drive, and a write cache for storing new data to be written to ... | 05/30/1995 |
| 5313589 | Low level device interface for direct access storage device including minimum functions and enabling high data rate performance A controller device interfacing method and a low level device interface are provided for use between at least one controller and a plurality of devices in a direct access storage device. Message and command and data information are received and transmitte... | 05/17/1994 |
| 5274768 | High-performance host interface for ATM networks A host interface 1 for an asynchronous transfer mode (ATM) network comprises a Segmenter 2 and Reassembler 3. The host interface 1 is connected to a Sunshine ATM switch 7 via an electrical to optical converter 6 and an IBM RS/6000 workstation 4 via a Micr... | 12/28/1993 |
| 5247657 | Serial data transmission including idle bits A serial data interface communicates data between a control processor (1) and one or more slave processors (2) via a serial bus (3). Typically the control processor (1) may be formed in a hand held or lap top computer and the slave processor (2) in a peri... | 09/21/1993 |
| 5185862 | Apparatus for constructing data frames for transmission over a data link An outbound frame state machine (OFSM) which generates data frames for transmission over a data link. The OFSM is microcode controlled and includes an outbound frame header buffer for containing information to be included in the header of the frame, a dat... | 02/09/1993 |
| 5163136 | System for assembling playback data frames using indexed frame buffer group according to logical frame numbers in valid subcode or frame header Apparatus and method for assembling data read from a data storage DAT tape into data groups. A tape data processing circuit responsive to the playback of DAT tape for provides for each frame a serial frame information output including a frame header and f... | 11/10/1992 |
| 5123091 | Data processing system and method for packetizing data from peripherals In a system including a host and a peripheral repeater having at least one peripheral coupled thereto, data from the peripheral is packetized at the peripheral repeater and sent to the host. This is done by establishing a baud rate for the peripheral, acc... | 06/16/1992 |
| 5031091 | Channel control system having device control block and corresponding device control word with channel command part and I/O command part A device control word including a channel command part and an I/O command part is prepared in a main storage unit, and sent to a channel unit together. The channel command part has a common format for different types of I/O devices or I/O controllers ther... | 07/09/1991 |
| 5014186 | Data-processing system having a packet transfer type input/output system In a data processing system having a system bus for coupling I/O units to a system storage unit, there is provided a mechanism for supplying to the I/O units a line size signal representing the line size of the system storage unit. A further mechanism is ... | 05/07/1991 |
| 5010514 | Structured fields at a data stream boundary for delimiting files Unique structured fields for delimiting the beginning and end of a data file sent to a print server in a computer network having a mixture of host processors and microprocessors for generating files to be printed. Each file sent to the print server is pre... | 04/23/1991 |
| 4949245 | Intermediate memory system for connecting microcomputers to a rotating disk memory A method of storing data on a peripheral rotating disk memory system, which is connected to one of a plurality of central processor units via a common bus including temporarily storing, in an intermediate memory system connected to the bus, original data ... | 08/14/1990 |
| 4939735 | Information handling system having serial channel to control unit link An information handling system includes a processor with one or more channels for communicating to peripheral devices controlled by peripheral device controllers, and one or more serial data links between the channels and the peripheral controllers. Data ... | 07/03/1990 |
| 4868742 | Input/output bus for system which generates a new header parcel when an interrupted data block transfer between a computer and peripherals is resumed A communication bus (14) provides bidirectional data communication between a computer (12) and various peripheral units including input/output processors (18, 20) and a service processor (22). The computer includes a memory control unit (24) which is conn... | 09/19/1989 |
| 4855900 | System for transferring data to a mainframe computer A system (10) for transferring data from an image acquisition device (12) to a mainframe computer (14) includes a memory (20) for temporarily storing data received from the image acquisition device (12) prior to transfer to the mainframe computer (14). A ... | 08/08/1989 |
| 4823305 | Serial data direct memory access system A serial data direct memory access system including a control circuit that shares control with a master computer of an interface bus of a DMA storage system. Serial data is supply to the control circuit via a fiber optic cable. The control circuit employs... | 04/18/1989 |
| 4413319 | Programmable controller for executing block transfer with remote I/O interface racks A programmable controller has a main processor and a scanner circuit in a unit that is connected through a multi-channel, multi-drop serial data link to a plurality of remotely located I/O racks. The I/O racks are adapted for connection to I/O devices con... | 11/01/1983 |
| 4365296 | System for controlling the duration of the time interval between blocks of data in a computer-to-computer communication system System for controlling the duration of the time interval between the blocks of data transmitted by a computer 1. A channel 7 transfers the first block to be transmitted to a control unit 2 which sends same over a line 4 through a modem 3. When the block h... | 12/21/1982 |
