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"I hate what they've done to my child...I would never let my own children watch it. "
Vladimir Zworykin, television pioneer ; Talking about an invention in which he played a critical role.
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| Number | Title | Issue Date |
| 7209982 | Electronic apparatus including plural processors An electronic apparatus includes first and second processors which execute first and second operating systems, first disk controller which accesses a disk storage device in response to a disk access request from the first processor, a second disk controller which ac... | 04/24/2007 |
| 7206874 | Status display-enabled connector for a universal asynchronous receiver/transmitter A Universal Asynchronous Receiver/Transmitter (UART) connector capable of displaying status includes a capturing unit, a driving unit and a display unit. The UART connector captures asynchronous transmitting input and output signals, and are displayed by driving the... | 04/17/2007 |
| 7206972 | Path commissioning analysis and diagnostic tool A method for identifying service critical faults in a communications network and a network management system employing the method are provided. A service provisioning tool associated with the network management system and operating in accordance with the method, per... | 04/17/2007 |
| 7206953 | Asynchronous fault-tolerant enclosure services interface The present invention provides method, interface and computer-readable medium for enabling enclosure services in a computer system including a multi-device enclosure generally remote from a host bus adapter. The method provides a communications port between the mult... | 04/17/2007 |
| 7206957 | Clock distribution circuit A user circuit unit is configured by a gate array, a PLL circuit is configured in a microprocessor macro unit, a clock frequency output from the PLL circuit in the microprocessor macro unit is directly distributed to a user circuit unit (CLK 3), and the clock... | 04/17/2007 |
| 7206960 | Bus clock frequency management based on device load A frequency manager automatically selects a clock frequency for each device or bus, or for a plurality of devices or buses, in a system, based on various factors and objectives. These factors and objectives can include optimizing performance of the devices without e... | 04/17/2007 |
| 7206887 | System and method for memory hub-based expansion bus A system memory includes a memory hub controller, a memory module accessible by the memory hub controller, and an expansion module having a processor circuit coupled to the memory module and also having access to the memory module. The memory hub controller is coupl... | 04/17/2007 |
| 7206901 | Storage control system The enclosure 10 in which the storage control system 600 is constructed comprises a scale-out NAS head group 111 constituted by two or more NAS heads, and a scale-up NAS head 110H that is a higher performance NAS head than each of NAS hea... | 04/17/2007 |
| 7205923 | Pipelined analog to digital converter that is configurable based on mode and strength of received signal A pipelined analog to digital converter (ADC) that is arranged to dynamically adapt its resolution and sampling frequency based on at least a determined mode of communication and the strength of a received wireless signal. Since standby mode data is typically commun... | 04/17/2007 |
| 7206811 | System and method for facilitating real-time collaborating by collapsing a queue for a slow client A system and method for facilitating real-time collaboration. A real-time collaboration server comprises a number of communication modules for handling communications with individual clients. An organizer manages the collaboration and includes a control unit for eac... | 04/17/2007 |
| 7206867 | Method and apparatus for robust addressing on a dynamically configurable bus The invention in one embodiment is a dynamically configurable bus system, including a dynamic bus; a bus device having a first guaranteed unique identifier and a first physical address on the dynamic bus; and a bus manager having a second guaranteed unique identifie... | 04/17/2007 |
| 7206877 | Fault tolerant data communication network The present invention provides a fault tolerant bus architecture and protocol for use in an Integrated Hazard Avoidance System of the type generally used in avionics applications. In addition, the present invention may also be used in applications, aviation and othe... | 04/17/2007 |
| 7206881 | Arrangement and method for controlling dataflow on a data bus The present invention relates to a method and arrangement for controlling dataflow on a databus, especially for avoiding reception problems by a receiver unit. The databus connects at least one receiver unit to one or several transmitter units. The method comprises ... | 04/17/2007 |
| 7206878 | Voltage level bus protocol for transferring data A bus protocol that allows a master to transfer the same data to multiple devices at the same time. More specifically, the bus protocol uses a particular voltage level to identify whether a device should receive the data. A controller is used for programming the vol... | 04/17/2007 |
| 7206888 | Backplane configuration with shortest-path-relative-shift routing A novel backplane routing and configuration (200) supports a full mesh architecture. In this novel configuration, a circuit pack determines which backplane signals to use for a transmission based on the relative distance across the backplane between the board... | 04/17/2007 |
| 7206946 | Disk drive system for starting destaging of unwritten cache memory data to disk drive upon detection of DC voltage level falling below predetermined value A disk array system including at least one channel control portion, at least one disk control portion, a cache memory, a cache switch, a shared memory, a power unit, and a casing for storing the channel control portion, the disk control portion, the cache memory, th... | 04/17/2007 |
| 7206885 | Variable field bus coupling with long coupling length, particular for mobile operator control and monitoring devices The invention relates to a system for coupling a mobile data input unit to a field bus, whereby a coupling unit is connected to the field bus via a spur line and a line driver and the signals at the output of the line driver are supplied to a coupling link or receiv... | 04/17/2007 |
| 7203787 | Information processing apparatus and method that utilizes stored information about a mountable device An IEEE 1394-compliant communication bus connects a printer and host computer so as to allow communication. The configuration ROM of the printer stores information about devices mountable on the apparatus. The host computer accesses the configuration ROM via the com... | 04/10/2007 |
| 7203788 | USB-to-VGA converter A USB-to-VGA converter includes a USB controller connectable to a USB port of a computer for receiving USB based display signals from the computer, a VGA controller connectable to a display device for conveying VGA signals to the display device and a bridge connecte... | 04/10/2007 |
| 7203870 | Semiconductor memory unit with repair circuit A semiconductor memory unit with a repair circuit includes a controller, a 2-to-1 selector, an address decoder and an address comparator. The controller supplies the 2-to-1 selector and the address comparator with a setup signal to carry out the following control. W... | 04/10/2007 |
| 7202756 | Electromagnetic coupler with direct current signal detection According to some embodiments, a signal line associated with a printed circuit board is provided. In addition, a conductive trace is electrically connected to a portion of the signal line. At least a portion of the conductive trace may be offset from the signal line... | 04/10/2007 |
| 7203708 | Optimizing file replication using binary comparisons Client and server based copies of a file are maintained in synchronicity as changes are made to the file. Data is compared to a previous version known to both the client and server and a highly compressed representation of the differences between the two is generate... | 04/10/2007 |
| 7203732 | Flexible remote data mirroring Methods, systems, and configured storage media are provided for flexible data mirroring. In particular, the invention provides local-remote role reversal, implementation of hot standby server status through a “media not ready” signal, several alternate buffer co... | 04/10/2007 |
| 7200704 | Virtualization of an I/O adapter port using enablement and activation functions A method for configuring a communication port of a communications interface of an information handling system into a plurality of virtual ports. A first command is issued to obtain information indicating a number of images of virtual ports supportable by the communi... | 04/03/2007 |
| 7200694 | Servicing multiple hot-plug events utilizing a common event signal in providing hot-plug attention button support Each attention button is tied to a presence signal, which is also used to detect the presence of a PCI adapter card within a slot. By comparing HPPC register states, pending due to a system control interrupt (“SCI”), with stored HPPC register states prior to the... | 04/03/2007 |
| 7200702 | Mobile device expansion system An expansion device is provided for expanding the functionality of a mobile electronic device while in a mobile mode and/or in a desktop mode. The expansion device may be a media slice that provides multimedia functionality to a mobile electronic device. The media s... | 04/03/2007 |
| 7200451 | Method for consistent on/off object to control radios and other interfaces In a method and system for controlling a device coupled to an information handling system, an object is defined to include a hardware and software component having a corresponding hardware operating state and a software operating state. The hardware component is ope... | 04/03/2007 |
| 7200069 | Semiconductor memory device having external data load signal synchronous with data strobe signal and serial-to-parallel data prefetch method thereof A semiconductor memory system, a memory control circuit and a semiconductor memory device are disclosed. The system includes a memory control circuit for generating a data strobe signal and a data load signal in synchronization with each other. The memory circuit, w... | 04/03/2007 |
| 7200685 | Communication apparatus for communicating data between separate toplogies, and related method, storage medium, and program In a connection form of PC-printer-digital camera, for example, to enable a printing function from a PC to a printer, a direct printing function from a digital camera to a printer, and a function of directly transferring image data on a memory card of the digital ca... | 04/03/2007 |
| 7200744 | Apparatus and method for controlling device operation in computer Disclosed is an apparatus and method for controlling driving of an auxiliary device in a computer. The computer would include an operating system (OS) having at least one of a keyboard controller driver and a system BIOS that controls the enabled/disabled status of ... | 04/03/2007 |
| 7200776 | System and method for generating trace data in a computing system A hardware trace unit is integrated into a computer system that has a main memory. The trace unit includes registers that contain information defining a location in main memory, and has an input connection. This is used to eavesdrop on communications in the computer... | 04/03/2007 |
| 7200024 | System and method for optically interconnecting memory devices A memory device includes a semiconductor substrate in which memory circuitry has been fabricated. An address converter and a control signal converter are coupled to an address decoder and control logic, respectively. The address and control converters are operable t... | 04/03/2007 |
| 7197590 | Method and apparatus for connecting LPC bus and serial flash memory A method and apparatus for connecting low pin count (LPC, hereinafter) bus and serial flash memory is provided for converting the interface between a LPC bus and a serial flash memory in personal computer systems. The method according to the present invention compri... | 03/27/2007 |
| 7197536 | Primitive communication mechanism for adjacent nodes in a clustered computer system A circuit arrangement, node, clustered computer system, and method incorporate a primitive communication mechanism for use in exchanging data between adjacent nodes coupled via a point-to-point network. A plurality of network ports are used to couple a node to other... | 03/27/2007 |
| 7197577 | Autonomic input/output scheduler selector The automatic selection of an input/output scheduler in a computing system with a plurality of input/output schedulers is disclosed. Each of the plurality of input/output schedulers is mapped against a corresponding desired set of heuristics. Heuristics relating to ... | 03/27/2007 |
| 7194583 | Controlling the replacement of prefetched descriptors in a cache A host controller such as a USB host controller in a southbridge, and a corresponding operation method are provided. The host controller comprises a descriptor fetch unit that is adapted to send out requests for descriptors and receive descriptors in reply to the re... | 03/20/2007 |
| 7194593 | Memory hub with integrated non-volatile memory A memory hub having an integrated non-volatile memory for storing configuration information is provided. The memory hub includes a high-speed interface for receiving memory access requests, a non-volatile memory having memory configuration information stored therein... | 03/20/2007 |
| 7194600 | Method and apparatus for processing data with a programmable gate array using fixed and programmable processors A method and apparatus for processing data within a programmable gate array comprise a first fixed logic processor and a second fixed logic processor that are embedded within the programmable gate array and detect a custom operation code. The processing continues wh... | 03/20/2007 |
| 7194564 | Method and apparatus for preventing loops in a full-duplex bus A method and apparatus is disclosed for preventing loops in a full-duplex bus. One method has the acts of: selecting at least two candidates to join said bus; establishing a dominant candidate from one of said at least two candidates; testing for loops in said bus; ... | 03/20/2007 |
| 7190284 | Selective lossless, lossy, or no compression of data based on address range, data type, and/or requesting agent An integrated memory controller (IMC) including MemoryF/X Technology which includes data compression and decompression engines for improved performance. The memory controller (IMC) of the present invention preferably selectively uses a combination of lossless, lossy... | 03/13/2007 |
