Did You Know...
...that in 1800 ether was first used by partyers as a fun diversion? Sniffing the gas led to hilarious and raucous laughter as people watched each other become more and more intoxicated and silly. Several doctors independently realized the value ether would have to anesthetize surgery patients. Of those who claimed rights to the "discovery," none had a happy ending. One had a seizure and died defending his rights. Another spent his life in an asylum because he had been denied acclaim. A third became addicted to chloroform and, in a New York City jail, he soaked a cloth in the drug, severed an artery and bled to death.
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| Number | Title | Issue Date |
| 7657677 | Blade server system with a management bus and method for managing the same A blade server system with a management bus and method for managing the same. The blade server system includes a connection board and a management module. The connection board is used for modular interconnection, including communication paths for conducting signals ... | 02/02/2010 |
| 7657678 | Modular computer system A modular computer system (20) including a universal connectivity station (UCS) (22) interconnected to a plurality of remote modules (30, 32, 34, 36, 38, 42) via a plurality of respective high speed serial links (26, 40) such as based on ... | 02/02/2010 |
| 7653768 | Method, system, and program for master and slave units connected in daisy chain wherein appended error code is transferred between the units A data transfer method for connecting a master unit on an upstream side and a plurality of slave units on an downstream side in series with serial bus by a daisy chain system and transferring data having an appended error check code or error correction code between ... | 01/26/2010 |
| 7650448 | I/O and memory bus system for DFPS and units with two- or multi-dimensional programmable cell architectures A general bus system is provided which combines a number of internal lines and leads them as a bundle to the terminals. The bus system control is predefined and does not require any influence by the programmer. Any number of memories, peripherals or other units can ... | 01/19/2010 |
| 7647439 | Electronic Warning System A building control or danger warning system includes a two-core circular bus for voltage supply and for communication with bus user circuits connected to the cores of the circular bus. The bus user circuits are looped-into the circular bus via FET (field effect tran... | 01/12/2010 |
| 7644210 | Method and system for storing and retrieving a translation of target program instruction from a host processor using fast look-up of indirect branch destination in a dynamic translation system Dynamic translation of indirect branch instructions of a target application by a host processor is enhanced by including a cache to provide access to the addresses of the most frequently used translations of a host computer, minimizing the need to access the transla... | 01/05/2010 |
| 7617342 | Universal serial bus dongle device with wireless telephony transceiver and system for use therewith A universal serial bus (USB) dongle device includes a wireless telephony transceiver that receives an inbound RF signal and that generates inbound data based on the inbound RF signal and receives outbound data and that generates an outbound RF signal in response the... | 11/10/2009 |
| 7552257 | Data transmission device with a data transmission channel for the transmission of data between data processing devices The present invention provides a data processing apparatus having at least one dedicated data processing device (10) of a first type, a central data processing device (4) for controlling dedicated data processing devices (10, 12, 14), at least o... | 06/23/2009 |
| 7539800 | System, method and storage medium for providing segment level sparing A memory subsystem that includes segment level sparing. The memory subsystem includes a cascaded interconnect system with segment level sparing. The cascaded interconnect system includes two or more memory assemblies and a memory bus. The memory bus includes multipl... | 05/26/2009 |
| 7519750 | Linear burst mode synchronizer for passive optical networks The present invention discloses a host receiver synchronizer for passive optical networks, and in particular a burst clock data recovery circuit in a host receiver in a bursty asynchronous communication system having a non-data preamble of less than 250 ns, for reco... | 04/14/2009 |
| 7512728 | Inter-chip communication system The complexity of user designs, the limited capacity of FPGA chips, and the limited number of chip pinouts have resulted in the development of inter-chip communication technology that necessitates the transfer of a large amount of data across a limited number of pin... | 03/31/2009 |
| 7490183 | Information kit integration architecture for end-user systems A method, system, and program product for a new intercommunication architecture in a modular computer system environment. The Information Kit is a publish-and-subscribe software bus applied as an application programming model on an embedded device. Each module of th... | 02/10/2009 |
| 7475175 | Multi-processor module An apparatus comprises a plurality of logically independent processors, a system bus, and a cache control and bus bridge device in communication with the plurality of processors such that the cache control and bus bridge device is logically interposed between the pr... | 01/06/2009 |
| 7464205 | Application server blade for embedded storage appliance A method for transferring data within a network storage appliance is disclosed. The method includes transmitting a packet on an I/O link from a server to a first portion of a storage controller. Transmitting the packet on the I/O link is performed within a single bl... | 12/09/2008 |
| 7461188 | Capacitive multidrop bus compensation The signal integrity of a high speed heavily loaded multidrop memory bus is often degraded due the numerous impedance mismatches. The impedance mismatches causes the bus to exhibit a nonlinear frequency response, which diminishes signal integrity and limits the band... | 12/02/2008 |
| 7444446 | Optical DVI cable, optical signal transmission equipment and optical signal transmission system which have the cable, and method of transmitting optical signal using the cable The present invention provides an optical DVI cable and optical signal transmission equipment which can prevent the leakage of laser light to the outside. The optical DVI cable includes (1) a transmission side unit having a laser light emitting element unit, and con... | 10/28/2008 |
| 7443878 | System for scaling by parallelizing network workload A method for scaling a network system which includes providing at least one network interface and providing a flexible association between packets and a plurality of processing entities via the plurality of memory access channels. Each network interface including a ... | 10/28/2008 |
| 7444436 | Memory option card having predetermined number of activation/deactivation codes for selectively activating and deactivating option functions for a medical device A device such as for example a electronic medical device has a memory that has prestored therein a number of programs or routines for performing various functions. Some of those functions are optional functions that were not enabled when the equipment was put into s... | 10/28/2008 |
| 7444456 | SRAM bus architecture and interconnect to an FPGA An SRAM bus architecture includes pass-through interconnect conductors. Each of the pass-through interconnect conductors is connected to routing channels of the general interconnect architecture of the FPGA through an element which includes a pass transistor connect... | 10/28/2008 |
| 7441063 | KVM system for controlling computers and method thereof A system for connecting a console device to computers comprising a graphic user interface menu apparatus for controlling the computers. The system comprises a user-side circuit, a central crosspoint switch, a plurality of computer-side circuits, a menu generating un... | 10/21/2008 |
| 7437738 | Method, system, and program for interfacing with a network adaptor supporting a plurality of devices Provided are a method, system, and program for interfacing with device hardware supporting a plurality of devices. A device interface driver is initialized to represent the device hardware as a virtual bus to an operating system and to represent to the operating sys... | 10/14/2008 |
| 7433354 | Bus system for an aircraft The present invention relates to a bus system for transmitting a data packet between multiple devices in an aircraft, which is based on the CAN data bus system, but has an expanded identification field, in which a fixed region is designed for identification of the m... | 10/07/2008 |
| 7433988 | Port adapter for high-bandwidth bus A port adapter for connecting zero or more network interfaces to a host system having a SPI-4 bus is disclosed. The port adapter comprises zero or more network interfaces; a SPI-4 bus coupled to a host system to provide a communication channel between the host and t... | 10/07/2008 |
| 7426620 | Apparatus and method for memory access of sharing buses An apparatus and a method for memory access of sharing the address and the data buses used in multi-media player, comprising at least one SDRAM, storing the large data and as a buffer in high speed; at least one flash memory, storing the programs, the user's default... | 09/16/2008 |
| 7423451 | System-on-a-chip integrated circuit including dual-function analog and digital inputs An integrated circuit includes a plurality of inputs, a plurality of output pads, a programmable logic block, an analog circuit block, an analog-to-digital converter programmably coupleable to individual analog circuits in the analog circuit block, and an interconne... | 09/09/2008 |
| 7424560 | Universal serial bus hub with wireless communication to remote peripheral devices A wireless USB hub for connecting a plurality of remote peripheral devices to a computer for communication therewith without the need to physically connect the peripheral devices to the hub via a cable connection. The wireless USB hub includes a receiver for receivi... | 09/09/2008 |
| 7421525 | System including a host connected to a plurality of memory modules via a serial memory interconnect A system including a host coupled to a serially connected chain of memory modules. In one embodiment, each of the memory modules includes a memory control hub for controlling access to a plurality of memory chips on the memory module. The memory modules are coupled ... | 09/02/2008 |
| 7421518 | Communication method and processor A processor has a central processing unit and a first interface. The central processing unit sets a communication parameter in a configuration register in the communication interface. A direct memory access controller or a data transfer controller then sets the same... | 09/02/2008 |
| 7418714 | Employing three parameter buffer access in connection with SMBus notifications A system that facilitates access to an SMBus is provided. The system includes a notification component that identifies an SMBus event and a driver that dispatches the SMBus event to an AML event handler. A method for SMBus event handling is also provided. The method... | 08/26/2008 |
| 7415553 | Automatic cluster join protocol A method for new nodes to join a cluster in a serial sequence includes (a) a new node transmitting a first type of request to join the cluster and (b) the new node determining if it has to back off the first type of request. The new node has to back off if (1) it ha... | 08/19/2008 |
| 7415322 | Motherboard having advanced fan control features A motherboard is capable of accepting various types of fans from same or different manufacturers and is capable identifying the type of fan to which it is connected. In one embodiment, the motherboard is capable of decoding bar code data originating from a fan of th... | 08/19/2008 |
| 7411958 | Method and system for transferring data directly between storage devices in a storage area network A method and system for performing a copy operation between storage devices coupled to a Fiber Channel switch element is provided. The Fiber Channel switch element receives a user command to copy data from a source storage device to a destination storage device and ... | 08/12/2008 |
| 7412544 | Reconfigurable USB I/O device persona A method and system for allowing a server blade in a blade chassis to use a remote universal serial bus (USB) device. Multiple USB devices are coupled to a management module in the blade chassis. A persona describing only authorized USB devices is sent to a reconfig... | 08/12/2008 |
| 7405843 | Image forming apparatus An image forming apparatus includes a controller having an integrated circuit for image processing. The controller is connected to an engine via a peripheral component interconnect (PCI). The engine includes a plotter and a scanner. The controller includes a central... | 07/29/2008 |
| 7406566 | Ring interconnect with multiple coherence networks A cache architecture to increase communication throughput and reduce stalls due to coherence protocol dependencies, while reducing power within an integrated circuit. More particularly, embodiments of the invention include a plurality of cache agents that each commu... | 07/29/2008 |
| 7398342 | Active termination control A method and apparatus are provided for active termination control in a memory by a module register providing an active termination control signal to the memory. The memory turns on active termination based on information programmed into one or more mode registers o... | 07/08/2008 |
| 7398345 | Inter-integrated circuit bus router for providing increased security An inter-integrated circuit port for providing increased security. An electrical connector for communicative coupling to an inter-integrated circuit bus is provided. A controller coupled to the electrical connector operates to control data communication through the ... | 07/08/2008 |
| 7389369 | Active termination control A method and apparatus are provided for active termination control in a memory. In an embodiment, the memory turns on active termination based on information programmed into one or more mode registers of the memory. In an embodiment, the memory maintains the active ... | 06/17/2008 |
| 7389469 | Bus systems, apparatuses, and methods of operating a bus Data transmission between transmitting/receiving nodes in a bus system may be controlled based on an error check of received data. When an error in the received data is detected, the transmitting node may cease data transmission, and other nodes, which may not have ... | 06/17/2008 |
| 7389368 | Inter-DSP signaling in a multiple DSP environment The invention includes a method and apparatus for synchronizing a first processor with a second processor. The method includes storing in a register parallel bits of data from the first processor, wherein at least one bit of data is a logic ONE. An output signal is ... | 06/17/2008 |