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| Number | Title | Issue Date |
| 7702716 | Analogue multiplier An analogue multiplier circuit has an input coefficient voltage dependent adjustment of its frequency response. The multiplier contains a multiplier cell (MC) with an RF input (Vin+, Vin−) and a coefficient signal input (Vcoeff+, Vcoeff−), one or more capacitors... | 04/20/2010 |
| 7631030 | Sine wave multiplication circuit and sine wave multiplication method A sine wave multiplication circuit multiplies an analog input signal by n (n is an integer equal to or greater than 2) weighting coefficients each having a unique value. The polarity of the analog input signal multiplied by one of the n weighting coefficients is cha... | 12/08/2009 |
| 7418468 | Low-voltage CMOS circuits for analog decoders Low-voltage CMOS (Complementary Metal Oxide Semiconductor) circuits, suitable for analog decoders, for example, are provided. The circuits include multiplier modules that receive first input signals and respective ones of a plurality of second input signals. Each mu... | 08/26/2008 |
| 7185400 | Top end stop of slide fastener A top end stop of a slide fastener is attached to fastener stringers on a box pin side, and has a first side face opposing a guide column of a slider and a second side face on an opposite side. The first side face has first and second opposing side faces intersectin... | 03/06/2007 |
| 7146149 | High isolation switch buffer for frequency hopping radios A local oscillator (LO) circuit is disclosed which provides improved isolation between the unselected LO source and a mixer. The LO circuit includes a first LO source to generate a first periodic signal cycling at a first frequency, a second LO source to generate a ... | 12/05/2006 |
| 7136587 | System and method for providing simulated hardware-in-the-loop testing of wireless communications networks A system and method for efficiently and effectively simulating hardware-in-the-loop testing of a wireless communications network. The system and method employs an optical matrix-vector multiplier (MVM) for performing optical signal processing to simulate radio frequ... | 11/14/2006 |
| 7092981 | Non-reciprocal network element that produces an input impedance that is a function of the multiplication-division of its load impedances The Impedance Multiplication-Division Operators are made up of non-reciprocal network elements, each of which produces an input impedance that is related to the multiplication-division of its load impedances. The Impedance Multiplication-Division Operator can be imp... | 08/15/2006 |
| 7082451 | Reconfigurable vector-FFT/IFFT, vector-multiplier/divider Systems and methods are described for providing a reconfigurable circuit having multiple distinct circuit configurations with respective distinct operating modes The circuit may be controllably configures to perform a fast Fourier transform function, a multiplier fu... | 07/25/2006 |
| 7078969 | Analog signal interpolation A linear interpolator is provided that includes differential pairs of transistors biased such that a first input voltage may be multiplied by a factor r wherein 0≦r≦1 and such that a second input voltage may be multiplied by the complement factor (1−r). By com... | 07/18/2006 |
| 7061300 | Low supply voltage analog multiplier The invention relates to a low supply voltage analog multiplier which comprises a pair of differential cells, each cell comprising a pair of bipolar transistors with coupled emitters. A first transistor of each cell receives an input signal on its base terminal and ... | 06/13/2006 |
| 7062247 | Active double-balanced mixer The present invention describes active double-balanced mixers. The mixers use an isolation and matching section that provides RF section input matching and superior isolation between the LO and RF port. The mixers can be implemented using an inexpensive semiconducto... | 06/13/2006 |
| 7024448 | Multiplier A multiplier having a simple constitution, excellent performance with respect to high-frequency characteristics and distortion characteristics, and allows low-voltage operation. Transistor Q11, resistors R11 and R12 form a common-emitter circuit... | 04/04/2006 |
| 7020675 | Multiplier using MOS channel widths for code weighting A multiplier includes an input stage to receive input signals to provide currents at a plurality of source nodes. An output stage includes a plurality of transistors groups, each of the transistor groups has a plurality of binary weighted transistor pairs. A select ... | 03/28/2006 |
| 7020676 | Non-reciprocal network element that produces an input impedance that is a product of its load impedances The Impedance Product Operator can be implemented in a number of embodiments to produce a new non-reciprocal (n+1)-port network element with the distinguishing property that if n 2-termial impedances, Z2, . . . Zn+1 are connected at ports 2, . ... | 03/28/2006 |
| 7010563 | Multiplier with output current scaling A multiplier includes an input stage to receive input signals to provide currents at a plurality of source nodes. An output stage includes a plurality of transistor groups, each of the transistor groups includes a plurality of transistor pairs. The values of current... | 03/07/2006 |
| 7009442 | Linear multiplier circuit A linear multiplier circuit comprises a first, a second, a third and a fourth transistor, each having a drain, a source, a gate and substantially an identity threshold voltage. Each of these four transistors operates with a fixed drain-to-source voltage applied betw... | 03/07/2006 |
| 6975693 | Approximating signal power and noise power in a system An electronic system with power approximation for circuit savings. Power approximation is provided by means for generating an absolute value of a real part of a signal, means for generating an absolute value of an imaginary part of the signal, means for generating a... | 12/13/2005 |
| 6970900 | Optical system for certain mathematical operations An optical system utilizing phosphors to perform mathematical operations without the direct or necessary use of an electronic component or electrical power source is disclosed. The luminenscent and quenching properties of phosphors are combined with at least one fir... | 11/29/2005 |
| 6967908 | Optical pickup device with focus error detecting optical element and method for focus error detection An optical pickup device for focusing a light beam includes a focus error detecting optical element which splits and leads return light to a photodetector. The focus error detecting element has an area quadrisected by two division lines defining a plane substantiall... | 11/22/2005 |
| 6940920 | Multiplier arrangement, signal modulator and transmitter A multiplier arrangement (MUXER) is adapted to generate from analog phase information and from high-frequency local oscillator signals, components of a high-frequency phase vector (PV), and to synthesise said high-frequency phase vector (PV) from said components wit... | 09/06/2005 |
| 6674921 | Method of image sampling and apparatus thereof A method of image sampling and an apparatus thereof. The apparatus comprises: an adder; a first register, the output of which is fed back to the adder; a first multiplexer, which outputs a ratio or a weighted parameter; a multiplier, which receives an inp... | 01/06/2004 |
| 6647406 | Sum of product circuit and inclination detecting apparatus A sum of product circuit (20) which adds up two input voltages, each of which is multiplied by the prescribed coefficients. The sum of product circuit (20) has a .nu. MOS transistor (50), a first and a second capacitance (C1, C2), and an output terminal (... | 11/11/2003 |
| 6584486 | Method for mathematically processing two quantities in an electronic circuit The method serves to add at least two values by means of a circuit. Both input values and output values are represented in differential form, either as a pair of voltages or as a pair of currents. The circuit consists of four transistors; it has a pair of... | 06/24/2003 |
| 6282559 | Method and electronic circuit for signal processing, in particular for the computation of probability distributions A circuit module for data processing comprises several first inputs (Ix,i), several second inputs (Iy,i) and several outputs (Ii,j). First transistors (Ti,j) combine the first and second inputs. Each of the firs... | 08/28/2001 |
| 6074082 | Single supply analog multiplier An analog multiplier includes a new circuit topology, which includes coupling an amplifier between the collector of one of the input transistors and the bases of the other two input transistors. The amplifier used in the new topology is a double emitter-f... | 06/13/2000 |
| 5958002 | Vector absolute--value calculation circuit A highly accurate vector absolute-value calculation circuit uses analog processing and minimal hardware. Signal voltages corresponding to an I component (real number part) and a Q component (imaginary number part) are input to a first absolute-value calcu... | 09/28/1999 |
| 5931899 | Method and apparatus for providing analog differential signal multiplication with a substantially linear response over a relatively large range of multiplication A signal multiplier is provided for use in multiplying an analog differential signal. The analog differential signal is defined by a first analog attribute and a second analog attribute. Preferably, a means is provided for generating a first current which... | 08/03/1999 |
| 5926408 | Bipolar multiplier with wide input voltage range using multitail cell A bipolar four-quadrant analog multiplier that is formed on a semiconductor integrated circuit device and is capable of low-voltage operation at a voltage as low as 1 V while the input voltage range providing a good linearity is enlarged. This multiplier ... | 07/20/1999 |
| 5925094 | Analog multiplier using triple-tail cell An analog multiplier that decreases the circuit current consumption is provided. This multiplier includes a first triple-tail cell of first, second, and third transistors driven by a first tail current, and a second triple-tail cell of fourth, fifth, and ... | 07/20/1999 |
| 5912834 | Bipolar translinear four-quadrant analog multiplier A bipolar analog multiplier is provided, which is capable of complete four-quadrant multiplication operation. This multiplier has a quadritail cell serving as a multiplier core circuit, and an input circuit. In the input circuit, first and second linear V... | 06/15/1999 |
| 5907496 | Multiplication and addition circuit A multiplication and addition circuit multiplies each of a plurality of analog voltages by a corresponding digital multiplier and then adds up the products. First, each bit corresponding to each of the multipliers is multiplied with the corresponding anal... | 05/25/1999 |
| 5905666 | Processing system and method for performing sparse matrix multiplication by reordering vector blocks A method, system, and data structure are provided which facilitate matrix multiplication with advantageous computational efficiency. The invention, as variously implemented as a processing system, method, or data structure in a recording medium such as a ... | 05/18/1999 |
| 5886916 | Analog multiplier In an analog multiplier of the present invention, in an input portion for feeding a differential current to the common emitter of each of a first and a second differential pair, the differential current is turned back by a current mirror circuit. This all... | 03/23/1999 |
| 5877974 | Folded analog signal multiplier circuit A four-quadrant analog signal multiplier circuit with a folded cascode differential input stage allows such circuit to be operated at lower power supply voltage potentials, while allowing the same transistor types to be used for both sets of input signals... | 03/02/1999 |
| 5784309 | Optical vector multiplier for neural networks An optical vector multiplier can perform linear algebra calculations by using electro-optical modulators of sandwich-type construction or in liquid crystal fields such as occur, inter alia, in the case of neural networks. It can calculate linear algebra o... | 07/21/1998 |
| 5764559 | Bipolar multiplier having wider input voltage range In a bipolar multiplier for multiplying a first input signal and a second input signal, the bipolar multiplier comprises a quadritail cell including two transistor pairs driven by a common tail current. A conversion circuit is connected to an input side o... | 06/09/1998 |
| 5751624 | Complex number calculation circuit A complex number calculation circuit for directly multiplying a complex number of an analog signal by a digital complex number as a multiplier. A capacitive coupling is used with a plurality of parallel capacitances corresponding to weights of bits of rea... | 05/12/1998 |
| 5712810 | Analog multiplier and multiplier core circuit used therefor A multiplier core circuit having a novel circuit configuration, which is preferable for LSI. The circuit contains a quadritail circuit formed of first, second, third and fourth transistors whose emitters or sources are coupled together. Collectors or drai... | 01/27/1998 |
| 5668750 | Bipolar multiplier with wide input voltage range using multitail cell A bipolar four-quadrant analog multiplier that is formed on a semiconductor integrated circuit device and is capable of low-voltage operation at a voltage as low as 1 V while the input voltage range providing a good linearity is enlarged. This multiplier ... | 09/16/1997 |
| 5619444 | Apparatus for performing analog multiplication and addition Apparatus for performing analog multiplication of a first value by a second value, including: 1) a variable capacitor whose capacitance represents the first value and 2) a second value voltage receiver, serially connected to the variable capacitor, wherei... | 04/08/1997 |
