Class 708/673 - Radix correction

Subclass of Class 708 - Electrical computers: arithmetic processing and calculating
Definition: Subject matter for correction for a change in radix.
No. of patents: 26
Last issue date: 07/12/2005

Number	Title	Issue Date
6918024	Address generating circuit and selection judging circuit An address generating circuit, in which address generation by a modulo addition is executed at high speed, is provided. The address generating circuit makes, a two input adder that adds an address and a renewing step, a three input adder and subtracter that adds the...	07/12/2005
6292819	Binary and decimal adder unit A binary and decimal adder unit uses a pre-sum logic for generating pre-sums of the operands A, B under the presumption of one and zero carry inputs into the decimal digit position, and also uses a digits carry network for generating binary carries within...	09/18/2001
5928319	Combined binary/decimal adder unit A combined binary/decimal adder unit reduces the operation delay ine processing binary coded decimal operands and permit an increased cycle rate of a processor unit in which the combined binary/decimal adder unit is utilized. Pre-sums are generated for ea...	07/27/1999
5912831	Process and system for adding or substracting symbols in any base without converting to a common base A process and system for effecting addition and/or subtraction any two symbols having any number of characters and in any base with full precision and without first converting to a common base. Regardless of the quantity of characters of each symbol, the ...	06/15/1999
5884092	System for maintaining fixed-point data alignment within a combination CPU and DSP system In microcomputers and digital signal processors in which a central processing unit for controlling the entire system and a digital signal processing unit having a product sum function required to process digital signals efficiently are mounted on one and ...	03/16/1999
5745399	Decimal arithmetic apparatus and method An apparatus for adding two BCD numbers, avoids the need for special adders with detection of carries between BCD digits. First, a sum without carries is generated, by forming the binary sum of the two numbers and an all-sixes pattern, without any carries...	04/28/1998
5673216	Process and system for adding or subtracting symbols in any base without converting to a common base A process and system for effecting addition and/or subtraction any two symbols having any number of characters and in any base with full precision and without first converting to a common base. Regardless of the quantity of characters of each symbol, the ...	09/30/1997
5668892	Table recognition apparatus A table recognition apparatus for recognizing a table image wherein coexist characters and ruled lines. The apparatus comprises a character/ruled line separating part for separating characters from ruled lines in the table image; a character block extract...	09/16/1997
5668989	Two-digit hybrid radix year numbers for year 2000 and beyond A method and related input/output devices for using biased 2 digit "hybrid radix" numeric fields for inputting, generating, storing, processing, and outputting year numbers ranging from 1900 to 2059 in a data processing system. In a hybrid radix 2 digit y...	09/16/1997
5148480	Decoder A decoder having a plurality of outputs (R0 -Rn) each associated with a particular output valve is arranged to add together two binary numbers (A, B) and to select one of the outputs in dependence on the result of the sum. The decoder comprises...	09/15/1992
5146423	Circuit arrangement for adding or subtracting operands coded in BCD-code or binary-code It is possible to add or subtract operands coded in binary coded decimal (BCD) code or in the binary code with the circuit arrangement upon employment of a single binary adder. In order to enable BCD operations, the BCD operations are supplied to the bina...	09/08/1992
5007010	Fast BCD/binary adder A fast BCD/Binary Adder in which provision is made for selectively performing either binary or BCD arithmetic operations using an approach in which, for BCD addition, an appropriate correction value is always caused to be added to one of the input operand...	04/09/1991
4805131	BCD adder circuit The binary coded decimal (BCD) adder circuit for adding two BCD encoded operands and for producing a BCD encoded sum includes a bank of parallel full adder circuits as a first stage which generate an intermediate sum vector and an intermediate carry vecto...	02/14/1989
4718033	Intermediate decimal correction for sequential addition Apparatus is provided to restore an excess six correct to every digit of an intermediate result which did overflow during the previous addition operation during a sequence of repeated BCD addition operations. A carry register is defined to store and feedb...	01/05/1988
4707799	Bit sliced decimal adding/subtracting unit for multi-digit decimal addition and subtraction A bit sliced decimal adding/subtracting unit includes an 8-digit decimal adder/subtracter and an offset data generator. In the 8-digit decimal adder/subtracter, eight 1-digit decimal adder/subtracters are intercoupled so as to allow a carry to propagate f...	11/17/1987
4441159	Digital adder circuit for binary-coded numbers of radix other than a power of two A digital adder circuit for binary-coded-decimal operation, comprising a set of multiplexers (11) which are conditioned with a pattern of input bits causing them to form an intermediate result (IR) equal to the sum of the two operands (A0-A3, B0-B3) plus ...	04/03/1984
4245328	Binary coded decimal correction apparatus for use in an arithmetic unit of a data processing unit Binary coded decimal operands may be operated on by use of a binary arithmetic logic unit and the result corrected to provide a binary coded decimal result by use of correction logic which is responsive to the result produced by the binary arithmetic logi...	01/13/1981
4197587	Correction circuit for arithmetic operations with non-hexadecimal operands in hexadecimal arithmetic units A correction circuit for arithmetic operations with non-hexadecimal operands in hexadecimal arithmetic units incorporates a full hexadecimal adder for each four-bit word of the operands, a carry storage register coupled to a carry output of the full adder...	04/08/1980
4172288	Binary or BCD adder with precorrected result An adder provides either binary or binary coded decimal operation under the selection of a control input. The data inputs are a pair of four bit operands and a carry in for providing an additional capability of greater than four bits. Outputs, in addition...	10/23/1979
4100603	Feet, inches and sixteenths adder An electronic adding machine for adding and subtracting feet, inches, and sixteenths inch has a hexadecimal keyboard with the decimal keys 0-9 contrasting with the six other keys 10-15. Each addened and subtrahend applied to the keyboard is encoded in bin...	07/11/1978
4041290	Microprogram controlled binary decimal coded byte operator device A microprogram controlled operator device is described which processes bytes each of which is comprised of an equal number of binary-coded decimal figures. The device comprises first and second byte stores each of a multi-byte capacity, a logical and arit...	08/09/1977
4001567	BDC corrected adder A BCD corrected serial adder includes an adder circuit and an asynchronous programmable logic array (PLA) connected to an output of the adder circuit. Whenever the sum of two bytes exceeds the decimal number 9 in the addition mode, the PLA simultaneously ...	01/04/1977
4001570	Arithmetic unit for a digital data processor A digital arithmetic unit for adding and subtracting multidigit binary coded decimal numbers having a zoned format. Such adding and subtracting is done by means of a parallel binary adder of a type suitable for handling pure binary numbers and having no s...	01/04/1977
3991307	Integrated circuit microprocessor with parallel binary adder having on-the-fly correction to provide decimal results Disclosed is an integrated circuit microprocessor with a parallel binary adder whose output can be corrected on-the-fly to provide decimal results. The correction is by logical gating which operates selectively and on-the-fly, that is, while the sum from ...	11/09/1976
3958112	Current mode binary/BCD arithmetic array An arithmetic logic array employing soft-saturating current mode logic gates operates on pure binary data or binary coded decimal data. Two 4-bit data inputs are received along with a 5-bit Op code, a carry input, and decimal arithmetic operation signals....	05/18/1976
3935438	Decimal adder A decimal adder has plural arithmetic stages, each for generating one new bcd digit, and a controller for all stages. Each stage has three, four-stage binary adders one as input receiver for one input bcd digit, one main adder and one as output corrector....	01/27/1976

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Class 708/673 - Radix correction