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| Number | Title | Issue Date |
| 4179746 | Digital processor system with conditional carry and status function in arithmetic unit An electronic digital processor fabricated on a single MOS/LSI semiconductor chip includes an arithmetic unit operating on digits one at a time, with a carry output and a carry input. Commands for operating the processor are produced by decoding instructi... | 12/18/1979 |
| 4164039 | Programmable calculator including a key for performing either a subtraction or a unary minus function An adaptable programmable calculator is provided by employing modular read-write and read-only memory units capable of being expanded to provide the calculator with additional program and data storage functions oriented towards the environment of the user... | 08/07/1979 |
| 4159529 | Fibonacci code adder A Fibonacci code adder comprising an n-digit half-adder which includes at least two inputs through which addends of numbers represented in the Fibonacci code minimal form are introduced and also includes intermediate sum and carry outputs coupled to analo... | 06/26/1979 |
| 4091452 | CVSD digital adder A first plurality of D-type flip flops are connected in cascade to store successively a plurality of different adjacent CVSD bits of a first of two CVSD bit streams. A second plurality of D-type flip flops store successively a plurality of different adjac... | 05/23/1978 |
| 4058714 | Selectively operated, clock-controlled repetitive calculator A portable calculator which performs selected arithmetic computations including addition, subtraction, multiplication and division includes a selectively operative clock circuit. When activated, the clock circuit repetitively performs the preselected math... | 11/15/1977 |
| 4015107 | Weighted pulse signal count system Pulse signals of different weights are introduced from different input terminals into the present count system in a parallel fashion, respectively. Each number of the pulse signals of different weights are counted in a binary code notation. There is provi... | 03/29/1977 |
| 4012714 | Comparator circuit for two N-digit binary codes, in particular binary numbers A comparator circuit for two multi-digit binary codes, particularly binary numbers, in which a series circuit is formed by n number of majority decision elements connected in series, each of which has three inputs, the characteristic information of the fi... | 03/15/1977 |
| 4010359 | Circuit arrangement for adding and subtracting A circuit arrangement for selectively adding or subtracting two binary coded decimal numbers exclusively by means of addition operations, in which addition involves adding a binary coded decimal value corresponding to the decimal value "6" to each digit o... | 03/01/1977 |
