Class 708/650 - Division

Subclass of Class 708 - Electrical computers: arithmetic processing and calculating
Definition: Subject matter wherein the arithmetic operation performed
No. of patents: 194
Last issue date: 08/02/2011

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Number	Title	Issue Date
5442581	Iterative division apparatus, system and method forming plural quotient bits per iteration An iterative division technique which forms plural quotient bits per iteration. A data processing apparatus (1100) includes a first register (1101) storing the divisor, a second register initially storing the numerator (1103), a plurality of full adders (...	08/15/1995
5426600	Double precision division circuit and method for digital signal processor An arithmetic operation execution unit includes a plurality of 2N bit data registers and an arithmetic logic unit (ALU). The execution unit is coupled to data busses each having a data path width of N bits for transferring data to and from the data regist...	06/20/1995
5416733	Apparatus for finding quotient in a digital system A fast divider is disclosed in the present invention. It utilizes a division method which uses a smaller quotient digit set of {-1, 1} than {-1, 0, 1} that used by known algorithms, therefore accelerates the speed of calculation. Partial remainders are co...	05/16/1995
5404324	Methods and apparatus for performing division and square root computations in a computer An apparatus for performing floating-point division and square root computations according to an IEEE rounding standard includes input data alignment circuitry, core iteration circuitry, remainder compare circuitry, and round and select circuitry. The cor...	04/04/1995
5396502	Single-stack implementation of a Reed-Solomon encoder/decoder The present invention is for a Error Correction Unit (ECU) that uses a single stack architecture for the generation, reduction and evaluation of the polynomials involved in the correction of a Reed-Solomon code. The circuit uses the same hardware to gener...	03/07/1995
5379243	Method and apparatus for performing finite field division An apparatus and method are provided for simplifying a finite field division, including inputs for the initial condition signals a(x), b(x), and p(x), and providing at an output node the signal c(x), where c(x)=a(x)/b(x) without intermediate inverter circ...	01/03/1995
5377134	Leading constant eliminator for extended precision in pipelined division A method for performing a division operation in a two-stage multiply pipeline apparatus by forming an approximate reciprocal R0 of the divisor D0, and calculating a first error term R1 by the equation R1 =1-R	12/27/1994
5367479	Divider device to divide a first polynomial by a second one The divider device is used in a digital communication network to detect bit errors by dividing a first polynomial corresponding to a first bit sequence by a second polynomial, called a generator polynomial, represented by a second bit sequence. The device...	11/22/1994
5367478	Mutual division circuit A mutual division circuit which can reduce a circuit scale thereof considerably and which can also be operated at high speed to thereby increase a throughput considerably. A switching instruction which selects either a normal connection or cross connectio...	11/22/1994
5339267	Preprocessor of division device employing high radix division system A preprocessor of a division device employing a high radix division system includes a first zero counter, a first shifter, a second counter, a latch, and a second shifter. From among continued "0" bits at the heads of a divisor and a dividend, the number ...	08/16/1994
5329476	Method and apparatus for early quotient completion in arithmetic division Apparatus and methods for early quotient completion in arithmetic division include a quotient digit generator, one or more asynchronous shift registers and a remainder comparison block. As quotient digits are generated, each digit is transferred to a diff...	07/12/1994
5315540	Method and hardware for dividing binary signal by non-binary integer number A binary signal hardware divider and method are described for a high performance computer graphics system. Each bit of an input binary signal to be divided by an integer number of a non-binary power is associated with a predetermined binary weight compris...	05/24/1994
5313415	Method and apparatus for performing floating point arithmetic operation and rounding the result thereof An approximate solution Ya of a function F with respect to a given value X is derived by referring to a relation Y=F(X) at an accuracy at which an error between the approximate solution Ya and an infinitely precise solution Y is smaller than a weight of a...	05/17/1994
5311460	Method and apparatus for performing high speed divide operations A method and circuit for calculating the quotient, and remainder terms of a division operation. The circuit includes a plurality of identical stages repeated for each binary bit of the dividend. Each stage receives a single data bit from the dividend, and...	05/10/1994
5309385	Vector division processing method and system In vector dividing the process employing convergence division method, the process steps are performed for performing pipeline processing of multiplying operation of the dividend and a first convergence factor in a speed of one clock cycle per one element ...	05/03/1994
5309383	Floating-point division circuit A floating-point division circuit for performing division on floating-point data using a non-recovery type division method is disclosed. The floating-point division circuit includes a circuit portion for conducting a pre-division processing and pattern de...	05/03/1994
5293558	Multiplication, division and square root extraction apparatus A multiplication, division and square root extraction apparatus which calculates the solutions to addition, division and square root extraction functions by approximation using iteration has a multiplier, an adder-subtracter and a shifter of prescribed bi...	03/08/1994
5272660	Method and apparatus for performing integer and floating point division using a single SRT divider in a data processor A method and apparatus for performing integer and floating-point divide operations using a single modified SRT divider in a data processor. The floating-point and integer division is performed using SRT division on normalized positive mantissas (dividend ...	12/21/1993
5214599	Advanced dimensional processing with division The invention comprises a multi-dimensional array having an inverted, self-pruning binary tree architecture. The array is capable of doing comparative and computational tasks in one clock cycle of computer operation. The computational results of the inven...	05/25/1993
5206826	Floating-point division cell A floating-point division cell consisting of partial remainder data register for storing parallel-partial-remainder data or third partial remainder data, divisor data register for storing parallel-divisor data or third divisor data, low-order divisor data...	04/27/1993
5206828	Special carry save adder for high speed iterative division A special carry save adder includes structure for performing multiple addition operations, common input structure to the structure for performing multiple addition operations, and mixing structure for selecting the desired result of the multiple addition ...	04/27/1993
5179659	Method and apparatus for deriving instantaneous reciprocals of the homogenous coordinate w for use in defining images on a display An adaptive forward differencing apparatus, wherein, when rendering curves, calculated x, y values are increased or decreased in order to create values which correspond to the next pixel of the display CRT, such that curves of substantially one pixel incr...	01/12/1993
5140544	Divide-by-five divider A video display system includes a frame buffer includes five sets of one or more video random access memories. An address generator for generating address locations in the frame buffer generates ship select, row select and column select address signals. B...	08/18/1992
5134578	Digital signal processor for selectively performing cordic, division or square-rooting procedures A bit-serial processor for selectively carrying out the sequential steps of performing by successive approximations Coordinate Rotation Digital Computation (CORDIC), non-restoring division or non-restoring square rooting calculations is suitable for inclu...	07/28/1992
5132925	Radix-16 divider using overlapped quotient bit selection and concurrent quotient rounding and correction A radix-16 divider, generally including two improved radix-4 dividers cascaded combinatorially, also utilizes improved overlapping quotient bit selection, together with concurrent quotient bit selection and rounding techniques, to produce four bits of quo...	07/21/1992
5132924	Electronic computer capable of repeatedly displaying the results of a quotient/remainder calculation An improved electronic computer which can produce a quotient/remainder calculation. The computer has first and second memories for storing respectively a dividend and a divisor which are input for execution of division. A quotient/remainder calculation is...	07/21/1992
5105378	High-radix divider A dividend or partial remainder is stored in a partial remainder register. An output of the partial remainder register is shifted to the left by a radix which uses the power of 2 and is larger than 2. A divisor is stored in a divisor register. Comparison ...	04/14/1992
5047973	High speed numerical processor for performing a plurality of numeric functions Division and square root calculations are performed using an operand routing circuit (16) for receiving an operand N, and operand D and a seed value S and directing the operands and seed value to a multiplier (38). Single multiplier (38) is configured int...	09/10/1991
5023890	Digital peak noise reduction circuit A digital peak noise reduction circuit for reducing peak noise of an input digital signal having variable levels corresponding to a predetermined sound volume range. The circuit includes a division circuit for dividing the level of the input signal; a ROM...	06/11/1991
5023827	Radix-16 divider using overlapped quotient bit selection and concurrent quotient rounding and correction A radix-16 divider, generally comprising two improved radix-4 dividers cascaded combinatorially, also utilizes improved overlapping quotient bit selection, together with concurrent quotient bit selection and rounding techniques, to produce four bits of qu...	06/11/1991
5020017	Method and apparatus for obtaining the quotient of two numbers within one clock cycle A divider circuit for producing a quotient result within one cycle time is provided. The invention utilizes combinational circuitry for performing a division operation by computing a scaled reciprocal of the denominator, and multiplying the scaled output ...	05/28/1991
5001664	Dividing circuit calculating a quotient of K m-ary digits in K machine cycles For dividing a dividend of a first plurality of m-ary digits by a divisor of a second plurality of m-ary digits to provide a certain number K of m-ary quotient digits, where m represents 2N, a shift register comprises a most significant part, f...	03/19/1991
4996660	Selection of divisor multipliers in a floating point divide circuit A multiple selector logic circuit for selecting divisor multiples in 2-bit, non-restoring divide sequences, which provides a proper and accurate quotient result and remainder, and which produces rounding and indication of exact or inexact result in confor...	02/26/1991
4994995	Bit-serial division method and apparatus A bit-serial division method for computing the value v/u, where v and u are each n-bit vectors that are elements in a finite Galois field GF(2n) consisting of 2n elements. The n-bit components of each element in the field are coordin...	02/19/1991
4992969	Integer division circuit provided with a overflow detector circuit An integer division circuit performs a division operation on a dividend and a divisor each accomplished with sign information. The circuit includes a first latch circuit for temporarily storing, as sign control data, exclusive-OR operation data of the sig...	02/12/1991
4992968	Division method and apparatus including use of a Z--Z plot to select acceptable quotient bits An optimized division circuit and a method of implementing the circuit includes the steps of determining a Z--Z plot relationship which represents a relationship between a first divisor ratio proportional to a range of previously determined remainder valu...	02/12/1991
4979139	Arithmetic unit for exponential function An arithmetic unit for carrying out sequentially arithmetic pseudo division and reverse-sequentially pseudo multiplication according to algorithm based on Sequential Table Look-up method utilizing constant values 2k xloge (1+2-k) so ...	12/18/1990
4949295	Transformation of divisor and dividend in digital division A method to adjust the divisor and dividend, for application to a divider, so that the mantissa part of the divisor is transformed to be within a known limited range. The limiting of the transformed divisor range enables the complexity of the quotient sel...	08/14/1990
4941118	Division circuit having an operation loop including an adder and multiplier A division circuit for calculating a division between a dividend and a divisor. The division circuit includes a first input circuit for receiving the dividend, a second input circuit for receiving the divisor, an adder coupled at its first input terminal ...	07/10/1990
4881193	Rational number operation unit for reduction A rational number operation unit comprising division means which receives a rational number having numerator and denominator to be reduced for sequentially determining terms d1, d2, . . . of a continued fraction for the rational numb...	11/14/1989

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Class 708/650 - Division