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| Number | Title | Issue Date |
| 4686645 | Pipelined systolic array for matrix-matrix multiplication A digital data processor for matrix/matrix multiplication includes a systolic array of nearest neighbor connected gated full adders. The adders are arranged to multiply two input data bits and to add their product to an input cumulative sum bit and a carr... | 08/11/1987 |
| 4682302 | Logarithmic arithmetic logic unit In a digital signal processing system, a logarithmic arithmetic logic unit is provided which selectively performs multiply/accumulate operations of operands in logarithmic number representation. Direct feed through of operands through an adder/subtractor ... | 07/21/1987 |
| 4679164 | Digital high speed programmable convolver A circuit module rapidly calculates a discrete numerical convolution. A convolution such as finding the sum of the products of a 16 bit constant and a 16 bit variable is performed by the module which is programmable so that the constant may be changed for... | 07/07/1987 |
| 4644491 | Sign generation system for a carry save adder A sign generation system having a plurality of carry save adders. When adding a sum and a carry generated by a carry save adder in a next stage carry save adder, a full sum of two-bit sign fields adjacent to data fields of the sum and the carry is calcula... | 02/17/1987 |
| 4639857 | Digital data processor incorporating an orthogonally connected logic cell array The invention provides a digital data processor which has been systemetized down to bit level. The processor includes a regular array of identical processing cells which perform a logic operation on incoming bits. The cells repeatedly perform a cell opera... | 01/27/1987 |
| 4615016 | Apparatus for performing simplified decimal multiplication by stripping leading zeroes Processor apparatus is described for performing binary and decimal arithmetic operations. In performing decimal multiplication with the processor apparatus, to reduce the amount of processing to be done with the apparatus and thereby speed up the performa... | 09/30/1986 |
| 4604722 | Decimal arithmetic logic unit for doubling or complementing decimal operand A data processing system having a central processing unit (CPU) capable of performing binary and decimal arithmetic software instructions is described. The CPU includes a microprocessor which executes the binary arithmetic software instructions under firm... | 08/05/1986 |
| 4594679 | High speed hardware multiplier for fixed floating point operands A high speed multiplier unit for multiplying both fixed point and floating point operands is disclosed and claimed. This multiplier unit is a system level functional unit which allows floating point and fixed point operations to be performed directly. In ... | 06/10/1986 |
| 4589085 | Hardware multiplier processor A hardware processor is disclosed which in the described embodiment is a memory mapped multiplier processor that can operate in parallel with a 16 bit microcomputer. The multiplier processor decodes the address bus to receive specific instructions so that... | 05/13/1986 |
| 4566075 | Table lookup multiplier employing compressed data read only memory A multiplier circuit including a read-only memory containing a table of products for digits of a multiplicand and multiplier. The multiplier circuit will produce the product when a multiplicand digit and a multiplier digit are input. The contents of the m... | 01/21/1986 |
| 4538239 | High-speed multiplier for microcomputer used in digital signal processing system A system for real-time digital signal processing employs a single-chip mircocomputer device having separate on-chip program ROM and data RAM, with separate address and data paths for program and data. An external program address bus allows off-chip progra... | 08/27/1985 |
| 4495592 | Electronic data processing apparatus with equation operating system having implied multiplication of two hierarchical ranks The equation operating system is an improved data and command entry format together with a compatible operation system for use with electronic data processing apparatuses, most particularly with scientific calculators which provide an alphanumeric display... | 01/22/1985 |
| 4489393 | Monolithic discrete-time digital convolution circuit A monolithic convolver circuit making extensive use of "pipelined" architecture to ensure high speed by concurrency of processing, and having a repetitive stage to facilitate chip layout and manufacture. The circuit includes a multiplier and an adder in e... | 12/18/1984 |
| 4484259 | Fraction bus for use in a numeric data processor A floating point, integrated, arithmetic circuit is organized around a file format having a floating point numeric domain exceeding that of any single or double precision floating point numbers, long or short integer words of BCD data upon which it must o... | 11/20/1984 |
| 4357674 | PCM Signal calculator A PCM signal calculator for non-linear encoded PCM signals in the A-law system or μ-law system having a sign bit and a plurality of absolute value bits with three bits of segment number and four bits of step numbers within segment comprises; (a) a pair o... | 11/02/1982 |
| 4297744 | Process and device for multiplying a stochastic value by a coefficient greater than the unit The invention relates to a process for multiplying a stochastic value at the most equal to 0.5, by a number 1+K, with 0 | 10/27/1981 |
| 4205303 | Performing arithmetic using indirect digital-to-analog conversion Circuitry and method for adding, subtracting, multiplying and/or dividing a plurality of multi-bit, arbitrarily signed, changeable, coded digital input signals representing numerical values to convert said signals into a single analog output signal of pre... | 05/27/1980 |
| 4181967 | Digital apparatus approximating multiplication of analog signal by sine wave signal and method A method and an apparatus are disclosed which employ digital techniques to approximate a multiplication of an analog signal by a sine wave of an appropriate frequency for detecting the analog signal. The analog signal is converted to a digital representat... | 01/01/1980 |
| 4158233 | Programmable calculator including means for performing implied multiply operations An adaptable programmable calculator is provided by employing a modular read-write and read-only memory unit capable of being expanded to provide the calculator with additional program and data storage functions oriented towards the environment of the use... | 06/12/1979 |
| 4118785 | Method and apparatus for digital attenuation by pattern shifting A digital attenuator is disclosed which is capable of having the output PCM signal attenuated nearly in proportion to the input PCM signal level based upon simple logic operations of where Pout = output PCM signal Pin = input PCM signal p... | 10/03/1978 |
| 4058714 | Selectively operated, clock-controlled repetitive calculator A portable calculator which performs selected arithmetic computations including addition, subtraction, multiplication and division includes a selectively operative clock circuit. When activated, the clock circuit repetitively performs the preselected math... | 11/15/1977 |
| 4025772 | Digital convolver matched filter and correlator A system for digital signal processing, including a random access memory (RAM) accessed by counters and used for storing and shifting signals in a convolver, correlator, matched filter or multiplier. An input signal and a reference signal are applied from... | 05/24/1977 |
| 4004140 | Digital attenuator A digital attenuator is disclosed which is capable of having the output PCM signal attenuated nearly in proportion to the input PCM signal level based upon simple logic operations of where Pout = output PCM signal Pin = input PCM signal p... | 01/18/1977 |
