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| Number | Title | Issue Date |
| 7372386 | Parallel digital-to-analog-converter A method for performing parallel digital-to-analog conversion of an n-bit digital input data signal at a frequency of fs including receiving the n-bit digital input data signal; generating M−1 delayed input data signals, M being the number of parallel c... | 05/13/2008 |
| 7359430 | CDMA multicode channel processing A demodulator such as a Fast Hadamard Transform (FHT) based demodulator is used to demodulate all channels in a code space with code length equal to the data channel code. Since the codes for overhead control channels are usually longer, the control channel data is ... | 04/15/2008 |
| 7318078 | System and method adapted to facilitate dimensional transform Systems and methods that facilitate dimensional transformations of data points are disclosed. In particular, the subject invention provides for a system and methodology that simplifies dimensional transformations while mitigating variations of a distance property be... | 01/08/2008 |
| 7284026 | Hadamard transformation method and device Input signals are transformed with an Hadamard transformation matrix in each of the four four-point Hadamard transformation units, wherein a rounding unit rounds up the least significant bit of each of the odd number of coefficients and discards the least significan... | 10/16/2007 |
| 7234100 | Decoder for trellis-based channel encoding A system and method for decoding a channel bit stream efficiently performs trellis-based operations. The system includes a butterfly coprocessor and a digital signal processor. For trellis-based encoders, the system decodes a channel bit stream by performing operati... | 06/19/2007 |
| 7188132 | Hadamard transformation method and apparatus The present invention provides a method and apparatus that transforms input signals X0, X1, X2, X3 using a 4-point Hadamard transform matrix, and of the resulting transformation data, rounds up the LSB of the first transformed data and ro... | 03/06/2007 |
| 7116698 | Generator of repetitive sets of spread spectrum sequences A generator of repetitive sets of spreading sequences comprising element (20), for counting and for forming an address and a table (30) containing L sets of S sequences, wherein the address contains q=1+log2S bits, in which one set among L (... | 10/03/2006 |
| 7031369 | Orthogonal code generating circuit An orthogonal code generating circuit 10 is arranged by a counter circuit unit 12, a combination circuit unit 14 of orthogonal codes, and a control circuit unit 16. Furthermore, the combination circuit unit 14 is constructed of an ... | 04/18/2006 |
| 7003536 | Reduced complexity fast hadamard transform A method and apparatus for performing a radix-4 fast Hadamard transform (FHT) with reduced complexity and for directly determining the maximum output of a fast Hadamard transform using either a radix-4 transform or radix-2 transform without actually generating the o... | 02/21/2006 |
| 6996163 | Walsh-Hadamard decoder In one embodiment, a Walsh-Hadamard decoder can have a hardware efficient Fast Hadamard Transform (“FHT”) engine. In one embodiment, the FHT engine can include an input to receive an input sequence to be decoded into a Walsh-Hadamard codeword. The FHT engine can... | 02/07/2006 |
| 6993541 | Fast hadamard peak detector A method and apparatus for performing a radix-4 fast Hadamard transform (FHT) with reduced complexity and for directly determining the maximum output of a fast Hadamard transform using either a radix-4 transform or radix-2 transform without actually generating the o... | 01/31/2006 |
| 6904445 | Method and device for calculating a discrete orthogonal transformation such as FFT or IFFT The invention comprises a method for calculating an orthogonal discrete transform on the basis of the DIT method in prescribed intermediate steps with the following steps: the data are read from a memory organized on page-for-page basis; the intermediate step prescr... | 06/07/2005 |
| 6766342 | System and method for computing and unordered Hadamard transform A system and method for parallel computation of the unordered Hadamard transform. The computing system includes a plurality of interconnected processors and corresponding local memories. An input signal x is received, partitioned into M1 sub-vectors x | 07/20/2004 |
| 6732130 | Fast hadamard transform device A fast Hadamard transform device is provided which prevent from increasing of circuit scale and shorten a developing TAT even if the number of bits to be operated. The device includes n of shift register units and n/2 of butterfly computation units. Input data are e... | 05/04/2004 |
| 6505224 | System and computer-implemented method for performing multi-stage fast Walsh transform A system for generating a Walsh transform output vector from an "N"-component input vector includes a vector store, a plurality of Walsh transform kernels and a control module. The vector store is configured to store the input vector The Walsh transform k... | 01/07/2003 |
| 6311202 | Hardware efficient fast hadamard transform engine A Fast Hadamard Transform apparatus having a plurality of transform stages, such as would be employed by a wireless telecommunication system for detecting and correcting errors that occur during the transmission of coded signal blocks, such as a Walsh cod... | 10/30/2001 |
| 6304196 | Disparity and transition density control system and method A system and method for encoding and decoding data utilizes Walsh-Hadamard Transforms and inversion techniques to generate the possible minimum disparity values for the data to be encoded. A minimum disparity value is then selected that also provides suff... | 10/16/2001 |
| 6115410 | Walsh code generator, signal transmitting apparatus and signal reception apparatus A Walsh code generator capable of performing signal processing at a high speed using the codewords of the Walsh code. A binary counter 3 generates a count signal counting upper (n-m) digits of a codeword number corresponding to a codeword of a Walsh code ... | 09/05/2000 |
| 6028889 | Pipelined fast hadamard transform A pipelined Fast Hadamard Transform ("FHT") architecture is disclosed that comprises log2 N identical pipeline stages, which are ideally suited for implementation in application-specific integrated circuits. One 2-port stage of the first illust... | 02/22/2000 |
| 6006246 | Method of and apparatus for multiplying matrix data A constant matrix [TS] is resolved into three constant matrices [TSC], [TSB], [TSA]. 1st~16th rows of the constant matrix [TSC] are calculated by a first stage of additions/subtractions (adders/subtractors 11 ~116) to which elements ... | 12/21/1999 |
| 5856935 | Fast hadamard transform within a code division, multiple access communication system In a receiver (10) of a code division multiple access system, a method of processing a received signal including reading a first and second data item from a first memory (50), at least one of the first and second data items associated with Walsh data; per... | 01/05/1999 |
| 5784293 | Apparatus and method for determining transmitted modulation symbols A receiver (100) employs an apparatus (109) and method (500) for determining transmitted modulation symbols contained in a received communication signal (127). Each of a plurality of memory locations (201-208) is loaded (503) with a binary representation ... | 07/21/1998 |
| 5729124 | Estimation of signal frequency using fast walsh transform A method of frequency estimation is disclosed which uses a Fast Walsh Transform (FWT) in place of a conventional Fast Fourier Transform (FFT) technique. The inventive method is based on a linear relationship between the unknown signal frequency and the se... | 03/17/1998 |
| 5726925 | Hadamard transformer using memory cell A Hadamard transformer is disclosed which uses memory cells in a digital signal processor for restoring to the original signals at a receiving end from the signals which have been transformed to a Hadamard function sequenced at a transmitting end. The Had... | 03/10/1998 |
| 5644523 | State-controlled half-parallel array Walsh Transform A matrix multiplier for performing a Fast Walsh Transform (FWT) is disclosed, based on Good's factorization of the FWT. The matrix multiplier has a plurality of N inputs for receiving N input signals. A first plurality of multiplexers is provided, which i... | 07/01/1997 |
| 5619270 | Sample rate converter and sample rate conversion method The invention is a sample rate converter, which converts input sample values of a signal digitized with a first predetermined clock frequency into desired sample values at a second virtual sample frequency, with a delay device, which delays the serial inp... | 04/08/1997 |
| 5574675 | State-controlled half-parallel array walsh transform A Fast Walsh Transform (FWT) processor is disclosed, based on Good's factorization, which reduces the number of adder/subtractor units to (N/2), where N is the dimension of the FWT. The process time is equal to 2p clock cycles, where p=the 2's power of N.... | 11/12/1996 |
| 5566100 | Estimation of signal frequency using fast walsh transform A method of frequency estimation is disclosed which uses a Fast Walsh Transform (FWT) in place of a conventional Fast Fourier Transform (FFT) technique. The inventive method is based on a linear relationship between the unknown signal frequency and the se... | 10/15/1996 |
| 5563818 | Method and system for performing floating-point division using selected approximation values A method and system for performing floating-point division of a dividend by a divisor within a floating-point unit having multiply and add functions are disclosed. In performing floating-point division, a quotient having a mantissa is produced. The method... | 10/08/1996 |
| 5454048 | Apparatus for multiplexed imaging using optically-generated Kronecker products A new type of fully-multiplexed imaging device is described for use at wavelengths where efficient focal plane array detectors are unavailable. It shares some properties in common with the familiar technique of cycle-redundancy (i.e. Hadamard transform) i... | 09/26/1995 |
| 5357454 | Fast walsh transform processor A processor for generating a Walsh transform by substantially simultaneously calculating M combinations of M input values, wherein M=2N and the input values are two's-complement binary values, has N stages electrically connected in sequence, wh... | 10/18/1994 |
| 5311176 | Method and apparatus for generating Walsh codes A method and apparatus is provided for generating Walsh codes. A first group of address signals is generated. Subsequently, inversion control signals are generated by logically gating the first group of address signals with a second group of address signa... | 05/10/1994 |
| 5235614 | Method and apparatus for accommodating a variable number of communication channels in a spread spectrum communication system A method and apparatus is provided for transmitting spread spectrum signals. The transmitter receives data symbols. Subsequently, the transmitter splits each particular set of two received data symbols into a first and second array of data symbols accordi... | 08/10/1993 |
| 5008848 | Circuit for performing S-transform An improved circuit for performing the S-transform and inverse S-transform on digital images. Data is fed back so that only one stage of adder/subtracters is required. The circuit elements have little idle time, making for efficient VLSI implementation.... | 04/16/1991 |
| 4892370 | Means and method for implementing a two-dimensional truth-table look-up holgraphic processor Algorithms and optical processor architectures for implementing a two-dimensional truth-table look-up processor are disclosed. An optical holographic medium stores the spectral expansion coefficients that map two-dimensional digital inputs of a binary tru... | 01/09/1990 |
| 4839844 | Orthogonal transformer and apparatus operational thereby Apparatus for obtaining an orthogonal transformer for use in signal analysis. This apparatus is especially useful in cepstral analysis where vocal tract characteristics of a signal are separated from a sound source. A buffer memory 10 temporarily stores i... | 06/13/1989 |
| 4673917 | Method and apparatus for minimizing digital-to-analog converter correction trims A method of calibrating a feed forward, DAC post-correction system. The method includes fitting the Walsh co-efficiencts of a DAC transfer function to a straight line in the log domain. The deviation of these terms in the log domain is utilized to compute... | 06/16/1987 |
| 4639857 | Digital data processor incorporating an orthogonally connected logic cell array The invention provides a digital data processor which has been systemetized down to bit level. The processor includes a regular array of identical processing cells which perform a logic operation on incoming bits. The cells repeatedly perform a cell opera... | 01/27/1987 |
| 4621337 | Transformation circuit for implementing a collapsed Walsh-Hadamard transform A unit transformation circuit transforms three discrete input signals into a set of transform coefficient signals characteristic of a "collapsed" Walsh-Hadamard transform. The unit transformation circuit includes two tiers of arithmetic networks. In the f... | 11/04/1986 |
| 4590608 | Topographic feature extraction using sensor array system A method and apparatus for topographic feature extraction by masking a video signal representation of an optical image using a two-dimension Walsh function is disclosed. The optical energy of an image is converted into a video signal. A Walsh function sig... | 05/20/1986 |
