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| Number | Title | Issue Date |
| 8166088 | Fast fourier transform processor An implement method of a FFT processor comprises the following steps. First, a 21 point FFT processor, which has an output and an input receiving a 2n+1 point data, is provided. A 2n-point FFT processor having an input and an output ... | 04/24/2012 |
| 8161089 | Method for detecting a broad class of signals in Gaussian noise using higher order statistics in both time and frequency domains An algorithm to detect a broad class of signals in Gaussian noise using higher-order statistics. The algorithm detects a number of different signal types. The signals may be in the base-band or the pass-band, single-carrier or multi-carrier, frequency hopping or non... | 04/17/2012 |
| 8145694 | Fast Fourier transformation circuit Provided is a fast Fourier transformation circuit capable of optimizing an operation resource while matching a plurality of communication systems. In this circuit, an FFT circuit (100) comprises a first FFT operation unit (110) for subjecting two-paral... | 03/27/2012 |
| 8126953 | Multi-port mixed-radix FFT A processor for performing a fast Fourier transform or inverse fast Fourier transform comprises a radix-2 butterfly structure; and a radix-4 butterfly structure. A method of performing a fast Fourier transform or inverse fast Fourier transform comprises selectively ... | 02/28/2012 |
| 8117250 | VDSL2 transmitter/receiver architecture The invention suggests a novel pipeline FFT/IFFT architecture that not only produces time-domain samples (after IFFT) but also pushes time-domain samples into FFT in a time-based sequential order. This reduces external memory requirement for buffering the time-domai... | 02/14/2012 |
| 8046398 | Method and apparatus for modulating symbols in an orthogonal frequency division multiplexing system and transmission apparatus using the same A method for modulating a symbol in a transmitter of an Orthogonal Frequency Division Multiplexing (OFDM) system. The symbol modulation method includes multiplying an input stream of an Inverse Fast Fourier Transform (IFFT) unit by a Twiddling factor for circular-sh... | 10/25/2011 |
| 8032576 | Fast fourier transform circuit and fast fourier transform method A fast Fourier transform circuit includes a computation component, an extraction component and a setting component. The extraction component, at each step of the computation, extracts, from computation result data points calculated by the computation component, data... | 10/04/2011 |
| 8001171 | Pipeline FFT architecture for a programmable device A pipeline Fast Fourier Transform (“FFT”) architecture for a programmable device is described. A first Radix-2 butterfly stage is coupled to receive a first input, configured to provide a first output responsive thereto, and configured to truncate at least one L... | 08/16/2011 |
| 7996454 | Method and apparatus for performing complex calculations in a multiprocessor array A method and apparatus for performing complex mathematical calculations. The apparatus includes a multicore processor 10 where the cores 15 are connected 20 into a net with the processors on the periphery 15a primarily dedicated to... | 08/09/2011 |
| 7996453 | Methods and apparatus for providing an efficient FFT memory addressing and storage scheme FFT butterfly data sets may be stored in memory in a predetermined order. Such an order may allow a butterfly data set to be read from a single memory address location. The memory addressed may be computed by an address rotary function depending on the butterfly and... | 08/09/2011 |
| 7979485 | Circuit for fast fourier transform operation A circuit for a fast Fourier transform (FFT) operation is provided. The FFT operation circuit includes a plurality of butterfly operation units connected in series. Each of the plurality of butterfly operation units reads a signal in the order in which the plurality... | 07/12/2011 |
| 7870177 | Method and system for multi-processor FFT/IFFT with minimum inter-processor data communication The embodiments of the present invention provide a scalable method for implementing FFT/IFFT computations in multiprocessor architectures that provides improved throughput by eliminating the need for inter-processor communication after the computation of the first ... | 01/11/2011 |
| 7856465 | Combined fast fourier transforms and matrix operations Embodiments of a hardware accelerator having a circuit configurable to perform a plurality of matrix operations and Fast Fourier Transforms (FFT) are presented herein. ... | 12/21/2010 |
| 7849123 | Pipeline-based reconfigurable mixed-radix FFT processor The present invention discloses a fast Fourier transform (FFT) processor based on multiple-path delay commutator architecture. A pipelined architecture is used and is divided into 4 stages with 8 parallel data path. Yet, only three physical computation stages are im... | 12/07/2010 |
| 7836116 | Fast fourier transforms and related transforms using cooperative thread arrays A linear transform such as a Fast Fourier Transform (FFT) is performed on an input data set having a number of points using one or more arrays of concurrent threads that are capable of sharing data with each other. Each thread of one thread array reads two or more o... | 11/16/2010 |
| 7831649 | Method for transforming data by look-up table Provided is a method for transforming data using a look-up table. The method includes the steps of: (a) mapping pre-processed input binary data to a constellation diagram divided into four quadrants to output a first complex number; (b) performing addition/subtracti... | 11/09/2010 |
| 7827225 | Methods and systems for a multi-channel Fast Fourier Transform (FFT) In at least some embodiments, a method is provided. The method includes receiving samples from a first input channel and a second input channel. The method further includes controlling commutators to selectively switch samples between the first and second input chan... | 11/02/2010 |
| 7818360 | Processor and method for performing a fast fourier transform and/or an inverse fast fourier transform of a complex input signal A processor for performing a Fast Fourier Transform and/or an Inverse Fast Fourier Transform of a complex input signal comprises a first stage for passing the input signal to a second stage when a Fast Fourier Transform procedure is to be performed and for swapping ... | 10/19/2010 |
| 7792892 | Memory control method for storing operational result data with the data order changed for further operation An FFT operational device includes memory banks, an FFT operational circuit, and an FFT memory control circuit. The memory banks can overwrite pieces of data to specified address locations simultaneously or read out the data from the locations simultaneously. The op... | 09/07/2010 |
| 7774397 | FFT/IFFT processor An FFT/IFFT processor having computation logic capable of processing butterfly operations, and storage for storing the operands of butterfly operations, including a mechanism for storing the operands of multiple consecutive butterfly operations in contiguous storage... | 08/10/2010 |
| 7752249 | Memory-based fast fourier transform device A memory-based Fast Fourier Transform device is provided, which adopts single-port random access memory (RAM), rather than dual-port RAM, as a storage, and the circuit area of the FFT device is therefore reduced. In order to enhance the access efficiency of the memo... | 07/06/2010 |
| 7739322 | Method and system for multi-processor FFT/IFFT with minimum inter-processor data communication The embodiments of the present invention provide a scalable method for implementing FFT/IFFT computations in multiprocessor architectures that provides improved throughput by eliminating the need for inter-processor communication after the computation of the first ... | 06/15/2010 |
| 7702713 | High speed FFT hardware architecture for an OFDM processor A novel technique for providing high speed FFT architecture for OFDM processors that reduces silicon area while maintaining the high speed requirement. In one example embodiment, this is accomplished by pipelined and/or sequential implementation of two or more FFT s... | 04/20/2010 |
| 7702712 | FFT architecture and method A Fast Fourier Transform (FFT) hardware implementation and method provides efficient FFT processing while minimizing the die area needed in an Integrated Circuit (IC). The FFT hardware can implement an N point FFT, where N=rn is a function of a radix (r).... | 04/20/2010 |
| 7693924 | 2N-point and N-point FFT/IFFT dual mode processor A 2N-point and N-point FFT/IFFT dual mode processor is provided. The processor includes a butterfly operator, the first and second MUXs, and the first and second N-point FFT processors. The butterfly operator receives 2N data and butterfly-operates on the received 2... | 04/06/2010 |
| 7680870 | FFT apparatus for high data rate and method thereof An FFT apparatus for quickly processing input signals and method thereof is disclosed. In performing the FFT for processing N input signals, four N/4-point FFT units implemented by radix-2 single-path delay feedback (R2SDF) units performs the FFT with respect to the... | 03/16/2010 |
| 7676533 | System for executing SIMD instruction for real/complex FFT conversion An FFT conversion instruction based on a single instruction multiple data (“SIMD”) technique is executed to reduce the number of cycles for software to perform conversion processing used in an FFT computation. In an embodiment, the FFT conversion instruction imp... | 03/09/2010 |
| 7657587 | Multi-dimensional fast fourier transform A multi-dimensional FFT is calculated upon 2n rows of 2m data values set out end-to-end in memory by traversing the data set as a whole using stride values and block sizes which halve upon each pass through the data. As the data values represen... | 02/02/2010 |
| 7653676 | Efficient mapping of FFT to a reconfigurable parallel and pipeline data flow machine A system comprises first and second local memory banks; and a reconfigurable ALU array having multiple configurations including: a first for performing an inverse butterfly operation, a second for performing a multiplication operation, a third for performing paralle... | 01/26/2010 |
| 7640284 | Bit reversal methods for a parallel processor Parallelism in a processor is exploited to permute a data set based on bit reversal of indices associated with data points in the data set. Permuted data can be stored in a memory having entries arranged in banks, where entries in different banks can be accessed in ... | 12/29/2009 |
| 7577698 | Fast fourier transform processor A Fast Fourier Transform (FFT) processor is provided. It comprises a multiplexer, a first angle rotator, a second angle rotation and multiplexing unit, an adder, a twiddle factor storage, a multiplier, and a data storage. The FFT processor analyzes the input/output ... | 08/18/2009 |
| 7555511 | Methods for addressing input data values of a Fast Fourier Transform (FFT) calculation A method for the generation of addresses of successive pairs of input data values of stages of a Fast Fourier Transform calculation stored contiguously in a memory includes initializing at most once per stage a first base address pointer to an address of a first inp... | 06/30/2009 |
| 7552162 | Receiver and communication method for digital multi-carrier communication A receiving apparatus and receiving method employ a digital multi-carrier transmission technique utilizing a real coefficient wavelet filter bank in digital demodulation. The receiving apparatus may include a memory configured to store received waveform data corresp... | 06/23/2009 |
| 7552161 | Multi-stream FFT for MIMO-OFDM systems The present invention proposes a signal processor for Fast Fourier Transformation, FFT, of MR, MR>1, input data streams of 2k samples each, supplied in parallel. After multiplexing the input data streams in an interlaced manner, the ... | 06/23/2009 |
| 7543010 | Modular pipeline fast Fourier transform A modular pipeline algorithm and architecture for computing discrete Fourier transforms is described. For an N point transform, two pipeline √{square root over (N)} point fast Fourier transform (FFT) modules are combined with a center element. The center element c... | 06/02/2009 |
| 7496618 | System and method for a fast fourier transform architecture in a multicarrier transceiver A Fourier transform architecture and system for FFT and IFFT processing within multicarrier transceiver is disclosed that includes a programmable butterfly component, a memory and a programmable address generation unit. The architecture includes a butterfly componen... | 02/24/2009 |
| 7464127 | Fast fourier transform apparatus A data transform system performs FFT and IFFT computations with respect to N data points. The data transform system performs radix-R (R is an integer) butterfly computation in parallel by use of M arithmetic elements. Serial and parallel computation structures a rec... | 12/09/2008 |
| 7461114 | Fourier transform apparatus A Fourier transform apparatus whose pipeline width is independent of transform point number of individual pipeline FFT circuits in each stage and composed of a preceding stage and a succeeding stage. Each of the stages includes M(power of 2)-point radix 2 pipeline F... | 12/02/2008 |
| 7454452 | Fast fourier transform operation with reduced cache penalty A data processing apparatus having data cache performs an N-point radix-R Fast Fourier Transform. If the data set is smaller than the data cache, the data processing apparatus performs the Fast Fourier Transform in logRN stages on all the data set in one ... | 11/18/2008 |
| 7437395 | FFT operating apparatus of programmable processors and operation method thereof A fast Fourier transform (FFT) operating apparatus and a method thereof carries out an FFT operation in a programmable processor chip. A program controller generates an FFT start signal and controls a programmable processor, and a program memory stores an applicatio... | 10/14/2008 |
