Quotables
"This is the patent age of new inventions for killing bodies, and for saving souls. All propagated with the best intentions."
Lord Byron ;
PatentStorm News
Make the Most of Our Site
See this month's Top Inventors and Most Cited Patents.
Stay on top of the latest innovations by subscribing to an RSS feed.
Registered users: Manage your profile.
| Number | Title | Issue Date |
| 8190668 | Inverse Hadamard transform converter and system An Inverse Hadamard Transform (IHT) converter and system includes a first group of registers for receiving coefficients inputted to the IHT converter; a first adder for adding selected the coefficients stored in the first group of registers; a second group of regist... | 05/29/2012 |
| 8086655 | Methods and apparatus for perturbing an evolving data stream for time series compressibility and privacy Techniques for perturbing an evolving data stream are provided. The evolving data stream is received. An online linear transformation is applied to received values of the evolving data stream generating a plurality of transform coefficients. A plurality of significa... | 12/27/2011 |
| 7996452 | Pulse domain hadamard gates A hadamard gate includes two strongly cross-coupled limit cycle oscillators. Each limit cycle oscillator includes an amplifier, a summing node, an integrator, a hysteresis quantizer, a self-feedback 1-bit DAC (Digital-to-Analog Converter) and a cross-feedback 1 bit ... | 08/09/2011 |
| 7987221 | FFT and FHT engine A transformation engine includes an address generator; a butterfly unit coupled to the address generator; a twiddle LUT coupled to the address generator; and a multiplier having a first input coupled to the butterfly unit and a second input coupled to the twiddle LU... | 07/26/2011 |
| 7925686 | Linear transformation circuit A first device is described. The first device may include a linear transformation circuit to implement multiplication by a matrix D. The linear transformation circuit may have an input to receive a vector having N digital values and an output to output N first outpu... | 04/12/2011 |
| 7917564 | Device and method for processing a signal having a sequence of discrete values When processing a signal having a sequence of discrete values, wherein there is a first frequency range, in which the signal has a high energy, and wherein there is a second frequency range, in which the signal has a low energy, the sequence of discrete values is fi... | 03/29/2011 |
| 7870176 | Method of and apparatus for implementing fast orthogonal transforms of variable size A reconfigurable architecture for and method of performing a fast orthogonal transform of vectors in multiple stages, the size of a vector being N, wherein N can vary and the number of stages is a function of N, the architecture comprising: ... | 01/11/2011 |
| 7805476 | Extended Haar transform A shared lossless Haar transform and an appended Haar transform are combined to form a lossless extended Haar transform in a pipeline architecture for providing fast lossless compressed data that is reversible. The extended Haar transform also provide intrinsic deco... | 09/28/2010 |
| 7797362 | Parallel architecture for matrix transposition An extension to current multiple memory bank video processing architecture is presented. A more powerful memory controller is incorporated, allowing computation of multiple memory addresses at both the input and the output data paths making possible new combinations... | 09/14/2010 |
| 7685219 | Parallel systolic CORDIC algorithm with reduced latency for unitary transform of complex matrices and application to MIMO detection Various embodiments include a parallel coordinate rotation digital computer (CORDIC) technique, according to which multiple elements in a vector representing a received multiple input multiple output (MIMO) signal may be processed in parallel. The result is a reduct... | 03/23/2010 |
| 7676532 | Processing system and method for transform A system includes M memories, wherein a first mapping assigns each point of an N-point input sequence to one of the M memories. A pipelined data path receives an input from each of the M memories, stores an output to each of the M memories, and iteratively processes... | 03/09/2010 |
| 7640283 | Shared Haar wavelet transform A front-end shared Haar transform is particularly adapted for cascade connection to an appended transform for providing lossless transform of an input data set, the appended transforms selected from the group consisting of an appended discrete cosine type-II (DCT-II... | 12/29/2009 |
| 7634525 | Haar wavelet transform embedded lossless type IV discrete cosine transform A shared lossless Haar transform and an appended type-IV discrete cosine transform are combined to form a lossless discrete cosine type-IV transform having a fast pipeline architecture for providing fast reversible lossless DCT-IV transform data. ... | 12/15/2009 |
| 7620674 | Method and apparatus for enhanced estimation of an analyte property through multiple region transformation The invention comprises transformation of a section of a data block independently of the transformation of separate or overlapping data blocks to determine a property related to the original matrix, where each of the separate or overlapping data blocks are derived f... | 11/17/2009 |
| 7620675 | Image and audio transform methods Inverse discrete cosine transform (type-III DCT), used in video/image and audio coding, is implemented in the form of FFT to lower computational complexity. ... | 11/17/2009 |
| RE40854 | Fast calculation apparatus for carrying out a forward and an inverse transform In an apparatus for carrying out a linear transform calculation on a product signal produced by multiplying a predetermined transform window function and an apparatus input signal, an FFT part (23) carries out fast Fourier transform on a processed signal prod... | 07/14/2009 |
| 7552159 | Transform calculation device The present invention relates to a discrete transform calculation device (FFTP). The device has control means (CNTRL) which configure first and second memories (RAM1 and RAM2) according to the number of transforms used during a first processing. The de... | 06/23/2009 |
| 7552160 | Integrated lifting wavelet transform The integrated lifting transform provides both the lossy and lossless lifting wavelet transforms while sharing the same lifting chain for either lossy data compression or lossless data compression. The lifting steps can provide a lossless compression and a lossy com... | 06/23/2009 |
| 7487193 | Fast video codec transform implementations A fast implementation of the 8-point transform is realized using a sequence of butterfly operations and matrix multiplies. A fast implementation of the inverse transform is realized by applying inverses of the butterfly operations with the matrix multiplies in rever... | 02/03/2009 |
| 7433909 | Processing architecture for a reconfigurable arithmetic node A computational unit, or node, in a adaptable computing system is described. A preferred embodiment of the node allows the node to be adapted for use for any of ten types of functionality by using a combination of execution units with a configurable interconnection ... | 10/07/2008 |
| 7406212 | Method and system for parallel processing of Hough transform computations In a parallel computation of a Hough transform of an array of input data values, the transform space of the Hough transform is partitioned dynamically or statically into a number of sub-spaces. Each sub-space of the transform is stored in a sub-space of memory locat... | 07/29/2008 |
| 7386729 | Method of inserting/detecting digital watermark and apparatus for using thereof For the purpose of designing watermark to be robust against image modification such as geometric modification (rotating, cutting, enlarging/shrinking, etc.), compression, and blurring, the watermark is embedded in frequency domain after formed as 2 dimensional shape... | 06/10/2008 |
| 7359928 | Hardware quantum gate A hardware quantum gate for running quantum algorithms in a very fast manner exploits the fact that a large number of multiplications required by an entanglement operation of the quantum algorithm provides a null result since only one component per row of the entang... | 04/15/2008 |
| 7353148 | Generation of displays of solutions to physics problems represented by complex mathematical equations using quantum computations or simulation of quantum computations on classic computers Graphic displays or audio sound representations of numerical solutions of physics problems modeled by complicated, computationally complex mathematics are generated by Type I and Type II quantum computers, which employs a plurality of classically interconnected node... | 04/01/2008 |
| 7352906 | Continuous transform method for wavelets A method and system for mapping the flow data that will be the subject of wavelet transform equations to a system comprising adders, subtractors, multipliers and/or dividers to perform the mathematical functions set forth in the particular wavelet transform. A shift... | 04/01/2008 |
| 7346640 | Image processing apparatus supporting both discrete cosine transform and discrete wavelet transform An image processing apparatus supporting both discrete wavelet transform and discrete cosine transform with reduced hardware resources. The image processing apparatus is composed of an input unit receiving a plurality of pixel data, a controlling unit selecting a de... | 03/18/2008 |
| 7343389 | Apparatus and method for SIMD modular multiplication An apparatus and method for single instruction multiple data (SIMD) modular multiplication are described. In one embodiment, the method includes selection of modular multiplication method available from an operating environment. Once the multiplication method is sel... | 03/11/2008 |
| 7343284 | Method and system for speech processing for enhancement and detection A method for discriminating noise from signal in a noise-contaminated signal involves decomposing a frame of samples of the signal into decorrelated components, and using a difference between probability distributions of the noise contributions and the signal contri... | 03/11/2008 |
| 7337204 | Method and apparatus for effectively performing linear transformations Linear transformations are carried out on a matrix that represents information such as an image or a communication. In an aspect, the matrix is processed to remove duplicate information. The duplicate information can be duplicate rows, or zero rows. This matrix is t... | 02/26/2008 |
| 7334008 | Quantum gate for carrying out a grover's quantum algorithm and a relative method of performing the interference operation of a grover's quantum algorithm A quantum gate for running a Grover's quantum algorithm using a binary function having a vector basis of n qubits is provided. The quantum gate includes a superposition subsystem, an entanglement subsystem and an interference subsystem. The interference subsystem pe... | 02/19/2008 |
| 7330866 | System for frequency-domain scaling for discrete cosine transform A system for frequency-domain scaling for DCT computation. Scale factors are applied to coefficients during the final steps of composition of 2-point DCTs. The number of multiplications and required precision are reduced. Fixed values for various scale factors can b... | 02/12/2008 |
| 7321915 | Method and apparatus for efficient matrix multiplication in a direct sequence CDMA system A system and method are disclosed for efficiently performing multiplication of an input vector and an input matrix having a limited number of possible values for any element of the input matrix. Elements of the input matrix are grouped across a second dimension of t... | 01/22/2008 |
| 7321846 | Two-wire process control loop diagnostics A diagnostic device for coupling to a process control loop includes digital communication circuitry configured to receive a digital communication signal from the process control loop. The digital communication signal is a digitally modulated analog signal on the pro... | 01/22/2008 |
| 7319659 | OFDM receiver, mode detector therefor, and method for processing OFDM signals A method of mode detection for OFDM signals. The method comprises the steps of delaying the OFDM signal for a first and second number of samples, multiplying the two delayed signals by coefficient signals, and deriving a sum of the two products, deriving an error si... | 01/15/2008 |
| 7318078 | System and method adapted to facilitate dimensional transform Systems and methods that facilitate dimensional transformations of data points are disclosed. In particular, the subject invention provides for a system and methodology that simplifies dimensional transformations while mitigating variations of a distance property be... | 01/08/2008 |
| 7318077 | Method for two-dimensional representation, interpolation and compression of data A method for representation, interpolation and/or compression of data includes identifying a two-dimensional interpolation function s(z) based on a sampling function a(z). A Cauchy integral theorem is applicable for the interpolation function s(z). The interpolation... | 01/08/2008 |
| 7315878 | Fast Fourier transform device Dislosed is a fast Fourier transform device of a wireless LAN orthogonal frequency division multiplexing (OFDM) system. The device comprises: an FFT/IFFT unit constituted with one hardware, for performing a fast Fourier transform (FFT) and an inverse fast Fourier tr... | 01/01/2008 |
| 7315909 | Hierarchized arbitration method An arbitration method, for a data bus in an architecture having n functional blocks, regulates access to the bus. The method includes: receiving, at one of plural agents, information from one of the functional blocks via high level primitives. Each agent generates i... | 01/01/2008 |
| 7313286 | Reversible DCT for lossless-lossy compression A reversible Discrete Cosine Transform (DCT) is described. The reversible DCT may be part of a compressor in a system. The system may include a decompressor with a reversible inverse DCT for lossless decompression or a legacy decompressor with an inverse DCT for los... | 12/25/2007 |
| 7310276 | Memory device and method having data path with multiple prefetch I/O configurations A memory device is operable in either a high mode or a low speed mode. In either mode 32 bits of data from each of two memory arrays are prefetched into respective sets of 32 flip-flops. In the high-speed mode, the prefetched data bits are transferred in parallel to... | 12/18/2007 |
