Actress Jamie Lee Curtis is a patented inventor - she created a diaper equipped with a premoistened baby wipe. And that's no act!
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| Number | Title | Issue Date |
| 7203714 | Logic circuit A CMOS logic circuit is disclosed wherein the number of kinds of basic parts is suppressed to five to allow designing of a circuit which operates at a high speed and repetitiveness of wiring lines is increased to allow designing of a circuit which is simple in circu... | 04/10/2007 |
| 6870929 | High throughput system for encryption and other data operations According to one embodiment, an encryption system (500) includes an input buffer (504) that can provide data blocks from different contexts (522-1 to 522-n) to a selected encryption circuit (524-1 to 524-m) acc... | 03/22/2005 |
| 6430585 | Noise tolerant conductance-based logic gate and methods of operation and manufacturing thereof A logic gate, an adder and methods of operating and manufacturing the same. In one embodiment, the logic gate includes: (1) a summer, having at least two single-bit inputs and a noise-suppression input with corresponding conductances representing discrete... | 08/06/2002 |
| 6205458 | Adder and multiplier circuits employing logic gates having discrete, weighted inputs and methods of performing combinatorial operations therewith A circuit and method for deriving an adder output bit from adder input bits, a multiplier circuit, a method of multiplying, a microprocessor and digital signal processor (DSP) employing the circuit or the method and a method of selecting weights and thres... | 03/20/2001 |
| 6119141 | Resistive decoupling of function selection signals from input multiplexers in arithmetic logical units ALU The function selection signal of an ALU is resistively decoupled or serially coupled to the input multiplexers of the ALU. By producing delayed function selection signals and decoupling the delayed function signals from the input multiplexers, the input m... | 09/12/2000 |
| 6119048 | Integrated circuit for processing digital signal A digital signal process of a plurality of functions is enabled by a common hardware constructed on one chip having input terminals t1, t2 and t2'; output terminals t3 and t4; and a control signal input terminal t5. The chip is constructed to include clas... | 09/12/2000 |
| 5892890 | Computer system with parallel processor for pixel arithmetic A pixel processor, for use in conjunction with a color video monitor or an all points addressable color print engine, includes brush logic, mask logic, clip logic, and a multi-pixel logic unit to produce a page map consisting of millions of pixels, each h... | 04/06/1999 |
| 5442577 | Sign-extension of immediate constants in an alu An arithmetic-logic unit (ALU) includes a Boolean logic unit and an integer logic unit, both of which are adapted to incorporate the sign extension function for immediate constants or reduced-width operands. The Boolean logic unit is constructed from 4:1 ... | 08/15/1995 |
| 5436574 | Universal logic module with arithmetic capabilities A universal logic module for use in a programmable logic device, capable of generating all logical functions of three variables or less. The universal logic module also implements a full adder with carry propagation.... | 07/25/1995 |
| 5327364 | Arithmetic logic unit for microprocessor with sign bit extended An arithmetic logic unit for a microprocessor is shown and described for use in a 24-bit data path where the ALU includes three separate ALU portions, one for each byte of the data path, and three separate control signals, one for each portion of the ALU.... | 07/05/1994 |
| 5227989 | Arithmetic logic unit for microprocessor with sign bit extend An arithmetic logic unit for a microprocessor is shown and described for use in a 24-bit data path where the ALU includes three separate ALU portions, one for each byte of the data path, and three separate control signals, one for each portion of the ALU.... | 07/13/1993 |
| 5130704 | Logic operation circuit A logic operation circuit includes an instruction signal generating circuit for generating an instruction signal which designates a bit of a predetermined n-bit code signal in accordance with a combination of a first input logical numeral and a second inp... | 07/14/1992 |
| 5055712 | Register file with programmable control, decode and/or data manipulation A programmable logic device is constructed having a novel architecture. A plurality of control input signals are applied to a programmable mapping array in order to generate control functions for data path gating, latching, or modification. The programmab... | 10/08/1991 |
| 4875181 | Method of apparatus for realizing a logical operation by modifying a flow of energy A device for realizing logical operations operates extremely fast and exhibits the particular advantage that it can be converted from one logical operation to another so that a plurality of logical operations can be realized with a single component. The d... | 10/17/1989 |
| 4860235 | Arithmetic unit with alternate mark inversion (AMI) coding An arithmetic unit having true and false deciding circuits (21 to 24) for receiving a first input signal A and a second input signal B to output the second input signal or complement of the same in response to the sign (most significant bit value) of the ... | 08/22/1989 |
| 4823295 | High speed signal processor A high speed signal processor contains a set of repetitive architecture functional units including an input data storage unit for storing quantized data values, a data shifting unit, an output data accumulator and a control code generator. The data shifti... | 04/18/1989 |
| 4218747 | Arithmetic and logic unit using basic cells An arithmetic and logic unit (ALU) formed by a small number of different types of basic cells suitable for cellular integration to form large scale integrated (LSI) semiconductor circuits. The arithmetic and logic unit is formed from a plurality of 1-bit ... | 08/19/1980 |
| 4157589 | Arithmetic logic apparatus A system includes arithmetic logic units, each including two 2:1 multiplexers, one 8:1 multiplexer, and a three input majority gate. Each 2:1 multiplexer provides a specific one of two data inputs when a select input signal is at a specific one of two bin... | 06/05/1979 |
| 4064421 | High speed modular arithmetic apparatus having a mask generator and a priority encoder In a high speed arithmetic apparatus, the tally coded output of a modular mask generator addressed by a binary first operand and the tally coded input of a priority encoder are joined together by an interconnecting apparatus. The interconnecting apparatus... | 12/20/1977 |
| 3958112 | Current mode binary/BCD arithmetic array An arithmetic logic array employing soft-saturating current mode logic gates operates on pure binary data or binary coded decimal data. Two 4-bit data inputs are received along with a 5-bit Op code, a carry input, and decimal arithmetic operation signals.... | 05/18/1976 |