Bizarre Patents
Crispy Chip Sandwich and Process of Producing a Sandwich Product
A food product comprising a multilayer cookie or snack having outer layers formed from a crispy type edible food product such as a potato chip or corn chip, etc. with an intermediate marshmallow layer being in contact with the inner surface of each crispy chip and one or more filler substances.
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| Number | Title | Issue Date |
| 4782457 | Barrel shifter using bit reversers and having automatic normalization A barrel shifter for a floating point processing unit can be optimized by having an automatic normalization feature. A multi-stage shifting unit is employed with external circuitry to verify that only leading zeros would be shifted out before activating a... | 11/01/1988 |
| 4665538 | Bidirectional barrel shift circuit A bidirectional barrel shift circuit includes an input switching circuit having a plurality of parallel input lines and the corresponding number of first and second signal line pairs associated to the respective input lines. This input switching circuit i... | 05/12/1987 |
| 4653019 | High speed barrel shifter A multi-function high speed barrel shifter comprising three functional levels. The first level performs 1/4 word shifts by a selectable amount. The second level performs 1/8 word shifts on the portion of the word to be shifted and, where desired, fills th... | 03/24/1987 |
| 4636976 | Bit shifting apparatus An improved apparatus for shifting the positions of data bits within a word. A plurality of control means are provided, each of which receives a data bit from the word and which controls the direction of shift of the data bit. A plurality of multiplexer m... | 01/13/1987 |
| 4620292 | Arithmetic logic unit for floating point data and/or fixed point data A signal processor having a wide dynamic range and which can process both data in the fixed point representation and data in the floating point representation by the use of a single floating-point arithmetic circuit is capable of processing digital signal... | 10/28/1986 |
| 4592006 | Adder for floating point data suitable for digital signal processing In an adder for floating point data, two floating point data are adjusted so that the exponent parts have the same value and the resulting adjusted mantissa parts are added. A first shift signal is generated on the basis of the result of the added mantiss... | 05/27/1986 |
| 4583197 | Multi-stage pass transistor shifter/rotator A digital shifter/rotator for shifting an input word by an amount depending on a shift control word is described. The shifter/rotator comprises an array of FET pass transistors arranged in a sequential number of stages. The amount to be shifted in each st... | 04/15/1986 |
| 4533992 | Microcomputer having shifter in ALU input A system for real-time digital signal processing employs a single-chip microcomputer device having separate on-chip program ROM and data RAM, with separate address and data paths for program and data. An external program address bus allows off-chip progra... | 08/06/1985 |
| 4511990 | Digital processor with floating point multiplier and adder suitable for digital signal processing A signal processor having a wide dynamic range and which can process both data in the fixed point representation and data in the floating point representation by the use of a single floating-point arithmetic circuit is capable of processing digital signal... | 04/16/1985 |
| 4509144 | Programmable bidirectional shifter A programmable bidirectional shifter is disclosed comprised of a first bidirectional load and read interface circuit selectively activated for left shifts, and a similarly constituted second bidirectional load and interface circuit which is selectively ac... | 04/02/1985 |
| 4507731 | Bidirectional data byte aligner A byte-addressable memory system having an array of transceivers with control logic which enables memory to be addressable on individual byte boundaries rather than on two byte (word) or four byte (longword) boundaries. The memory system has two independe... | 03/26/1985 |
| 4495598 | Computer rotate function The rotate function of this invention involves cyclic shifts of 1 to 4 byte data by an amount of 0, 1, 2, or 3 bytes either to the left or to the right. Only one CPU firmware clock cycle is required regardless of the shift amount. This shifting is done ei... | 01/22/1985 |
| 4491910 | Microcomputer having data shift within memory A system for real-time digital signal processing employs a single-chip microcomputer device having separate on-chip program ROM and data RAM, with separate address and data paths for program and data. An external program address bus allows off-chip progra... | 01/01/1985 |
| 4490809 | Multichip data shifting system In a multichip shifter, input data is applied to a plurality of rotators which rotate the input data by 2A bits. The outputs from the rotators are applied to selectors which select between the rotated outputs. The selected outputs are then shif... | 12/25/1984 |
| 4488252 | Floating point addition architecture Parallel shifter architecture in an arithmetic unit of a digital computer for processing floating point mantissas. An arithmetic-logic unit (ALU) in series with shifting means functions in parallel with a barrel shifter. Both paths are executed simultaneo... | 12/11/1984 |
| 4475173 | Multibit unidirectional shifter unit An arithmetic unit, particularly for floating point operations, is provided in which numeric words with n digits, shifted by any desired number of digits, can be taken, in one step with a duration independent of the extent of the shift, from a shift array... | 10/02/1984 |
| 4472788 | Shift circuit having a plurality of cascade-connected data selectors A shift circuit comprises a plurality of stages of data selectors, a first data selector, a second data selector and a temporary register. The data selectors shift an n-bit input data by m bits which are specified by a shifting amount data and produces a ... | 09/18/1984 |
| 4451883 | Bus sourcing and shifter control of a central processing unit A data processing system includes a memory subsystem for storing operands and instructions and a central processing unit (CPU) for manipulating the operands by executing the instructions. The CPU includes a control store for generating signals for control... | 05/29/1984 |
| 4437166 | High speed byte shifter for a bi-directional data bus In a high speed data processing system, there is provided a circuit for shifting either right or left as data is transmitted to or from the main storage unit. Apparatus for high speed parallel byte shifting is connected to the data bus which connects the ... | 03/13/1984 |
| 4428060 | Shift register latch circuit means for check and test purposes and contained in LSI circuitry conforming to level sensitive scan design (LSSD) rules and techniques LSI circuitry conforming to LSSD rules and techniques usually requires at least a small portion of circuitry used only for check and test purposes. The disclosed circuitry meets the LSSD design rules and techniques and considerably reduces the test circui... | 01/24/1984 |
| 4396994 | Data shifting and rotating apparatus A circuit for rotating a multibit binary word in either the right or the left direction includes a scale factor decoder receiving a scale factor word which specifies the magnitude of the rotation and a direction control signal which specifies the directio... | 08/02/1983 |
| 4383304 | Programmable bit shift circuit A programmable bit shift circuit in which data can be shifted in one operation by as many bit positions as desired, m input data lines and n output data lines are provided intersecting each other with n>m. Switching elements such as transmission gates are... | 05/10/1983 |
| 4345316 | Shift arithmetic device A shift arithmetic device which has a circulating shifter for shifting N-bit information by a specified number of bits and a set circuit for setting logic "O" or "1" in the shifted N-bit information at the bit positions corresponding to the specified numb... | 08/17/1982 |
| 4338675 | Numeric data processor A floating point, integrated, arithmetic circuit is organized around a file format having a floating point numeric domain exceeding that of any single or double precision floating point numbers, long or short integer words or BCD data upon which it must o... | 07/06/1982 |
| 4295202 | Hexadecimal digit shifter output control by a programmable read only memory A Scientific Instruction Processor (SIP) uses a Programmable Read Only Memory (PROM) to control the output of a two stage shifter. The shifter performs the necessary mantissa shift operations of shift right, shift left, shift right around, as well as inse... | 10/13/1981 |
| 4122534 | Parallel bidirectional shifter A circuit for shifting a binary data word having N-bits any number up to N-1 positions left or right is described. A shifting network having a plurality of levels for shifting a binary word a predetermined number of positions in only one predetermined dir... | 10/24/1978 |
| 4051358 | Apparatus and method for composing digital information on a data bus Logical and arithmetic shifts, rotations, and compositions of digital words can be performed directly on the data bus by use of registers which are selectively coupled to the data bus through bidirectional devices. The registers may be buffered latches ha... | 09/27/1977 |
| 3961750 | Expandable parallel binary shifter/rotator A parallel shifter consists of a plurality of AND gates arranged in a skewed configuration to simulate the partial products of a multiplication of the binary number to be shifted with a second binary number representing 2N where N is the number... | 06/08/1976 |
| 3934132 | Shift network for dual width operands A shift network is provided which may operate on one full width operand or on two one-half width operands, by splitting the shift network in the middle. The shift network in the present embodiment for 96 bit full width operands is constructed in four rank... | 01/20/1976 |
