Did You Know...
...that it was melting ice cream that inspired the invention of the outboard motor? It was a lovely August day and Ole Evinrude was rowing his boat to his favorite island picnic spot. As he rowed, he watched his ice cream melt and wished he had a faster way to get to the island. At that moment the idea for the outboard motor was born!
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| Number | Title | Issue Date |
| 8190664 | Employing a mask field of an instruction to encode a sign of a result of the instruction A decimal floating point finite number in a decimal floating point format is composed from the number in a different format. A decimal floating point format includes fields to hold information relating to the sign, exponent and significand of the decimal floating po... | 05/29/2012 |
| 8150899 | Method for finding minimal signed digit with variable multi-bit coding based on booth's algorithm Provided is a method for finding a minimal signed digit with variable multi-bit coding. The method includes the steps of: scanning and grouping given multi-bit and checking the type of each group; deciding whether each group is to be performed by any one of a coding... | 04/03/2012 |
| 8099447 | Negative two's complement processor for windowing in harmonic analysis The present invention provides a solution to the shortcomings of the traditional two's complement system that is commonly utilized in modern computing systems and digital signal processors for calculating harmonic analysis using a discrete time-frequency transform. ... | 01/17/2012 |
| 8082282 | Decomposition of decimal floating point data, and methods therefor A decimal floating point finite number in a decimal floating point format is composed from the number in a different format. A decimal floating point format includes fields to hold information relating to the sign, exponent and significand of the decimal floating po... | 12/20/2011 |
| 8078658 | ASCII to binary decimal integer conversion in a vector processor A system, method, and apparatus for the constant time, branchless conversion of decimal integers of varying size in ASCII format to a decimal integer in binary decimal format in a vector processor utilizing simultaneous conversion of the string to a binary format, f... | 12/13/2011 |
| 8060545 | Composition of decimal floating point data, and methods therefor A decimal floating point finite number in a decimal floating point format is composed from the number in a different format. A decimal floating point format includes fields to hold information relating to the sign, exponent and significand of the decimal floating po... | 11/15/2011 |
| 8051119 | Decomposition of decimal floating point data A decimal floating point finite number in a decimal floating point format is composed from the number in a different format. A decimal floating point format includes fields to hold information relating to the sign, exponent and significand of the decimal floating po... | 11/01/2011 |
| 8051118 | Composition of decimal floating point data A decimal floating point finite number in a decimal floating point format is composed from the number in a different format. A decimal floating point format includes fields to hold information relating to the sign, exponent and significand of the decimal floating po... | 11/01/2011 |
| 8051117 | Shift significand of decimal floating point data A decimal floating point finite number in a decimal floating point format is composed from the number in a different format. A decimal floating point format includes fields to hold information relating to the sign, exponent and significand of the decimal floating po... | 11/01/2011 |
| 8037115 | Method and system to compensate for inaccuracy associated with processing values with finite precision A method and system to compensate for inaccuracy associated with processing values with finite precision includes a process for selecting a display value whereby an initial value is provided in a first numbering system. The initial value is then converted into an eq... | 10/11/2011 |
| 8037116 | Method and system for optimizing floating point conversion between different bases A method of streamlining floating-point conversions includes determining a source coefficient and a source exponent of an input value represented by a floating-point number in a source base; estimating an approximated target exponent (ATE) using the source coefficie... | 10/11/2011 |
| 7991811 | Method and system for optimizing floating point conversion between different bases A method of performing floating-point conversions in a digital computing system includes determining a source coefficient, c1, and a source exponent, n, of an input value represented by a floating-point number in a source base, b1; converting t... | 08/02/2011 |
| 7953780 | Shift significand of decimal floating point data A decimal floating point finite number in a decimal floating point format is composed from the number in a different format. A decimal floating point format includes fields to hold information relating to the sign, exponent and significand of the decimal floating po... | 05/31/2011 |
| 7949696 | Floating-point number arithmetic circuit for handling immediate values Disclosed herein is a floating-point number arithmetic circuit for efficiently supplying data to be performed arithmetic operation. The floating-point number arithmetic circuit includes an floating-point number arithmetic unit for performing a predetermined floating... | 05/24/2011 |
| 7949695 | Two's complement circuit A operator is located between two converters that convert data between floating-point format and a predetermined format. The operator operates on predetermined format data, which consists of the same sign bit, the same exponent, and the two's complement of the manti... | 05/24/2011 |
| 7945607 | Data processing apparatus and method for converting a number between fixed-point and floating-point representations A data processing apparatus and method are provided for converting a number between fixed-point and floating-point representations. More particularly, the data processing apparatus comprises a data processing unit operable to execute instructions, with the data proc... | 05/17/2011 |
| 7933941 | Arithmetic program conversion apparatus, arithmetic program conversion program and arithmetic program conversion method An arithmetic program conversion apparatus, an arithmetic program conversion program and an arithmetic program conversion method that can convert the floating-point arithmetic of an arithmetic program into a fixed-point arithmetic without degrading the accuracy. The... | 04/26/2011 |
| 7921144 | Fast correctly-rounding floating-point conversion A system and method for converting bases of floating point numbers using fixed-point computation includes tables having different related spacings of exponent indices. The tables are adapted to cross-reference conversion ratios between exponent bases. The tables are... | 04/05/2011 |
| 7899855 | Method, apparatus and instructions for parallel data conversions Method, apparatus, and program means for performing a conversion. In one embodiment, a disclosed apparatus includes a destination storage location corresponding to a first architectural register. A functional unit operates responsive to a control signal, to convert ... | 03/01/2011 |
| 7899856 | Hysteresis for mixed representation of Java BigDecimal objects A computer implemented method for determining when to change a representation type of at least one number stored in a memory of a data processing system. An operation is received in a processor of the data processing system. The operation references a number stored ... | 03/01/2011 |
| 7890558 | Apparatus and method for precision binary numbers and numerical operations An method and/or apparatus for representing and/or operating on numerical values in binary systems whereby numerical values having integer and fractional portions are stored in non-contiguous memory locations. ... | 02/15/2011 |
| 7885989 | Encoding circuit and digital signal processing circuit An encoding circuit is disclosed which comprises: a data-for-encoding storing register that stores n-bit data for encoding; a data-for-calculation storing register that stores m-bit data for calculation generated by shifting the data for encoding; a shifter that shi... | 02/08/2011 |
| 7865541 | Configuring floating point operations in a programmable logic device A programmable logic device is programmed to perform arithmetic operations in an internal format that, unlike known standard formats that store numbers in normalized form and require normalization after each computational step, stores numbers in unnormalized form an... | 01/04/2011 |
| 7860910 | System and method for mapping mathematical finite floating-point numbers A floating-point number is encoded into a binary string. A left-to-right comparison of the binary string determines relative magnitude of the floating-point number. If the floating-point number is negative, then take an absolute value of the floating-point number. T... | 12/28/2010 |
| 7840622 | Method and floating point unit to convert a hexadecimal floating point number to a binary floating point number Method to convert a hexadecimal floating point number (H) into a binary floating point number by using a Floating Point Unit (FPU) with fused multiply add with an A-register a B-register for two multiplicand operands and a C-register for an addend operand, wherein a... | 11/23/2010 |
| 7797360 | Sortable floating point numbers The invention comprises methods for manipulating floating point numbers on a microprocessor where the numbers are sortable. That is, the numbers obey lexicographical ordering. Hence, the numbers may be quickly compared using bit-wise comparison functions such as mem... | 09/14/2010 |
| 7774393 | Apparatus and method for integer to floating-point format conversion An apparatus and method for integer to floating-point format conversion. A processor may include an adder configured to perform addition of respective mantissas of two floating-point operands to produce a sum, where a smaller-exponent one of the floating-point opera... | 08/10/2010 |
| 7711761 | Method and system for digital signal processing, program product therefor A system, such as, e.g., a multiplier, for processing digital signals by using digital signals in the Canonic Signed Digit representation, the system including an input element to make the digital signals available in the Binary Canonic Signed Digit representation, ... | 05/04/2010 |
| 7707233 | Coverting a number from a first base to a second base A machine-implemented method converts a number from a first base to a second base. Each one of a first group of machine operation computes a product whose factors include the number in the first base, and a previously calculated approximation to a respective negativ... | 04/27/2010 |
| 7698352 | System and method for converting from scaled binary coded decimal into decimal floating point A system and method for converting from scaled binary coded decimal (SBCD) into decimal floating point (DFP). The system includes a mechanism for receiving one or more of an exponent part of a SBCD number and a coefficient part of the SBCD number. The system also in... | 04/13/2010 |
| 7685214 | Order-preserving encoding formats of floating-point decimal numbers for efficient value comparison A method for conversion between a decimal floating-point number and an order-preserving format has been disclosed. The method encodes numbers in the decimal floating-point format into a format which preserves value ordering. This encoding allows for fast and direct ... | 03/23/2010 |
| 7685213 | Conversion of floating-point numbers from binary into string format A method, system, and computer program product that convert a real number from a floating point representation to a character string. Mantissa bits are extracted from the floating-point representation of a value into an integer format. The mantissa bits of the integ... | 03/23/2010 |
| 7660838 | System and method for performing decimal to binary conversion A method for converting from decimal to binary including receiving a binary coded decimal (BCD) number made up of one or more sets of three digits. A running sum and a running carry are set to zero. A process is performed for each set of three digits in the BCD numb... | 02/09/2010 |
| 7653674 | Parallel operations on multiple signed elements in a register The present invention provides methods, apparatus, and article of manufacture for performing parallel operations on multiple signed elements which have been packed into a binary value, each element being associated with a different set of bits. A signs binary value ... | 01/26/2010 |
| 7650372 | Method and apparatus for varying-radix numeration system A method and apparatus for a varying-radix numeration system is described. A method includes receiving a first sequence of values, determining a number of positions for a second sequence of values, and generating the second sequence of values, each value of the seco... | 01/19/2010 |
| 7644115 | System and methods for large-radix computer processing Systems and methods for performing large-radix numeric operations. A first number may be segmented into large-radix segments, wherein numbers of the segments are generated such that radix of the segment is greater than radix of the first number. As a result, a plura... | 01/05/2010 |
| 7558811 | Electronic control apparatus and memory apparatus for electronic control apparatus An electronic control apparatus has a memory which stores a map consisting of a set of map points and corresponding set of map values, with the map values representing respective physical quantity values, and at least one of the sets of map points and map values bei... | 07/07/2009 |
| 7523150 | Binary representation of number based on processor word size A method of converting a number to a binary representation based on a processor word size is described. In accordance with the method, a predetermined size segment of a number is converted to a binary representation wherein the predetermined size segment is based on... | 04/21/2009 |
| 7461107 | Converter circuit for converting 1-redundant representation of an integer A fixed-point arithmetic unit comprises a plurality of full-adders and half-adders arranged in at least an input row and an output row. A plurality of inputs to the input row is arranged to receive bits comprising a sparse-redundant representation of the integer. A ... | 12/02/2008 |
| 7433905 | Device and method for processing digital values in particular in non-adjacent form A table establishes correspondence between first sets of at least one number, expressed in accordance with a signed code where each number may have the value of 0, 1 or −1, and second sets of at least one number, expressed according to a simple form where each num... | 10/07/2008 |
