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Dining Table Having Integral Dishwasher
A space-saving dishwasher, which may be installed within a counter top or table, having a dish-carrying rack that is vertically shiftable through the open top of the dishwasher for facilitating loading and unloading of the dishes.
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| Number | Title | Issue Date |
| 7827131 | High density synapse chip using nanoparticles A physical neural network synapse chip and a method for forming such a synapse chip. The synapse chip can be configured to include an input layer comprising a plurality of input electrodes and an output layer comprising a plurality of output electrodes, such that th... | 11/02/2010 |
| 7548894 | Artificial neural network An artificial neural network that can act like the real neural network according to the input history of signals input. The network includes a learning circuit that stores an input history of an input signal, an output circuit that is connected to the learning circu... | 06/16/2009 |
| 7426501 | Nanotechnology neural network methods and systems A physical neural network is disclosed, which includes a connection network comprising a plurality of molecular conducting connections suspended within a connection gap formed between one or more input electrodes and one or more output electrodes. One or more molecu... | 09/16/2008 |
| 7398259 | Training of a physical neural network Physical neural network systems and methods are disclosed. A physical neural network can be configured utilizing molecular technology, wherein said physical neural network comprises a plurality of molecular conductors, which form neural network connections thereof. ... | 07/08/2008 |
| 7392230 | Physical neural network liquid state machine utilizing nanotechnology A physical neural network is disclosed, which comprises a liquid state machine. The physical neural network is configured from molecular connections located within a dielectric solvent between pre-synaptic and post-synaptic electrodes thereof, such that the molecula... | 06/24/2008 |
| 7389202 | Modular system and process for obtaining measured data and for forwarding them in a radio-based manner A modular system and process for obtaining measured data and forwarding them in a radio-based manner is based on a plurality of modules. The modules contain at least one device (31) for obtaining measured data, a device (32) for transmitting the measur... | 06/17/2008 |
| 7366352 | Method and apparatus for performing fast closest match in pattern recognition A method and apparatus for determining a closest match of N input patterns relative to R reference patterns using K processing units. Each of a set of input patterns are loaded into the K processing units. One of the Reference patterns is sequentially loaded into ea... | 04/29/2008 |
| 7269090 | Memory access with consecutive addresses corresponding to different rows A memory system (200) has an array of addressable storage elements (210) arranged in a plurality of rows and a plurality of columns, and decoding circuitry (220, 230) coupled to the array of addressable storage elements (210). The decodin... | 09/11/2007 |
| 7265380 | Ambipolar organic thin-film field-effect transistor and making method In a thin-film field-effect transistor having metal/insulator/semiconductor (MIS) structure, the semiconductor layer is formed of an organic compound, and the insulator layer is formed of an organic compound which is soluble in an organic solvent and exhibits sponta... | 09/04/2007 |
| 7242614 | Rewriteable electronic fuses Rewriteable electronic fuses include latches and/or logic gates coupled to one or more nonvolatile memory elements. The nonvolatile memory elements are configured to be programmed to memory values capable of causing associated electronic circuits to settle to predet... | 07/10/2007 |
| 7170479 | Display device and driving method thereof This invention provides a display device in which it is possible to have a light emitting element emitted light with constant luminance without coming under the influence of deterioration over time, and it is possible to realize accurate gray scale express, and yet,... | 01/30/2007 |
| 7154153 | Memory device A floating gate transistor has a reduced barrier energy at an interface with an adjacent gate insulator, allowing faster charge transfer across the gate insulator at lower voltages. Data is stored as charge on the floating gate. The data charge retention time on the... | 12/26/2006 |
| 7146037 | VLSI neural fuzzy classifier for handwriting recognition A handwriting recognition device using fuzzy logic and cellular neural network for unconstrained handwritten numeral classification is provided. The current mode VLSI classifier has a I/O circuit for inputting and outputting a plurality of membership functions. An e... | 12/05/2006 |
| 7143070 | Current-mode digital programmable neural fuzzy classifier A neural fuzzy data classifier for handwritten character classification is provided. The classifier has an I/O circuit for inputting and outputting a plurality of membership functions. An input buffer receives a to-be-recognized character having a plurality of input... | 11/28/2006 |
| 7133888 | Method and programmable apparatus for quantum computing A method and apparatus for quantum computing. A computer-program source code, data, and unsubstantiated output variables are converted into a class of computable functions by a program compiler. The computable functions are encoded, and a continualization method is ... | 11/07/2006 |
| 7120617 | Operation circuit and operation control method thereof A product-sum operation circuit includes a pulse width/digital conversion circuit (9) which converts a pulse signal having a pulse width representing an operand value into a digital signal, a sorting circuit (4) which outputs, in descending or ascendin... | 10/10/2006 |
| 7116240 | Method and apparatus for controlled persistent ID flag for RFID applications A Radio-Frequency Identification (RFID) transponder is provided. The RFID transponder may include a basic ID flag circuit having a VDD voltage node, an output voltage node, and a capacitor coupled to the VDD voltage node and the output voltage node to store an ID fl... | 10/03/2006 |
| 7109593 | Systems and methods for performing quantum computations Apparatus and methods for performing quantum computations are disclosed. Such apparatus and methods may include identifying a first quantum state of a lattice having a system of quasi-particles disposed thereon, moving the quasi-particles within the lattice accordin... | 09/19/2006 |
| 7092923 | Synapse element with learning function and semiconductor integrated circuit device including the synapse element A synapse configured of an A-MOS transistor has a learning function and can implement high integration similar to that of a DRAM because of its simplified circuit configuration and compact circuit size. With the presently cutting-edge technology (0.15 μm CMOS), app... | 08/15/2006 |
| 7085749 | Pulse signal circuit, parallel processing circuit, pattern recognition system, and image input system A synaptic connection element for connecting neuron elements inputs a plurality of pulsed signals from different neuron elements N1 through N4, effects a common modulation (time window integration or pulse phase/width modulation) on a plurality of pred... | 08/01/2006 |
| 7082067 | Circuit for verifying the write speed of SRAM cells A circuit for measuring the performance of a memory cell. The circuit includes a ring oscillator, which includes a plurality of memory cells. The performance of the memory cell can be determined from an oscillation frequency of the ring oscillator. The circuit accur... | 07/25/2006 |
| 7080054 | Biomimic artificial neuron An artificial neuron is formed from an input subcircuit, a capacitor free leaky integrator subcircuit, and an output switching subcircuit. The input subcircuit is configured to supply a pulsed input signal. The capacitor free leaky integrator subcircuit is configure... | 07/18/2006 |
| 7047225 | Hebbian synapse circuit A Hebbian synapse emulation circuit models the conductance of a synapse circuit. In one embodiment, the circuit includes a counter that provides control signals determining the conduction states of electrical pathways, which define the conductance level of the synap... | 05/16/2006 |
| 7042273 | Electronic array having nodes and methods An electronic network comprises a plurality of nodes that each comprise a current input and a current output, and at least one transistor arranged as a first current mirror and a second current mirror. The first and the second current mirrors are complementary to ea... | 05/09/2006 |
| 7043466 | Neural network processing system using semiconductor memories The neural network processing system according to the present invention includes a memory circuit for storing neuron output values, connection weights, the desired values of outputs, and data necessary for learning; an input/output circuit for writing or reading dat... | 05/09/2006 |
| 7035835 | High-precision current-mode pulse-width-modulation circuit A current-mode pulse-width-modulation (PWM) circuit converts analog current signals into pulse signals. The PWM circuit includes a first I-V converter and one or more second I-V converters, each of the one or more second I-V converters being coupled to one of the cu... | 04/25/2006 |
| 7031890 | Method and apparatus for estimating state parameter in nonlinear discrete time system A method and apparatus for estimating a state parameter in a nonlinear discrete time system are provided. The method for estimating a state parameter has the steps of (a) predicting a state parameter at a current time using an estimated state parameter at a previous... | 04/18/2006 |
| 7026698 | Functional device, method of manufacturing therefor and driver circuit A driver circuit substrate is prepared and a mirror substrate is so provided as to be placed on the driver circuit substrate. Nine mirror elements are lad out on the mirror substrate in a 3×3 matrix form. The mirror elements are prepared by a microelectromechanical... | 04/11/2006 |
| 6999952 | Linear associative memory-based hardware architecture for fault tolerant ASIC/FPGA work-around A programmable logic unit (e.g., an ASIC or FPGA) having a feedforward linear associative memory (LAM) neural network checking circuit which classifies input vectors to a faulty hardware block as either good or not good and, when a new input vector is classified as ... | 02/14/2006 |
| 6993611 | Enhanced general input/output architecture and related methods for establishing virtual channels therein A point-to-point interconnection and communication architecture, protocol and related methods. System resources are dynamically shared based on contents of information received for transmission within the system. Virtual channels may be used for transmission of the ... | 01/31/2006 |
| 6954552 | System, method and apparatus for pattern recognition with application to symbol recognition and regeneration for a calligraphic display The invention provides a technique for pattern recognition that employs a state machine that incorporates a sequence of table-look-up operations. A sequence of input parameters, derived according to an application-specific algorithm, generates a corresponding sequen... | 10/11/2005 |
| 6950330 | Addressing of memory matrix A method of driving a passive matrix display or memory array of cells comprising an electrically polarizable material exhibiting hysteresis, in particular a ferroelectric material, wherein the polarization state of individual cells can be switched by application of ... | 09/27/2005 |
| 6922350 | Reducing the effect of write disturbs in polymer memories The write disturb that occurs in polymer memories may be reduced by writing back data after a read in a fashion which offsets any effect on the polarity of bits in bit lines associated with the addressed bit. For example, each time the data is written back, its pola... | 07/26/2005 |
| 6920440 | Forming a signature of parameters extracted from information A method of storing information relating to the transmission of messages by an entity over a given time period comprises the step of creating a signature comprising a plurality of parameters related to the transmission of messages over that time period wherein the p... | 07/19/2005 |
| 6912700 | Method and system for non-linear state based satisfiability A computerized method and system for solving non-linear Boolean equations is disclosed comprising at least partially solving a Boolean function; developing at least one inference regarding said Boolean function and saving said inference to a state machine; and acces... | 06/28/2005 |
| 6865563 | Neuron network modeling The Neuron network modeling compares neuron behavior in terms of electrical properties to predict the propagation of capacitative, or inductive current/potential along a nerve fiber. Membrane ion channels act as capacitor-inductor circuits, similar to a radio receiv... | 03/08/2005 |
| 6844582 | Semiconductor device and learning method thereof A learning method of a semiconductor device of the present invention comprises a neuro device having a multiplier as a synapse in which a weight varies according to an input weight voltage, and functioning as a neural network system that processes analog data, compr... | 01/18/2005 |
| 6829598 | Method and apparatus for modeling a neural synapse function by utilizing a single conventional MOSFET A method and apparatus for modeling a neural synapse function in analog hardware whereby the multiplication function inherent to the operation of a neural synapse is computed by applying a voltage on the gate-source terminals and an independent voltage on drain-sour... | 12/07/2004 |
| 6809558 | Push-pull output neuron circuit A neuron circuit generates a sigmoid transfer function and its derivative. The neuron circuit comprises an I-V converter that converts a current input signal into a voltage signal, a first output circuit having a first differential amplifier with a first current mir... | 10/26/2004 |
| 6763340 | Microelectromechanical system artificial neural network device A novel microelectromechanical system artificial neural network (MEMS ANN) device performs the function of a conventional artificial neural network node element. Micro-machined polysilicon or high aspect ratio composite beam micro-resonators replace as computational... | 07/13/2004 |
