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| Number | Title | Issue Date |
| 8155907 | Methods of enabling functions of a design to be implemented in an integrated circuit device and a computer program product Methods of enabling functions of a design to be implemented in an integrated circuit device are disclosed. An exemplary method comprises applying test data to a plurality of dice having different element types for implementing circuits, wherein the plurality of dice... | 04/10/2012 |
| 8082118 | Test apparatus Provided is a test apparatus that tests a device under test, comprising a clock recovering section that recovers a clock signal from an output signal output by the device under test; an acquiring section that acquires the output signal at a timing corresponding to t... | 12/20/2011 |
| 8065102 | Pulse width measurement circuit A pulse width measurement circuit generates a time difference signal that corresponds to the pulse width of the input pulse signal PULSE. A delay circuit delays the input pulse signal PULSE by a predetermined amount, and outputs a start signal. An inverter inverts t... | 11/22/2011 |
| 8051039 | Method, system and computer program product for improved round robin for time series data A system for storing time series data in a database using round robin includes a user input interface and a round robin database file manager. The interface receives inputs specifying a time period and a sample rate for collection of delta samples. Each sample repre... | 11/01/2011 |
| 8036842 | Method and system for real-time signal classification A method to achieve an accurate, extremely low power state classification implementation is disclosed. Embodiments include a sequence that matches the data flow from the sensor transducer, through analog filtering, to digital sampling, feature computation, and class... | 10/11/2011 |
| 8027797 | Methods and apparatus for determining a switching history time constant in an integrated circuit device Techniques for inline measurement of a switching history time constant in an integrated circuit device are provided. A series of pulses is launched into a first stage of a delay chain comprising a plurality of delay stages connected in series and having a length gre... | 09/27/2011 |
| 7987062 | Delay circuit, test apparatus, storage medium semiconductor chip, initializing circuit and initializing method A delay circuit includes a first delay element, a second delay element, and an initializing section that measures a delay amount generated by the first delay element with respect to each delay setting value. The initializing section includes a first loop path that i... | 07/26/2011 |
| 7987061 | Non-linear frequency and phase measurement scheme The present invention relates to a method and apparatus for measuring a frequency or a phase of a measuring signal, wherein the frequency (fg) or the phase (φg) are estimated by approximating the relationship between a collecting clock (c) and... | 07/26/2011 |
| 7945408 | Time delay estimation A time differential is estimated between a plurality of signals by determining a filter response of a first electrical signal with a first filter array, determining a filter response of a second electrical signal with a second filter array, and determining, based at... | 05/17/2011 |
| 7937232 | Data timestamp management Embodiments of the present invention relate to managing timestamps associated with received data. According to one embodiment, data is collected from a device that generates data at a specified rate, but which lacks a built-in clock. An accurate timestamp is assigne... | 05/03/2011 |
| 7930121 | Method and apparatus for synchronizing time stamps Traditionally, time stamp circuits have been used for precise digital time measurements. The resolution of these types of circuits, though, was generally limited by clock speed. Here, an apparatus is provided that performs time stamp operations and is not generally ... | 04/19/2011 |
| 7904265 | Circuits and methods for calibrating a delay element A controllable delay element is coupled in parallel with a calibration circuit. The calibration circuit receives a periodic reference signal and generates a series of sample voltages responsive to a time-varying analog voltage, the periodic reference signal, and the... | 03/08/2011 |
| 7904266 | Method and apparatus for calculating the separation time of arcing contacts of a high-volume switchgear A method and an apparatus for calculating the separation time of the arcing contacts of a high-voltage switchgear which is operatively coupled to a synchronous switching device and to an auxiliary switch having auxiliary contacts operatively connected to the arcing ... | 03/08/2011 |
| 7904264 | Absolute duty cycle measurement A mechanism for measuring the absolute duty cycle of a signal is provided. A non-inverted path from a signal source is selected and various DCC circuit setting indices are cycled through until a divider, coupled to the output of the DCC circuit, fails. A first minim... | 03/08/2011 |
| 7853420 | Performing temporal checking An apparatus for performing temporal checking is disclosed. A signal logger for performing temporal checking includes a group of edge detection modules and a group of counting modules. During testing, the signal logger is coupled to a device under testing (DUT). Eac... | 12/14/2010 |
| 7835877 | Processes and apparatus for battery compensation Systems, processes and apparatus are described through which signals are received from a controller, where the signals include a power ON signal. A time measurement element is started responsive to the power ON signal to assess a current duration of operation of the... | 11/16/2010 |
| 7792650 | Edge-aligned ratio counter An Edge-Aligned Ratio Counter (EARC) that includes at least one processor coupled to at least one counter circuit is provided for determining a ratio between two clock signals by receiving a first and a second value in response to a first clock signal and generating... | 09/07/2010 |
| 7702474 | Apparatus and method for testing data transfer rate A method for testing a data transfer rate of an electronic device includes: receiving data transmitted from the electronic device and converting the data into test data; analyzing the test data; encoding the analyzed data to generate output data; and displaying a st... | 04/20/2010 |
| 7668674 | Systems, methods, and devices for providing pulses to a motion device At least one exemplary embodiment of to present invention includes a method comprising obtaining a first frequency and a second frequency. The method also comprises creating a table of values comprising a plurality of target frequencies intermediate to the first and... | 02/23/2010 |
| 7668675 | Semiconductor integrated circuit and information processing system In a semiconductor integrated circuit, a counter counts the number of high-speed clock signals that have been generated in a predetermined number of clock cycles of a low-speed clock signal. In synchronization with the low-speed clock signal, the semiconductor integ... | 02/23/2010 |
| 7643953 | Determination of incremental value in server processed data The accumulated change in values representative of actions taken by a processor, such as the number of email messages processed by an email server, in a given time period is determined. Actions are represented as data points on a plot. Look-ahead intervals are defin... | 01/05/2010 |
| 7640124 | Delay failure test circuit In a delay failure test circuit, a delay failure test between two clock domains among a plurality of clock domains having different operation clock rates is performed. The delay failure test circuit inputs, to a first clock domain, a clock signal having only a launc... | 12/29/2009 |
| 7634373 | Midstream determination of varying bandwidth availability Systems and methods for midstream determination of varying available bandwidth for streaming content between two network entities are described. During content streaming, a client requests a server to surge the content transmission rate. One or more bandwidth measur... | 12/15/2009 |
| 7630846 | Design for testability technique for phase detectors used in digital feedback delay locked loops A method and circuit for testing phase detectors in a delay locked loop is provided. The method includes storing output from a first phase detector and from a second phase detector when the counter is at the +0, +1, and −1 counter positions, and comparing the resu... | 12/08/2009 |
| 7620512 | Determining a time base for a microcontroller The invention relates to a method for producing a time base for a microcontroller and a simple circuit arrangement therefor, which comprises an RC-element having a specific time constant, said element being connected to a connection of the microcontroller. According... | 11/17/2009 |
| 7617059 | Method and apparatus for measuring the duty cycle of a digital signal The disclosed methodology and apparatus measures the duty cycle of a clock signal. A variable duty cycle circuit receives a clock signal from a clock signal generator. The variable duty cycle circuit adjusts the duty cycle of the clock signal by an amount dependent ... | 11/10/2009 |
| 7617058 | Biometric apparatus and method using bio signals A biometric apparatus and a method thereof using bio signals are provided. The apparatus includes an ADC, a periodic signal extractor, a template storing portion, a comparator. The ADC performs sampling of an input bio signal to convert the sampled bio signal into a... | 11/10/2009 |
| 7599809 | Processor capable of alerting its life expectancy and method thereof The present invention discloses a processor capable of alerting its life expectancy and its method. The processor is installed in an electronic device having a control circuit, a frequency divider circuit and a time counter. The control circuit is connected to the f... | 10/06/2009 |
| 7574314 | Spurious signal detection A circuit for a data processing apparatus and a method for detecting spurious signals is disclosed, the circuit comprising a data input operable to receive digital signal values, spurious signal detection logic operable to monitor a digital signal value within the c... | 08/11/2009 |
| 7548823 | Correction of delay-based metric measurements using delay circuits having differing metric sensitivities Correction of delay-based metric measurements using delay circuits having differing metric sensitivities provides improved accuracy for environmental and other circuit metric measurements that used delay lines. A delay line measurement, which may be a one-shot measu... | 06/16/2009 |
| 7526395 | Logic analyzer using a digital filter A logic analyzer having clock channels and data channels includes digitizer followed by a digital filter in each channel, the digital filter compensating for losses in signal fidelity in a signal under test. The resulting enhanced multi-bit samples are stored in res... | 04/28/2009 |
| 7516032 | Resolution in measuring the pulse width of digital signals A system and method for providing improved resolution in the measuring the pulse width of digital signals comprising counting the integral number of measuring clock pulses covered by said digital pulse and triggering a chain of cascaded high resolution delay element... | 04/07/2009 |
| 7493224 | Event tracing with time stamp compression and history buffer based compression An improved method, apparatus, and computer instructions for generating trace data. In response to detecting a trace event, a determination is made as to whether identifiers for the trace event match recorded identifiers for a record in a set of previously recorded ... | 02/17/2009 |
| 7474974 | Embedded time domain analyzer for high speed circuits A method of providing an on-chip high-speed time domain digital analyzer for the characterization and analysis of signals within an integrated circuit is provided. The method involves processing the signal being characterized/analyzed in the digital domain irrespect... | 01/06/2009 |
| 7433527 | Time series data dimensional compression apparatus A time series data dimensional compression apparatus performing dimensional compression for improving the efficiency of searching for time series data without losing the features of data. The compression is made to a determined dimension so that a larger volume of i... | 10/07/2008 |
| 7415363 | High resolution torque measurement on a rotating shaft with movement compensation An apparatus for determining the torque imposed on a rotatable shaft. The shaft has at least four paired probes, paired horizontal probes and paired vertical probes. The horizontal probes are positioned 90 degrees apart from the vertical probes. If the shaft moves h... | 08/19/2008 |
| 7412337 | Method for determining fill level on the basis of travel time of a high-frequency measuring signal A method for determining the fill level (l) on the basis of the travel time (t) of a high-frequency measuring signal (SHF), which is transformed into a lower frequency, intermediate-frequency measuring signal (SZF), wherein the transformation f... | 08/12/2008 |
| 7408649 | Method and apparatus for optically analyzing a surface Apparatus and methods are provided for analyzing surface characteristics of a test object using broadband scanning interferometry. Test objects amenable to these apparatus and methods include but are not limited to semiconductor wafers, semiconductor devices, metall... | 08/05/2008 |
| 7400988 | Periodic jitter (PJ) measurement methodology Methodologies are disclosed for analyzing periodic jitter is a signal pattern using a continuous time interval analyzer. Sampled signal patterns may be correlated using time interval error calculations to determine start and stop sequences within sampled blocks of s... | 07/15/2008 |
| 7401007 | Method, computer program and apparatus for extracting large size signal data samples with an automatically adjusted decimation ratio A method for rapidly extracting data file samples with an a signal monitor and an automatically adjusted decimation ratio is provided to solve the long-standing problems caused by large data files and small buffers by reducing a large data segment to a smaller, more... | 07/15/2008 |
