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| Number | Title | Issue Date |
| 4688168 | High speed data transfer method and apparatus A high speed data transfer method and apparatus. A high speed data bus includes separate data transfer and master control bus portions. A system host computer loads a sequence of source and destination addresses corresponding to communications units coupl... | 08/18/1987 |
| 4653112 | Image data management system Digitized image data provided by plural diverse non-destructive test apparatus is organized in a common format and routed, via a high speed continuous ring-type data transmission network, to a mass data storage system for redundant storage. Stored image d... | 03/24/1987 |
| 4622630 | Data processing system having unique bus control protocol In a data processing system which uses a common bus for communication of address and data information among a plurality of system components, a bus timing technique uses a clock signal having a transfer time period which comprises a plurality of subperiod... | 11/11/1986 |
| 4621318 | Multiprocessor system having mutual exclusion control function A multiprocessor system includes a plurality of processors which are respectively connected to a memory device and each of which produces a first control signal when executing a test-and-set instruction and a second control signal after executing a sequen... | 11/04/1986 |
| 4620286 | Probabilistic learning element A probabilistic learning element for performing task independent sequential pattern recognition. The element receives sequences of objects and outputs sequences of recognized states composed of objects. A plurality of memory elements are utilized to store... | 10/28/1986 |
| 4606066 | Programmable image processor Disclosed is an image processor that processes desired image data according to a program. In the image processor, the addressing desired pixels which is stored in an image memory is performed by an address processor, and a partial image taken out of the i... | 08/12/1986 |
| 4593367 | Probabilistic learning element A probabilistic learning element particularly adapted for use as a task independent sequential pattern recognition device receives sequences of objects and outputs sequences of recognized states composed of objects and includes a plurality of memories for... | 06/03/1986 |
| 4577344 | Vision system A system for sensing, processing and analyzing images includes a camera assembly for sensing a workpiece image and generating video signals representing the sensed images. The video signals are fed through a multiplexer to a vision processor and a display... | 03/18/1986 |
| 4507760 | First-in, first-out (FIFO) memory configuration for queue storage A first-in, first-out queue has a random access memory (RAM) for storing a plurality of information words, seriatim. A controller is used to insure that only after a complete message, comprising the information words, has been received will a word of that... | 03/26/1985 |
| 4497019 | Programmable control system for controlling at least two parameters in a predetermined sequence using both analog and digital control signals A method and apparatus for controlling a work function, such as, for example, welding, requiring the control of at least one parameter according to a predetermined sequence, the apparatus including at least one work station where the work function is carr... | 01/29/1985 |
| 4445174 | Multiprocessing system including a shared cache A control system for interlocking processors in a multiprocessing organization. Each processor has its own high speed store in buffer (SIB) cache and each processor shares a common cache with the other processors. The control system insures that all proce... | 04/24/1984 |
| 4410944 | Apparatus and method for maintaining cache memory integrity in a shared memory environment A data processing system having a plurality of processors and a plurality of dedicated and shared memory modules. Each processor includes a cache for speeding up data transfers between the processor and its dedicated memory and also between the processor ... | 10/18/1983 |
| 4371929 | Multiprocessor system with high density memory set architecture including partitionable cache store interface to shared disk drive memory In a multiprocessor system, a controllable cache store interface to a shared disk memory employs a plurality of storage partitions whose access is interleaved in a time domain multiplexed manner on a common bus with the shared disk to enable high speed sh... | 02/01/1983 |
| 4348725 | Communication line service interrupt technique for a communications processing system A programmable communications processor is coupled to execute instructions of programs designed to process the transfer of information between a plurality of communication channels and a main memory included in the system. A software implemented and contr... | 09/07/1982 |
| 4215395 | Dual microprocessor intelligent programmable process control system An intelligent programmable process control system for controlling industrial processing and manufacturing equipment and the like utilizes a unique system of cooperating multiple microprocessors. A multi-bit microprocessor is utilized for controlling the ... | 07/29/1980 |
| 4212057 | Shared memory multi-microprocessor computer system A multiprocessor microcomputer system having two or more substantially independent processors each of which has its own bus-type interconnection structure, and a shared memory accessible by any of the processors without interferring with the proper operat... | 07/08/1980 |
| 4118771 | Numerical control system for machine tools A numerical control system for machining centers, having a RAM and two groups of peripheral units, comprises two proessors interconnected by means of a common signal bus and adapted to operate simultaneously sharing access automatically to the RAM and to ... | 10/03/1978 |
| 4109185 | Servo system employing digital components A servo system, particularly well suited for use in a computerized numerical control system for a large machine tool, in which a plurality of axis controlling servo circuits are controlled by one computerized axis controller. As each controlled axis moves... | 08/22/1978 |
