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| Number | Title | Issue Date |
| 7415318 | Method and apparatus for manufacturing semiconductor device Concerning a plurality of wafers which compose one lot, amounts of misalignment between alignment marks of these wafers and alignment patterns transferred on photoresists are measured in advance, and then, a mutual relation between a thickness of an interlayer diele... | 08/19/2008 |
| 7415319 | Lithographic apparatus and device manufacturing method Correcting for misalignment of a substrate before it is exposed is performed using offset corrections and process corrections that are calculated based on alignment offset measurements of alignment marks and overlay measurements of overlay targets on substrates in p... | 08/19/2008 |
| 7412299 | Process for determining the temperature of a semiconductor wafer in a rapid heating unit The invention relates to a process for determining at least one state variable from a model of an RTP system by means of at least one measurement signal measured on the RTP system—the measurement value—which has a dependency upon the state variable to be determi... | 08/12/2008 |
| 7409306 | System and method for estimating reliability of components for testing and quality optimization A system and method for determining the early life reliability of an electronic component, including classifying the electronic component based on an initial determination of a number of fatal defects, and estimating a probability of latent defects present in the el... | 08/05/2008 |
| 7409260 | Substrate thickness measuring during polishing A method for determining a polishing endpoint includes obtaining spectra from different zones on a substrate during different times in a polishing sequence, matching the spectra with indexes in a library and using the indexes to determining a polishing rate for each... | 08/05/2008 |
| 7409253 | System and method for processing a substrate and program therefor A substrate processing system allows to reduce the number of works that should be done by a software engineer. The system 100 includes a substrate processing apparatus 101; a substrate processing controller 102 for controlling the substrate proc... | 08/05/2008 |
| 7409249 | Error display system Upon detection of an error such as a malfunction occurring at a drive mechanism, a sensor transmits an error signal to a control section. The control section selects character information about details of the error corresponding to the error signal and an image repr... | 08/05/2008 |
| 7406360 | Method for detecting transfer shift of transfer mechanism and semiconductor processing equipment A dummy substrate (17) differs from a substrate to be processed in having a first guide (G1) for assisting centering, however, it can be handled as a substitute of the substrate to be processed. In a process chamber (2), a second guide (G2 | 07/29/2008 |
| 7403831 | Manufacturing apparatus, processing method and device manufacturing method A semiconductor manufacturing apparatus which processes a lot in accordance with the content of a queue table in which a process of a lot is reserved includes a volatile memory configured to store the queue table, and a controller configured to store, in a nonvolati... | 07/22/2008 |
| 7403832 | Method and system for advanced process control including tool dependent machine constants A controller and a method of controlling a process tool is provided, in which machine constants used for calibrating manipulated variables of the control algorithm are explicitly introduced into the process model, thereby providing an enhanced controller behavior im... | 07/22/2008 |
| 7403259 | Lithographic processing cell, lithographic apparatus, track and device manufacturing method A rework station and a metrology device(s) are incorporated into a lithographic processing cell so that a faulty substrate can be reworked directly and reprocessed without, for example, an overhead involved in changing masks, etc. ... | 07/22/2008 |
| 7403834 | Methods of and apparatuses for controlling process profiles Presented are methods and apparatus for controlling the processing of a substrate during a process step that is sensitive to one or more process conditions. One embodiment includes a method performed with corresponding apparatus that includes a controller. One step ... | 07/22/2008 |
| 7403882 | Material handling system enabling enhanced data consistency and method thereof Material handling systems that enable enhanced data consistency, and methods thereof, are disclosed. Behavior and life cycle of a semiconductor product for a material handling system are modeled in a set of finite states and trigger paths. A trigger event correspond... | 07/22/2008 |
| 7404167 | Method for improving design window A method of forming photo masks having rectangular patterns and a method for forming a semiconductor structure using the photo masks is provided. The method for forming the photo masks includes determining a minimum spacing and identifying vertical conductive featur... | 07/22/2008 |
| 7400934 | Methods and apparatus for polishing control A CMP station can be closed loop controlled by using data obtained by an inline metrology station from a first polished wafer to affect the processing of subsequent polished wafers. The first wafer is polished and measured by the inline metrology station. The metrol... | 07/15/2008 |
| 7401319 | Method and system for reticle-wide hierarchy management for representational and computational reuse in integrated circuit layout design A hierarchical representation encapsulates the detailed internal composition of a sub-circuit using the notion of a cell definition (a CellDef). The CellDef serves as a natural unit for operational reuse. If the computation required for the analysis or manipulation ... | 07/15/2008 |
| 7399364 | Hermetic cap layers formed on low-κ films by plasma enhanced chemical vapor deposition A method of forming a cap layer over a dielecrtic layer on a substrate including forming a plasma from a process gas including oxygen and tetraethoxysilane, and depositing the cap layer on the dielectric layer, where the cap layer comprises a thickness of about 600 ... | 07/15/2008 |
| 7395131 | Method for processing data based on the data context A method for managing collected data in a semiconductor processing environment. The collected data can include: raw data collected during a process, trace file data received during a process, and process log file data received during a process. The raw data is synch... | 07/01/2008 |
| 7395518 | Back end of line clone test vehicle A test vehicle comprises at least one product layer having a east one product circuit pattern on the product layer, and one or more clone layers formed over the product layer (1902). The one or more clone layers include a plurality of structures, which may in... | 07/01/2008 |
| 7395129 | Method for optimization of an order of component mounting, apparatus using the same, and mounter An optimizing apparatus for optimizing a mounter equipped with a line gang pickup head which picks up a plurality of components and mounts them on a board. The apparatus includes a nozzle set determination unit for determining a nozzle set which reduces a mounting t... | 07/01/2008 |
| 7395130 | Method and system for aggregating and combining manufacturing data for analysis A method and system for aggregating and combining manufacturing data for analysis for the purposes of increasing manufacturing efficiency and reducing manufacturing downtime due to abnormal conditions. An embodiment provides for a method of dividing an entire manufa... | 07/01/2008 |
| 7392106 | Fabrication system and fabrication method A fabricating method for a system that includes a plurality of processing apparatuses connected to each other by an inter-apparatus transporter and a computer storing managing information of processing and transporting of semiconductor wafers. The processing apparat... | 06/24/2008 |
| 7392104 | Material reservation distribution system and method The present invention relates to a system and methodology facilitating material-driven processing in an industrial controller environment. Various models supported by database objects are provided to automatically and dynamically map inventory systems/processes to c... | 06/24/2008 |
| 7388979 | Method and apparatus for inspecting pattern defects The present invention relates to a pattern defect inspection method and apparatus that reveal ultramicroscopic defects on an inspection target in which ultramicroscopic circuit patterns are formed, and inspect the defects with high sensitivity and at a high speed. T... | 06/17/2008 |
| 7387866 | Photolithography process using multiple anti-reflective coatings A method for fabricating an integrated circuit using a photo-lithographic process includes the steps of placing at least two anti-reflective coating layers between a reflective surface and another material. The indices of refraction, absorptions, and thicknesses of ... | 06/17/2008 |
| 7389155 | Method and system for improved trajectory planning and execution A trajectory planning process receives data generated by high-level control software. This data defines positions and scan velocities. The trajectory planning process creates sequences of constant acceleration intervals that allow critical motions to be executed at ... | 06/17/2008 |
| 7386420 | Data analysis method for integrated circuit process and semiconductor process A data analysis method for an integrated circuit process is described, for analyzing the results of at least an in-line quality test, a product test and a yield test done to the products of the IC process. The products are divided into a normal group and an abnormal... | 06/10/2008 |
| 7383093 | Substrate processing apparatus and substrate processing method A substrate processing apparatus of the invention comprises a transfer schedule creating section, a transfer schedule storage section, a transfer control section which controls, by referring to the transfer schedule, plural transfer mechanisms so as to transfer a su... | 06/03/2008 |
| 7383095 | Integration system and the method for operating the same An integration system for obtaining a set of overlay offset parameters of a first process layer which is going to be formed in an assigned photolithography tool with an assigned mask and an assigned pre-tool. By using the integration system, the set of overlay offse... | 06/03/2008 |
| 7379785 | Substrate processing system, coating/developing apparatus, and substrate processing apparatus In a coating and developing apparatus that forms a resist film on substrates such as semiconductor wafers, and develops substrates exposed by an aligner, times after the aligner unloads substrates until heating units (PEB) start heating the substrates are kept unifo... | 05/27/2008 |
| 7376481 | Methods and control systems for controlling semiconductor device manufacturing processes A method of controlling a semiconductor device manufacturing process for a product which is newly applied and a control system for the same process are provided. According to an embodiment on the control method, a sample process time for a product applied to the sem... | 05/20/2008 |
| 7375035 | Host and ancillary tool interface methodology for distributed processing A host and ancillary tool interface methodology for distributed processing is described. The host tool manages a process, except for the generation of a product used in the process. To generate the product, the host tool provides an indication to an ancillary tool t... | 05/20/2008 |
| 7376260 | Method for post-OPC multi layer overlay quality inspection A method for performing post-optical proximity correction (OPC) multi layer overlay quality inspection includes the steps of generating a virtual target mask for a first mask and a second mask overlay using design rules at least partially defining the relationship b... | 05/20/2008 |
| 7373211 | Graphical user interface for compliance monitoring in semiconductor wafer fabrication and method of operation A system and method is disclosed for allocating multi-function resources among a plurality of tasks within a process system in semiconductor wafer fabrication. A resource allocator allocates multi-function resources among tasks within a process system that executes ... | 05/13/2008 |
| 7373216 | Method and apparatus for verifying a site-dependent wafer The present invention includes a method of verifying a Site-Dependent (S-D) wafer that includes receiving a first set of S-D wafers by one or more S-D processing elements in one or more processing subsystems, creating a first set of unverified S-D wafers by performi... | 05/13/2008 |
| 7371067 | Simulation method for designing customized medical devices The invention provides a system for virtually designing a medical device conformed for use with a specific patient. Using the system, a three-dimensional geometric model of a patient-specific body cavity or lumen is reconstructed from scanned volume images such as o... | 05/13/2008 |
| 7371695 | Use of TEOS oxides in integrated circuit fabrication processes A method for manufacturing a low temperature removable silicon dioxide hard mask for patterning and etching is provided, wherein tetra-ethyl-ortho-silane (TEOS) is used to deposit a silicon dioxide hard mask. ... | 05/13/2008 |
| 7373213 | Management system and apparatus, method therefor, and device manufacturing method A management apparatus which manages a parameter for an industrial device acquires AGA measurement results obtained by operating the industrial device with an operation job parameter value and non-operation job parameter value. An inspection apparatus acquires an â€... | 05/13/2008 |
| 7371152 | Non-uniform subaperture polishing A method for subaperture polishing includes determining a first portion of a sample to be polished disproportionately compared to a second portion of the sample. Based on the determination of the first portion, a sweep frequency that is a first rate of lateral motio... | 05/13/2008 |
| 7373215 | Transistor gate shape metrology using multiple data sources The claimed subject matter can provide a mechanism for ascertaining a variety of metrological data relating to one or more features (e.g., a transistor gate) of a chip/wafer. In addition, results of electrical testing on the chip/wafer can also be gathered and, toge... | 05/13/2008 |