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| Number | Title | Issue Date |
| 7155360 | Process variation detector and process variation detecting method A process variation detector includes a pulse-signal generating unit that generates a pulse signal having a pulse width corresponding to a characteristic of a process variation in an integrated circuit based on a clock signal; and an output unit that generates a pre... | 12/26/2006 |
| 6967150 | Method of forming self-aligned contact in fabricating semiconductor device According to some embodiments of the invention, a method of forming a self-aligned contact of a semiconductor device includes forming a plurality of conductive lines that are spaced apart from each other and pass over a plurality of conductive regions. An insulating... | 11/22/2005 |
| 6887775 | Process and apparatus for epitaxially coating a semiconductor wafer and epitaxially coated semiconductor wafer A process for epitaxially coating the front surface of a semiconductor wafer in a CVD reactor, the front surface of the semiconductor wafer being exposed to a process gas which contains a source gas and a carrier gas, and the back surface of the semiconductor wafer ... | 05/03/2005 |
| 6638781 | Semiconductor device and method of fabricating the same There is provided a high quality liquid crystal panel having a thickness with high accuracy, which is designed, without using a particulate spacer, within a free range in accordance with characteristics of a used liquid crystal and a driving method, and i... | 10/28/2003 |
| 6638776 | Thermal characterization compensation A method of standardizing a fabrication process for an integrated circuit. The fabrication process includes a preceding thermal energy sensitive process and at least one set of selectable succeeding thermal energy delivery processes. An integrated circuit... | 10/28/2003 |
| 6559064 | Method and apparatus for removing photoresist on semiconductor wafer For removing a photoresist formed on a semiconductor wafer by using an ozone-dissolved water, until just before a low temperature ozone-dissolved water generated by an ozone-dissolved water generator is discharged from a discharge nozzle onto a semiconduc... | 05/06/2003 |
| 5879970 | Process of growing polycrystalline silicon-germanium alloy having large silicon content Polycrystalline silicon-germanium alloy is grown on a glass substrate through a chemical vapor deposition under the conditions where the substrate temperature ranges from 350 degrees to 450 degrees in centigrade, the ratio between gas flow rate of Si... | 03/09/1999 |
| 5728259 | Process for fabricating thin-film semiconductor device without plasma induced damage Disclosed herein is a process for fabricating a thin-film semiconductor device which includes (1) a step of etching a silicon film by wet etching or gas etching, the former employing a liquid containing hydrazine or ethylene diamine, the latter employing ... | 03/17/1998 |
| 5707879 | Neutron detector based on semiconductor materials A neutron radiation detector is described. A semiconductor material is populated with helium three (3 He) atoms to increase its overall neutron capture efficiency. Upon capture of a neutron by a 3 He atom, a tritium ion and a proton ... | 01/13/1998 |
| 5698469 | Method of making a hybrid circuit with a chip having active devices with extra-chip interconnections A process of connecting a plurality of essentially identical active devices is presented for the purpose of multifunction and multiple function operation. These devices, mounted on a chip, are flip-mounted to a circuit motherboard having large passive ele... | 12/16/1997 |
| 5674758 | Silicon on insulator achieved using electrochemical etching Bulk crystalline silicon wafers are transferred after the completion of circuit fabrication to form thin films of crystalline circuitry on almost any support, such as metal, semiconductor, plastic, polymer, glass, wood, and paper. In particular, this tech... | 10/07/1997 |
| 5670388 | Method of making contacted body silicon-on-insulator field effect transistor Structures and methods are presented for forming a body-substrate connector for an SOI FET. The connector is formed substantially co-aligned with the gate conductor on a side of the device that does not interfere with source and drain. The body is thus he... | 09/23/1997 |
| 5663075 | Method of fabricating backside illuminated FET optical receiver with gallium arsenide species A photo FET device having a large area backside optical energy reception surface is disclosed. The photo FET device is fabricated in the source gate and drain upward configuration and then inverted onto a new permanent substrate member and an original sur... | 09/02/1997 |
| 5651860 | Ion-implanted resist removal method A method of removing a resist layer formed on a substrate wherein the resist layer includes an ion-implanted upper region. The method includes hydrogenating the ion implanted upper region of the resist layer resulting in the hydrogenated ion-implanted upp... | 07/29/1997 |
| 5575886 | Method for fabricating semiconductor device with chemical-mechanical polishing process for planarization of interlayer insulation films The method for fabricating a semiconductor device disclosed is one in which an insulation film is formed on a metal interconnect by an Electron Cyclotron Resonance Chemical Vapor Deposition (ECR CVD) process capable of applying a radio frequency bias to a... | 11/19/1996 |
| 5567644 | Method of making a resistor Disclosed are methods of forming resistors and diodes from semiconductive material, and static random access memory (SRAM) cells incorporating resistors, and to integrated circuitry incorporating resistors and diodes. A node to which electrical connection... | 10/22/1996 |
| 5563095 | Method for manufacturing semiconductor devices A method of continuous manufacture of semiconductor integrated circuits, said method and apparatus adapted to contain the semiconductor substrate, semiconductor deposition coating processes, and etching processes within a substantially collocated series o... | 10/08/1996 |
| 5468657 | Nitridation of SIMOX buried oxide A method is provided for improving the electrical isolation between surface regions and underlying support regions in SIMOX buried oxide wafers. The method implants nitrogen ions into a wafer to approximately the same depth as oxygen ions are implanted du... | 11/21/1995 |
| 5454902 | Production of clean, well-ordered CdTe surfaces using laser ablation Chemically-etched and or sputtered CdTe surfaces are exposed to UV excimer laser radiation at a fluence ranging from about 15 to 75 mJ/cm2, followed by either a low temperature ( | 10/03/1995 |
| 5448488 | Computer-controlled individual chip management system for processing wafers Chips formed on respective wafers are numbered. A map in which chip positions are correlated with chip numbers is created. A process is specified for each individual chip. A host computer creates processing information from inputted lot information for ea... | 09/05/1995 |
| 5434090 | Processing chamber for processing semiconductor substrates A solid metal-gettering material is used between walls of a double-walled processing chamber, such as a furnace tube and an RTP chamber. The solid metal-gettering material getters metal before the metal reaches the substrate within the processing zone of ... | 07/18/1995 |
| 5420075 | Forming multi-layered interconnections with fluorine compound treatment permitting selective deposition of insulator A method of manufacturing a semiconductor device, incorporates the steps of: performing reactive ion etching using a fluorine compound gas to surface-treat the lower level wirings which permits selective deposition of the second silicon oxide film; select... | 05/30/1995 |
| 5407838 | Method for fabricating a semiconductor device using implantation and subsequent annealing to eliminate defects A method for fabricating a semiconductor device including carrying out an ion implantation into a predetermined region of a single-crystal silicon substrate to form therein an amorphized ion-implanted layer according to any one of the methods: (A) implant... | 04/18/1995 |
| 5378317 | Method for removing organic film The method for removing organic film according to the present invention is very effective for removing a photo resist film in a process for manufacturing semiconductor device. A substrate (32) having a photo resist film (31) formed on it is processed in a... | 01/03/1995 |
| 5375061 | Manufacturing management and apparatus for a semiconductor device A production management method in a production system for semiconductor devices uses processing progress information for each of the plural number of manufacturing apparatus as the basis for performing start allocation of a plural number of next start pro... | 12/20/1994 |
| 5328549 | Method of producing sheets of crystalline material and devices made therefrom A method of producing sheets of crystalline material is disclosed, as well as devices employing such sheets. In the method, a growth mask is formed upon a substrate and crystalline material is grown at areas of the substrate exposed through the mask and l... | 07/12/1994 |
| 5300451 | Process for forming a buried drain or collector region in monolithic semiconductor devices The invention relates to a process for forming a buried drain or collector region in monolithic semiconductor devices comprising an integrated control circuit and one or more power transistors with vertical current flow integrated in the same chip. The pr... | 04/05/1994 |
| 5262351 | Process for manufacturing a multilayer integrated circuit interconnection The invention is a method of producing a multilayer polymer-metal system to interconnect integrated circuits which allows two-dimensional electrical and/or optical connections between components, in which a first layer of polymer is deposited on a rigid s... | 11/16/1993 |
| 5217564 | Method of producing sheets of crystalline material and devices made therefrom A method of producing sheets of crystalline material is disclosed, as well as devices employing such sheets. In the method, a growth mask is formed upon a substrate and crystalline material is grown at areas of the substrate exposed through the mask and l... | 06/08/1993 |
| 5210045 | Dual dielectric field effect transistors for protected gate structures for improved yield and performance in thin film transistor matrix addressed liquid crystal displays A dual dielectric structure is employed in the fabrication of thin film field effect transistors in a matrix addressed liquid display to provide improved transistor device characteristics and also to provide both electrical and chemical isolation for mate... | 05/11/1993 |
| 5177030 | Method of making self-aligned vertical intrinsic resistance A self-aligned vertical intrinsic resistance for use in semiconductor devices is developed. The self-aligned vertical intrinsic resistance may be used in a variety of designs, such as functioning as a pullup device in integrated circuits and more specific... | 01/05/1993 |
| 5132240 | Method for manufacturing a semiconductor device A method for manufacturing a semiconductor device including steps of (i) laminating a first insulating film over a semiconductor substrate having a plurality of gate electrodes, on which side walls are at least formed, through capacitor formation regions,... | 07/21/1992 |
| 5126008 | Corrosion-free aluminum etching process for fabricating an integrated circuit structure A process is described for plasma-assisted etching of an aluminum layer to form aluminum lines while fabricating an integrated circuit structure on a semiconductor wafer using one or more bromine-containing etch gases, and optionally SF6 in com... | 06/30/1992 |
| 5120676 | Use of phosphine and arsine compounds in chemical vapor deposition and chemical doping A MOCVD process for depositing an arsenic-containing film or a phosphorous-containing film utilizing a diprimary phosphine or arsine or an unsaturated hydrocarbon phosphine or arsine.... | 06/09/1992 |
| 5077238 | Method of manufacturing a semiconductor device with a planar interlayer insulating film A method of manufacturing a semiconductor device in which an element is flattened by improving a technique of forming an interlayer insulating film. A thick insulating film having a film thickness necessary for a convexo-concave pattern to be flattened is... | 12/31/1991 |
| 5063174 | Si/Au/Ni alloyed ohmic contact to n-GaAs and fabricating process therefor An improved alloyed ohmic contact to n-type GaAs is provided utilizing a Si-based metallization of Si/Au/Ni and exhibiting low contact resistivity and high thermal stability. An improved process for fabricating the inventive contact is also provided compr... | 11/05/1991 |
| 5037766 | Method of fabricating a thin film polysilicon thin film transistor or resistor A method of fabricating a double layered polisilicon film with oxygen diffusion for scaled down polysilicon thin film transistor/resistor. The double layered polysilicon film structure includes: a first heavily doped polysilicon layer, produced by Low Pre... | 08/06/1991 |
| 5028562 | Method for producing a semiconductor laser using selective epitaxy A semiconductor laser includes, serially disposed, a semiconductor substrate of a first conductivity type, a semiconductor current blocking layer of a second conductivity type opposite the first conductivity tyupe, a first semiconductor cladding layer of ... | 07/02/1991 |
| 4994401 | Method of making a thin film transistor A source electrode and a drain electrode are formed apart on an insulating substrate, and a semiconductor layer is formed on the substrate between the source and drain electrodes. An insulating organic molecular film is formed all over the source and drai... | 02/19/1991 |
| 4954865 | Integrated circuits An integrated circuit structure has a number of device areas each of which is configurable in a subsequent customizing process as a field effect transistor, a bipolar transistor or as a pair of those devices. Configuration of the structure is determined b... | 09/04/1990 |
