Did You Know...
...that in 1800 ether was first used by partyers as a fun diversion? Sniffing the gas led to hilarious and raucous laughter as people watched each other become more and more intoxicated and silly. Several doctors independently realized the value ether would have to anesthetize surgery patients. Of those who claimed rights to the "discovery," none had a happy ending. One had a seizure and died defending his rights. Another spent his life in an asylum because he had been denied acclaim. A third became addicted to chloroform and, in a New York City jail, he soaked a cloth in the drug, severed an artery and bled to death.
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| Number | Title | Issue Date |
| 7374983 | Semiconductor device and manufacturing method thereof Manufacture of TFTs corresponding to various circuits makes structures thereof complex, which involves a larger number of manufacturing steps. Such an increase in the number of the manufacturing steps leads to a higher manufacturing cost and a lower manufacturing yi... | 05/20/2008 |
| 7354856 | Method for forming dual damascene structures with tapered via portions and improved performance The manufacture of damascene structures having improved performance, particularly, but not by way of limitation, dual damascene structures is provided. In one embodiment, a substrate having a conductive layer is formed in a first insulating layer. A protective layer... | 04/08/2008 |
| 7351661 | Semiconductor device having trench isolation layer and a method of forming the same A semiconductor device having a trench isolation layer in a semiconductor substrate is provided, wherein the trench isolation layer includes a silicon nitride liner, a silicon oxide liner; and a buried layer, wherein the buried layer includes a first buried layer fo... | 04/01/2008 |
| 7303648 | Via etch process Systems and techniques relating to etching vias in integrated circuit devices, in one implementation, include: providing a dielectric material and a conductive material, removing a first portion of the dielectric material to form a hole in the dielectric material, p... | 12/04/2007 |
| 7291283 | Combined wet etching method for stacked films and wet etching system used for same A combined wet etching method for stacked films which is capable of performing etching processes in a collective manner while controlling an amount of side-etching on each of stacked films and of making uniform side edges. In the wet etching method, two or more type... | 11/06/2007 |
| 7273824 | Semiconductor structure and fabrication therefor A semiconductor structure and a method of fabrication there-for are provided. The semiconductor structure comprises a substrate, a dielectric layer disposed over the substrate, a hydrophilic material layer disposed over the dielectric layer, and a hardmask layer dis... | 09/25/2007 |
| 7238609 | Method for fabricating semiconductor device A method for fabricating a semiconductor device has the steps of forming a conductive film on a substrate, forming an insulating film such that the conductive film is covered with the insulating film, forming, in the insulating film, a hole having a bottom portion n... | 07/03/2007 |
| 7229848 | Method and apparatus for fabricating self-assembling microstructures A method and apparatus for assembling microstructures onto a substrate through fluid transport. The microstructures being shaped blocks self-align into recessed regions located on a substrate such that the microstructure becomes integral with the substrate. The impr... | 06/12/2007 |
| 7211517 | Semiconductor device and method that includes reverse tapering multiple layers A method of manufacturing a semiconductor device of the present invention includes (a) sequentially forming a gate insulating film 14, a first conductive layer 15 and a first insulating film 16 on a semiconductor layer 13 provided on an i... | 05/01/2007 |
| 7183217 | Dry-etching method A dry-etching method using an apparatus where a wafer is placed on either of a pair of opposed electrodes provided in an etching chamber, and high-frequency power is supplied to both the opposed electrodes to effect a plasma etching. The plasma etching uses a gas co... | 02/27/2007 |
| 7101786 | Method for forming a metal line in a semiconductor device Provided is a method for forming a metal line in a semiconductor device. The method forms round portions at top edges of an insulation film by means of a polymer and then etches the rest portion (i.e., sidewall parts) in an almost vertical direction, which makes it ... | 09/05/2006 |
| 7071563 | Barrier layer for interconnect structures of a semiconductor wafer and method for depositing the barrier layer An interconnect structure of a semiconductor device includes a tungsten plug (14) deposited in a via or contact window (11). A barrier layer (15) separates the tungsten plug (14) from the surface of a dielectric material (16) withi... | 07/04/2006 |
| 7052956 | Method for forming capacitor of semiconductor device Disclosed is a method for manufacturing a capacitor of a semiconductor device. The method includes the steps of providing a substrate having a storage node plug, forming a PE-TEOS layer and a hard mask exposing a storage node contact area on the substrate, forming a... | 05/30/2006 |
| 7052952 | Method for forming wire line by damascene process using hard mask formed from contacts A method for forming a wire line by a damascene process includes forming a first insulating layer on a semiconductor substrate, etching the first insulating layer to form a contact hole, and forming a first conductive layer over the first insulating layer that fills... | 05/30/2006 |
| 7018892 | Semiconductor capacitor structure and method for manufacturing the same In one embodiment, a semiconductor device comprises a base and a tapered wall formed on the base. The wall has a midline and also has an inner sidewall and an outer sidewall. The inner sidewall and the outer sidewall are substantially symmetrical with each other in ... | 03/28/2006 |
| 6987054 | Method of fabricating a semiconductor device having a groove formed in a resin layer A semiconductor device has a resin package layer on a principal surface of a semiconductor chip, on which a number of bump electrodes are formed, wherein the semiconductor device has a chamfer surface or a stepped surface on a top edge part such that the external sh... | 01/17/2006 |
| 6969673 | Semiconductor device with gate space of positive slope and fabrication method thereof Embodiments of the invention provide a semiconductor device and a fabrication method for a semiconductor device that includes the processes of forming multiple gates on a silicon substrate, forming a gate spacer having a positive slope at the gate spacer edge, depos... | 11/29/2005 |
| 6953746 | Method of manufacturing a semiconductor apparatus with a tapered aperture pattern to form a predetermined line width When a hole pattern is formed on a film to be processed, a matching deviation margin at a lithography step is reserved by making a diameter of a bottom of a hole substantially equal to a diameter of an aperture of the hole. The method for manufacturing the semicondu... | 10/11/2005 |
| 6949478 | Oxide film forming method A method of forming an oxide film having high insularity capability is performed within an ultra clean environment, using charged particles. ... | 09/27/2005 |
| 6949776 | Heterojunction bipolar transistor with dielectric assisted planarized contacts and method for fabricating A heterojunction bipolar transistor (HBT) is disclosed that includes successive emitter, base and collector and sub-collector epitaxial layers and emitter, base and collector contact metals contacting the emitter, base and sub-collector layers respectively. A passiv... | 09/27/2005 |
| 6930376 | Semiconductor device having a folded layer structure An upper reflecting layer in a main region, a first support region and a second support region is separated from an upper reflecting layer in the surrounding region by separating grooves. The first support region and the second support region are folded in a valley ... | 08/16/2005 |
| 6913705 | Manufacturing method for optical integrated circuit having spatial reflection type structure A manufacturing method for an optical integrated circuit including a spatial reflection type structure having a perpendicular end surface and an inclined surface formed in an optical waveguide layer. The manufacturing method includes the steps of applying a first ph... | 07/05/2005 |
| 6908862 | HDP-CVD dep/etch/dep process for improved deposition into high aspect ratio features A method of depositing a film on a substrate disposed in a substrate processing chamber. The method includes depositing a first portion of the film by forming a high density plasma from a first gaseous mixture flown into the process chamber. The deposition processes... | 06/21/2005 |
| 6872650 | Ball electrode forming method A ball electrode forming method comprises steps of: preparing a semiconductor apparatus having a plurality of electrode pads; arranging a mask having an upper surface and a lower surface, an area in the lower surface being larger than an area in the upper surface, a... | 03/29/2005 |
| 6858542 | Semiconductor fabrication method for making small features A semiconductor fabrication method that includes forming a film (109) comprising an imaging layer (112) and an under layer (110) over a semiconductor substrate (102). The imaging layer (112) is patterned to produce a printed featur... | 02/22/2005 |
| 6852653 | Method of manufacturing semiconductor substrate, semiconductor substrate, electro-optical apparatus and electronic equipment A method of manufacturing a semiconductor substrate (7) includes the processes of: forming an insulation film (2) on a surface of a semiconductor substrate main body (1); forming an ion shield member (3) having a predetermined shape on th... | 02/08/2005 |
| 6852615 | Ohmic contacts for high electron mobility transistors and a method of making the same A process and related product in which ohmic contacts are formed in High Electron Mobility Transistors (HEMTs) employing compound substrates such as gallium nitride. An improved device and an improvement to a process for fabrication of ohmic contacts to GaN/AlGaN HE... | 02/08/2005 |
| 6841472 | Semiconductor device and method of fabricating the same A semiconductor device is provided with a semiconductor substrate, a gate insulation film formed on the semiconductor substrate, a gate electrode formed on the gate insulation film and having a portion increasing upward in the length along a gate length direction, a... | 01/11/2005 |
| 6774006 | Microelectronic device fabricating method, and method of forming a pair of field effect transistor gate lines of different base widths from a common deposited conductive layer A microelectronic device fabricating method includes providing a substrate having a mean global outer surface extending along a plane. A first portion is formed over the substrate comprising a straight linear segment which is angled from the plane and forming a seco... | 08/10/2004 |
| 6740569 | Method of fabricating polysilicon film by excimer laser annealing process A method of fabricating a polysilicon film by an excimer laser annealing process is introduced. First, an amorphous silicon film is deposited on a substrate composed of glass. The amorphous silicon film includes a first region, which is located in the center, with a... | 05/25/2004 |
| 6709924 | Fabrication of shallow trench isolation structures with rounded corner and self-aligned gate For fabricating a shallow trench isolation structure, a notched masking structure is formed over an active area of a semiconductor substrate. A shallow trench opening is formed at a side of the active area with a top corner of the shallow trench opening being expose... | 03/23/2004 |
| 6689659 | Method of making semiconductor memory device having a floating gate with a rounded edge A semiconductor memory device having a floating gate and a method of manufacturing the same, where a conductive layer for a floating gate is deposited on a semiconductor substrate and etched to form a conductive layer pattern. An annealing of the semicond... | 02/10/2004 |
| 6680232 | Trench etch with incremental oxygen flow A method for forming trenches in a device layer disposed on a silicon semiconductor substrate comprises: covering the device layer with an etch resistant masking layer to define at least two trench regions; removing semiconductor material from the exposed... | 01/20/2004 |
| 6656808 | Transistor having variable width gate electrode and method of manufacturing the same A transistor includes a substrate and a gate electrode formed on the substrate and having a wider upper portion than lower portion. A spacer is formed on the side wall of the gate electrode from the upper portion to the lower portion of the gate electrode... | 12/02/2003 |
| 6627500 | Method of fabricating nitride read only memory A method of fabricating a nitride read only memory. A trapping dielectric sandwiched structure, including an insulation layer, a charge trap layer and an insulation layer, is formed on a substrate. An opening with indented sidewalls is formed in the insul... | 09/30/2003 |
| 6623998 | Method for manufacturing group III nitride compound semiconductor device A method of manufacturing a group III nitride compound semiconductor device, includes providing a substrate, forming a group III nitride compound semiconductor layer having a device function, and forming an undercoat layer between the substrate and the gr... | 09/23/2003 |
| 6617233 | Process of fabricating an anti-fuse for avoiding a key hole exposed A process of forming an anti-fuse. First, an inter-metal dielectric layer, in which a funnel-shaped via is formed, is formed on a substrate. Next, a first conductive layer is formed over the substrate and filled into the funnel-shaped via. Subsequently, b... | 09/09/2003 |
| 6617234 | Method of forming metal fuse and bonding pad A method of forming metal fuses and bonding pads. A conductive layer is formed in a substrate. A dielectric layer is formed over the substrate. The dielectric layer has an opening that exposes a portion of the conductive layer. A metallic layer is formed ... | 09/09/2003 |
| 6558977 | Semiconductor device and method for fabricating the same In a semiconductor device functioning as a three-dimensional device composed of two semiconductor chips bonded to each other, the back surface of the upper semiconductor chip is polished, the entire side surfaces of the upper semiconductor chip are covere... | 05/06/2003 |
| 6455357 | Thin film transistor and method of fabricating the same A thin film transistor is provided that includes a substrate, a gate electrode formed on the substrate, and a gate insulating layer formed all over the substrate including the gate electrode. A first semiconductor layer is formed on the gate insulating la... | 09/24/2002 |
