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| Number | Title | Issue Date |
| 7439189 | Surface treatment after selective etching The invention concerns a method of treating wafers comprising at least one surface layer of silicon-germanium (SiGe) and a layer of strained silicon beneath the SiGe layer. The strained silicon layer is denuded by a step of selective etching of the SiGe layer by dis... | 10/21/2008 |
| 7402520 | Edge removal of silicon-on-insulator transfer wafer A silicon-on-insulator transfer wafer having a front surface with a circumferential lip around a circular recess is polished. In one version, the circular recess on the front surface of the wafer is masked by filling the recess with spin-on-glass. The front surface ... | 07/22/2008 |
| 7387944 | Method for low temperature bonding and bonded structure A method for bonding at low or room temperature includes steps of surface cleaning and activation by cleaning or etching. One etching process The method may also include removing by-products of interface polymerization to prevent a reverse polymerization reaction to... | 06/17/2008 |
| 7374955 | Method of manufacturing silicon wafer The present invention provides a method of manufacturing a silicon wafer where a defect does not exist at a wafer surface layer part on which a device is formed, without affecting productivity and production costs of the wafer. An ingot of a silicon single cr... | 05/20/2008 |
| 7371603 | Method of fabricating light emitting diode package The invention relates to an LED package and proposes a method of fabricating an LED package including steps of providing a package substrate having a mounting area of an LED and a metal pattern to be connected with the LED, and plasma-treating the package substrate ... | 05/13/2008 |
| RE40139 | Wafer having chamfered bend portions in the joint regions between the contour of the cut-away portion of the wafer A wafer having chamfered bent portions in the joint regions between the contour of the wafer and the cut-away portion of the wafer such as an orientation flatness. The chipping of the wafer can be prevented, and in coating the wafer with a photoresist, forming an ep... | 03/04/2008 |
| 7335572 | Method for low temperature bonding and bonded structure A method for bonding at low or room temperature includes steps of surface cleaning and activation by cleaning or etching. The method may also include removing by-products of interface polymerization to prevent a reverse polymerization reaction to allow room temperat... | 02/26/2008 |
| 7326656 | Method of forming a metal oxide dielectric A semiconductor device comprising a semiconductor body having a top surface and a first and second laterally opposite sidewalls as formed on an insulating substrate is claimed. A gate dielectric is formed on the top surface of the semiconductor body and on the first... | 02/05/2008 |
| 7288418 | Process for treating substrates for the microelectronics industry, and substrates obtained by this process A process for treating substrates for the microelectronics or optoelectronics industry, wherein the substrates include on at least one of their faces a working layer in which components are intended to be formed. The process includes a step of annealing under a redu... | 10/30/2007 |
| 7190050 | Integrated circuit on corrugated substrate By forming MOSFETs on a substrate having pre-existing ridges of semiconductor material (i.e., a “corrugated substrate”), the resolution limitations associated with conventional semiconductor manufacturing processes can be overcome, and high-performance, low-powe... | 03/13/2007 |
| 7166505 | Method for making a semiconductor device having a high-k gate dielectric A method for making a semiconductor device is described. That method includes forming on a substrate a dielectric layer that has a dielectric constant that is greater than the dielectric constant of silicon dioxide. The dielectric layer is modified so that it will b... | 01/23/2007 |
| 7154173 | Semiconductor device and manufacturing method of the same This invention miniaturizes a package of a semiconductor device and simplifies a manufacturing procedure to reduce a manufacturing cost. A semiconductor wafer formed of a plurality of semiconductor chips formed with MEMS devices and wiring thereof on front surface t... | 12/26/2006 |
| 7112545 | Passivation of material using ultra-fast pulsed laser The surface of a semiconductor material, e.g., gallium arsenide, is passivated by irradiating the surface with ultra-short laser pulses, until a stable passive surface is achieved. The passive surface so prepared is devoid of a superficial oxide layer. ... | 09/26/2006 |
| 7071077 | Method for preparing a bonding surface of a semiconductor layer of a wafer A method for preparing a bonding surface of a semiconductor layer of a wafer is described. The method includes treating the bonding surface to oxidize contaminants, and then cleaning the bonding surface to remove essentially all remaining contaminants. Ozone is then... | 07/04/2006 |
| 7057259 | Semiconductor wafer with ID mark, equipment for and method of manufacturing semiconductor device from them A semiconductor wafer has a bevel contour formed along the periphery thereof, products formed on the wafer, and an ID mark formed on the bevel contour. The ID mark shows at least the properties, manufacturing conditions, and test results of the products. ... | 06/06/2006 |
| 7052927 | Pin detector apparatus and method of fabrication A PIN detector device (190) is fabricated on a substrate (10). The substrate (10) includes a handle wafer portion (208), an implanted oxide layer (206), a backside contact layer (204) and an active wafer portion (202)... | 05/30/2006 |
| 7041178 | Method for low temperature bonding and bonded structure A method for bonding at low or room temperature includes steps of surface cleaning and activation by cleaning or etching. The method may also include removing by-products of interface polymerization to prevent a reverse polymerization reaction to allow room temperat... | 05/09/2006 |
| 7029993 | Method for treating substrates for microelectronics and substrates obtained according to said method The invention relates to a method for treating substrates (50) for microelectronics or optoelectronics, whereby said substrates comprise a useful layer (52) on at least one of the surfaces thereof. The inventive method includes a mechanical/chemical po... | 04/18/2006 |
| 7011717 | Method for heat treatment of silicon wafers and silicon wafer According to the present invention, there are provided a method for heat treatment of silicon wafers wherein a silicon wafer is subjected to a heat treatment at a temperature of from 1000° C. to the melting point of silicon in an inert gas atmosphere, and temperatu... | 03/14/2006 |
| 7008886 | Process for treatment of the surface of a semiconducting material, particularly using hydrogen, and surface obtained using this process A process treats a surface of a semiconductor material in order to put the surface into a predetermined electrical state. The semiconductor material is preferably monocrystalline. The process includes (a) preparing the surface of the semiconductor material such that... | 03/07/2006 |
| 7005368 | BUMP FORMING APPARATUS FOR CHARGE APPEARANCE SEMICONDUCTOR SUBSTRATE, CHARGE REMOVAL METHOD FOR CHARGE APPEARANCE SEMICONDUCTOR SUBSTRATE, CHARGE REMOVING UNIT FOR CHARGE APPEARANCE SEMICONDUCTOR SUBSTRATE, AND CHARGE APPEARANCE SEMICONDUCTOR SUBSTRATE The present invention provides a bump forming apparatus (101, 501) which can prevent charge appearance semiconductor substrates (201, 202) from pyroelectric breakdown and physical failures, a method carried out by the bump forming apparatus for removin... | 02/28/2006 |
| 7001845 | Methods of treating surfaces of substrates In one aspect, the invention includes a method of treating a surface of a substrate. A mixture which comprises at least a frozen first material and liquid second material is provided on the surface and moved relative to the substrate. In another aspect, the inventio... | 02/21/2006 |
| 6995077 | Epitaxially coated semiconductor wafer and process for producing it A semiconductor wafer with a front surface and a back surface and an epitaxial layer of semiconducting material deposited on the front surface, wherein the surface of the epitaxial layer has a maximum density of 0.14 localized light scatterers per cm2 wit... | 02/07/2006 |
| 6991944 | Surface treatment for multi-layer wafers formed from layers of materials chosen from among semiconducting materials This invention relates to a process for treatment of a multi-layer wafer with materials having differential thermal characteristics, the process comprising a high temperature heat treatment step that can generate secondary defects, characterised in that this process... | 01/31/2006 |
| 6992016 | Chemical processing method, and method of manufacturing semiconductor device Air trapped in a blind hole during processing of the blind hole with a liquid is eliminated by circulating the liquid along a surface-to-be-processed in substantially a single direction at all times and by setting a velocity gradient of the liquid over the surface t... | 01/31/2006 |
| 6969670 | Selective growth method, and semiconductor light emitting device and fabrication method thereof At the time of selective growth of an active layer on a substrate, crystal is previously grown in an active layer non-growth region, and the active layer is grown in an active layer selective growth region. With this configuration, a source supplied to the non-growt... | 11/29/2005 |
| 6902987 | Method for low temperature bonding and bonded structure A method for bonding at low or room temperature includes steps of surface cleaning and activation by cleaning or etching. One etching process the method may also include removing by-products of interface polymerization to prevent a reverse polymerization reaction to... | 06/07/2005 |
| 6900113 | Method for producing bonded wafer and bonded wafer The present invention provides a method for producing a bonded wafer comprising at least an ion implantation process where at least either hydrogen ions or rare gas ions are implanted into a first wafer from its surface to form a micro bubble layer (implanted layer)... | 05/31/2005 |
| 6884732 | Method of fabricating a device having a desired non-planar surface or profile and device produced thereby A method of fabricating a device having a desired non-planar surface or profile and device produced thereby are provided. A silicon wafer is first coated with silicon nitride, patterned, and DRIE to obtain the desired etch profile. Silicon pillars between trenches a... | 04/26/2005 |
| 6855994 | Multiple-thickness gate oxide formed by oxygen implantation A semiconductor device including a gate oxide of multiple thicknesses for multiple transistors where the gate oxide thicknesses are altered through the growth process of implanted oxygen ions into selected regions of a substrate. The implanted oxygen ions accelerate... | 02/15/2005 |
| 6849555 | Wafer processing apparatus and wafer processing method using the same An integrated in situ cluster type wafer processing apparatus which can be used for forming metal wiring layers having a multi-layered structure and a wafer processing method using the same are provided. The wafer processing apparatus includes a transfer chamber whi... | 02/01/2005 |
| 6833279 | Method of fabricating and repairing ceramic components for semiconductor fabrication using plasma spray process Provided is a method of fabricating and repairing ceramic components for semiconductor fabrication, through which erosion and polymer deposition occurring on ceramic components for semiconductor fabrication are decreased by modifying the dielectric surface of a comp... | 12/21/2004 |
| 6809015 | Method for heat treatment of silicon wafers and silicon wafer According to the present invention, there are provided a method for heat treatment of silicon wafers wherein a silicon wafer is subjected to a heat treatment at a temperature of from 1000° C. to the melting point of silicon in an inert gas atmosphere, and temperatu... | 10/26/2004 |
| 6790777 | Method for reducing contamination, copper reduction, and depositing a dielectric layer on a semiconductor device The present invention relates to a method for improving an interface of a semiconductor device. The method comprises providing a first and second substrate having an oxidized region, and establishing a first loading position in a first process chamber. The first and... | 09/14/2004 |
| 6784020 | Package structure and method for making the same A package structure and method for making devices of system-in-a-package (SiP). Substrates with integrated and assembled elements can be aligned and pre-bonded together, and fluidic encapsulating materials is applied to seal the rest opening of pre-bonded interface ... | 08/31/2004 |
| 6780737 | Method of manufacturing semiconductor device with buried conductive lines A method of manufacturing semiconductor devices with buried conductive lines is disclosed. The method uses an ion implantation process to form buried conductive lines under isolation regions such as shallow trench isolations. The buried conductive lines connect neig... | 08/24/2004 |
| 6734121 | Methods of treating surfaces of substrates In one aspect, the invention includes a method of treating a surface of a substrate. A mixture which comprises at least a frozen first material and liquid second material is provided on the surface and moved relative to the substrate. In another aspect, the inventio... | 05/11/2004 |
| 6720640 | Method for reclaiming delaminated wafer and reclaimed delaminated wafer In a method for reclaiming a delaminated wafer produced as a by-product in the production of bonded wafer by the ion implantation and delamination method, at least ion-implanted layer on a chamfered portion of the delaminated wafer is removed, and then a surface of ... | 04/13/2004 |
| 6674502 | Liquid crystal display with nitrided insulating substrate for TFT A liquid crystal display includes an insulative substrate having a surface treated with an oxygen plasma and a nitrogen-plasma-treated layer formed over said surface of said substrate. A surface of said nitrogen-plasma-treated layer has a nitrogen concent... | 01/06/2004 |
| 6660653 | Dual trench alternating phase shift mask fabrication Fabricating a dual-trench alternating phase shift mask (PSM) is disclosed. A chromium layer over a quartz layer of the PSM is patterned according to a semiconductor design. The quartz layer is dry etched a first number of times through a first photoresist... | 12/09/2003 |
