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Vladimir Zworykin, television pioneer ; Talking about an invention in which he played a critical role.
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| Number | Title | Issue Date |
| 7268339 | Large area semiconductor detector with internal gain A method is provided for forming a semiconductor-detection device that provides internal gain. The method includes forming a plurality of bottom trenches in a bottom surface of an n-doped semiconductor wafer; and forming a second plurality of top trenches in a top s... | 09/11/2007 |
| 7199031 | Semiconductor system having a pn transition and method for manufacturing a semiconductor system A semiconductor system having a pn transition and a method for manufacturing a semiconductor system are disclosed. The semiconductor system is designed in the form of a chip having an edge region, the semiconductor system includes a first layer of a first conductivi... | 04/03/2007 |
| 6858510 | Low-voltage punch-through bi-directional transient-voltage suppression devices having surface breakdown protection and methods of making the same A method of making a bi-directional transient voltage suppression device is provided, which comprises: (a) providing a p-type semiconductor substrate; (b) epitaxially depositing a lower semiconductor layer of p-type conductivity; (c) epitaxially depositing a middle ... | 02/22/2005 |
| 6319744 | Method for manufacturing a thermoelectric semiconductor material or element and method for manufacturing a thermoelectric module To provide a method for manufacturing a thermoelectric semiconductor material or a thermoelectric semiconductor element and method for manufacturing a thermoelectric module effective in improving thermoelectric performance. The thermoelectric semiconducto... | 11/20/2001 |
| 6312980 | Programmable triangular shaped device having variable gain Several inventions are disclosed. A cell architecture using hexagonal shaped cells is disclosed. The architecture is not limited to hexagonal shaped cells. Cells may be defined by clusters of two or more hexagons, by triangles, by parallelograms, and by o... | 11/06/2001 |
| 6303475 | Methods of fabricating silicon carbide power devices by controlled annealing Silicon carbide power devices are fabricated by masking the surface of a silicon carbide substrate to define an opening at the substrate, implanting p-type dopants into the silicon carbide substrate through the opening at implant energy and dosage that fo... | 10/16/2001 |
| 6100169 | Methods of fabricating silicon carbide power devices by controlled annealing Silicon carbide power devices are fabricated by masking the surface of a silicon carbide substrate to define an opening at the substrate, implanting p-type dopants into the silicon carbide substrate through the opening at implant energy and dosage that fo... | 08/08/2000 |
| 5930660 | Method for fabricating diode with improved reverse energy characteristics To ensure bulk breakdown when the mesa diode with a positive bevel angle is reverse biased, the diffused region is formed with thinner edge portions. This eliminates corner or edge effects which create conditions of high electric field, resulting in decre... | 07/27/1999 |
| 5897355 | Method of manufacturing insulated gate semiconductor device to improve ruggedness An insulated gate field effect transistor is manufactured according to a process in which an insulated gate structure is formed along a semiconductor chip. Dopant is introduced into the chip to form a body region, semiconductor material outside the body r... | 04/27/1999 |
| 5854089 | Semiconductor device by selectively controlling growth of an epitaxial layer without a mask A semiconductor structure including: a substrate having a step portion; a first semiconductor layer formed on a region of the substrate which is selectively irradiated by light at an angle with respect to the projecting portion by using the step portion a... | 12/29/1998 |
| 5811342 | Method for forming a semiconductor device with a graded lightly-doped drain structure A method for forming a semiconductor device with a graded lightly-doped drain (LDD) structure is disclosed. The method includes providing a semiconductor substrate (10) having a gate region (14 and 16) thereon, followed by forming a pad layer (18) on the ... | 09/22/1998 |
| 5807728 | Thin film transistor for antistatic circuit and method for fabricating the same A thin film transistor for an antistatic circuit includes: wells formed on a silicon substrate; insulating layers for electrical isolation between electrodes formed within the wells; low density impurity diffused regions respectively interposed between th... | 09/15/1998 |
| 5766965 | Semiconductor device and method of manufacturing the same A diffused layer serves as a source and a drain. It is formed comprised of a deep first diffused layer and a shallow second diffused layer positioned between the first diffused layer and the channel region. In the second diffused region, a distribution in... | 06/16/1998 |
| 5750414 | Method of fabricating a semiconductor device An integrated circuit (IC) (20) is formed on a semiconductor substrate (21). The IC has a PN junction (28) and a graded junction termination (27). A reverse field plate (31) is mounted adjacent the junction termination. One end of the field plate is mount... | 05/12/1998 |
| 5672532 | Method of forming bit lines having lower conductivity in their respective edges A buried bit line ROM is disclosed having orthogonal sets of buried bit lines and polysilicon word lines. Polysilicon spacers are disposed on either side of each of the bit lines. The polysilicon spacers are slightly doped. The bit lines have a doping pro... | 09/30/1997 |
| 5670383 | Method for fabrication of deep-diffused avalanche photodiode A method of forming a planar semiconductor device, such as an array of APDs, includes the steps of doping a substantially planar block of n type semiconductor material with a p type dopant in accordance with a selected pattern to form a plurality of n typ... | 09/23/1997 |
| 5665998 | Geometric enhancement of photodiodes for low dark current operation A substantial portion of the material at the pn junction (27) of the photodiode (37, 41) having an implanted region extending to a surface thereof is selectively removed (39), leaving a very small junction region (35, 43) with the remainder of the p-type ... | 09/09/1997 |
| 5663083 | Process for making improved MOS structure with hot carrier reduction An MOS structure is disclosed which is provided with a trench in the substrate adjacent the channel region of the substrate, i.e., adjacent the area of the substrate over which the gate oxide and gate electrode are formed. The region of the substrate bene... | 09/02/1997 |
| 5605849 | Use of oblique implantation in forming base of bipolar transistor In fabricating a bipolar transistor, semiconductor dopant is introduced into a semiconductor body during a base doping operation to define a doped region, part of which constitutes a base region for the transistor. The base doping operation entails ion im... | 02/25/1997 |
| 5578510 | Method of making an isolation layer stack semiconductor device A method of making a semiconductor device includes forming of an element isolation layer stack on a first region of a silicon substrate between adjacent element forming regions and injecting impurity ions upon a surface of the silicon substrate so as to f... | 11/26/1996 |
| 5576230 | Method of fabrication of a semiconductor device having a tapered implanted region A semiconductor device includes implanted regions (54) formed in a semiconductor layer (12). The implanted regions (54) are self-aligned with field oxide regions (20) and a gate structure (25) and have side edges (56, 57) that are formed at an angle with ... | 11/19/1996 |
| 5569612 | Process for manufacturing a bipolar power transistor having a high breakdown voltage There is described a bipolar power transistor with high breakdown voltage, obtained in a heavily doped semiconductor substrate of the N type, over which a lightly doped N type layer, constituting a collector region of the transistor, is superimposed. The ... | 10/29/1996 |
| 5550069 | Method for producing a PMOS transistor A method for producing a PMOS transistor. A p doped substrate and an n doped trough are provided by implantation and subsequent diffusion. The transistor is insulated by means of a field oxide layer. The transistor gates are produced using a photolithogra... | 08/27/1996 |
| 5543342 | Method of ion implantation In implantation of ions into a wafer, in the manufacture of a semiconductor device, a desired ion beam absorber pattern having locally different thicknesses is previously formed on a major surface of the wafer. The ion beam absorber pattern absorbs an ion... | 08/06/1996 |
| 5500376 | Method for fabricating planar avalanche photodiode array A method of forming a planar photosensitive device, such as an array of APDs, includes the steps of doping a substantially planar block of n type semiconductor material with a p type dopant in accordance with a selected pattern to form a plurality of p ty... | 03/19/1996 |
| 5496758 | Fabrication process of a semiconductor memory device having a multiple well structure in a recessed substrate A method for fabricating a semiconductor memory device includes the steps of forming, in a semiconductor substrate of a first conductivity type, a well of a second opposite conductivity type by protecting the substrate surface except for a part where the ... | 03/05/1996 |
| 5489540 | Method of making simplified LDD and source/drain formation in advanced CMOS integrated circuits using implantation through well mask A novel CMOS fabrication process that eliminates several masks of a conventional process by delaying application of a well mask to a semiconductor structure until after formation of isolation regions and gate structures. Providing for three separate impla... | 02/06/1996 |
| 5482876 | Field effect transistor without spacer mask edge defects A field effect transistor which is not susceptible to mask edge defects at its gate spacer oxides. The transistor is formed upon a (100) silicon semiconductor substrate through successive layering of a gate oxide, and a gate electrode. A pair of gate spac... | 01/09/1996 |
| 5474943 | Method for fabricating a short channel trenched DMOS transistor A DMOS transistor having a trenched gate is formed in a substrate such that the P body region of the transistor may be formed heavier or deeper while still maintaining a "short" channel. This is accomplished by forming a portion of the N+ type source regi... | 12/12/1995 |
| 5466303 | Semiconductor device and manufacturing method therefor A semiconductor device, which can easily form hyper abrupt junction type junction having a desired depletion layer width or transition region width, is disclosed. A silicon oxide film is formed on the mirror polished side surface of a P-type semiconductor... | 11/14/1995 |
| 5457060 | Process for manufactuirng MOSFET having relatively shallow junction of doped region A process for manufacturing a MOSFET having a shallow junction of a doped region includes preparing an intermediate wafer product, applying an oxide layer on said intermediate wafer product, introducing into a dopant around an interface between said oxide... | 10/10/1995 |
| 5428240 | Source/drain structural configuration for MOSFET integrated circuit devices A source/drain structural configuration suitable for metal-oxide semiconductor field-effect transistors is provided, having a wedge-shaped configuration with a thickness that increases in the direction from its end near to one the channel of the transisto... | 06/27/1995 |
| 5420056 | Junction contact process and structure for semiconductor technologies A device and method for forming an improved junction contact in a semiconductor device (10). A portion of an interlevel dielectric layer (28) is etched away to expose a surface of at least one junction region (26). Next, a dielectric layer is formed over ... | 05/30/1995 |
| 5384273 | Method of making a semiconductor device having a short gate length A semiconductor device having a short gate length is fabricated. The short gate length is obtained by utilizing the fact that an unannealed silicon nitride can be isotropically etched while not etching an annealed silicon nitride layer. The method compris... | 01/24/1995 |
| 5328858 | Method for producing the bipolar transistor A silicon oxide film is formed at a surface of a silicon substrate of a first conductive type, and then patterned to have an opening. PSG is deposited on the silicon substrate having the insulating film thereon, and then etched to leave the PSG only on a ... | 07/12/1994 |
| 5326713 | Buried contact process A method of forming a buried contact to a source/drain junction or other active device region in a silicon substrate. A silicon oxide layer is formed over the silicon substrate. A first polysilicon layer is formed over the silicon oxide layer. A resist ma... | 07/05/1994 |
| 5302543 | Method of making a charge coupled device A charge coupled device includes a second conductivity type first horizontal channel in a first conductivity type semiconductor substrate, a second conductivity type second horizontal channel in the substrate at a predetermined distance from the first hor... | 04/12/1994 |
| 5298435 | Application of electronic properties of germanium to inhibit n-type or p-type diffusion in silicon A method of inhibiting dopant diffusion in silicon using germanium is provided. Germanium is distributed in substitutional sites in a silicon lattice to form two regions of germanium interposed between a region where dopant is to be introduced and a regio... | 03/29/1994 |
| 5279976 | Method for fabricating a semiconductor device having a shallow doped region A method is provided for the formation of ultra-shallow boron doped regions in a semiconductor device. In one embodiment of the invention an N-type semiconductor substrate (15) is provided having a first P-type region formed therein. A dielectric layer (1... | 01/18/1994 |
| 5278082 | Method for electrically connecting an electrode and impurity-diffused layer formed on a semiconductor substrate A method for producing a semiconductor device in which an electrode and an impurity-diffused layer formed on a semiconductor substrate are electrically connected to each other, includes the following steps: forming a first insulating film on the semicondu... | 01/11/1994 |
