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| Number | Title | Issue Date |
| 7319377 | Method for making high-performance RF integrated circuits A new method and structure is provided for the creation of a semiconductor inductor. Under the first embodiment of the invention, a semiconductor substrate is provided with a scribe line in a passive surface region and active circuits surrounding the passive region.... | 01/15/2008 |
| 7279351 | Method of passivating semiconductor device In a method of passivating a semiconductor device with two types of transistors, e.g., NMOS and PMOS transistor, the semiconductor device is placed in a pressurized sealed chamber and at least two different passivating gases are introduced into the chamber. The two ... | 10/09/2007 |
| 7262131 | Dielectric barrier layer films In accordance with the present invention, a dielectric barrier layer is presented. A barrier layer according to the present invention includes a densified amorphous dielectric layer deposited on a substrate by pulsed-DC, substrate biased physical vapor deposition, w... | 08/28/2007 |
| 7208425 | Method using TEOS ramp-up during TEOS/ozone CVD for improved gap-fill Embodiments of the present invention provide methods, apparatuses, and devices related to chemical vapor deposition of silicon oxide. In one embodiment, a single-step deposition process is used to efficiently form a silicon oxide layer exhibiting high conformality a... | 04/24/2007 |
| 7172960 | Multi-layer film stack for extinction of substrate reflections during patterning A method including introducing a dielectric layer over a substrate between an interconnection line and the substrate, the dielectric layer comprising a plurality of alternating material layers; and patterning an interconnection to the substrate. An apparatus compris... | 02/06/2007 |
| 7122418 | Method of fabricating organic light emitting diode device A method of fabricating an organic electroluminescent device. A substrate comprising an organic electroluminescent unit thereon is provided. A passivation layer is formed on the substrate to cover the organic electroluminescent layer. An ion beam is provided to perf... | 10/17/2006 |
| 7112545 | Passivation of material using ultra-fast pulsed laser The surface of a semiconductor material, e.g., gallium arsenide, is passivated by irradiating the surface with ultra-short laser pulses, until a stable passive surface is achieved. The passive surface so prepared is devoid of a superficial oxide layer. ... | 09/26/2006 |
| 7112478 | Insulated gate field effect transistor having passivated Schottky barriers to the channel A transistor includes a semiconductor channel disposed nearby a gate and in an electrical path between a source and a drain, wherein the channel and at least one of the source or the drain are separated by an interface layer so as to form a channel-interface layer-s... | 09/26/2006 |
| 7075187 | Coating material over electrodes to support organic synthesis There is disclosed a coating material formulation for layering a plurality of electrodes to provide a substrate for the electrochemical synthesis of organic oligomers. Specifically, there is disclosed a coating layer of from about 0.5 to about 100 microns thick and ... | 07/11/2006 |
| 7045376 | Method of passivating semiconductor device A method of passivating a semiconductor device with two types of transistors, e.g., NMOS and PMOS transistors, the semiconductor device is placed in a pressurized sealed chamber and at least two different passivating gases are introduced into the chamber. The two pa... | 05/16/2006 |
| 7041574 | Composite intermetal dielectric structure including low-k dielectric material A method of forming a composite intermetal dielectric structure is provided. An initial intermetal dielectric structure is provided, which includes a first dielectric layer and two conducting lines. The two conducting lines are located in the first dielectric layer.... | 05/09/2006 |
| 7037859 | Method using TEOS ramp-up during TEOS/ozone CVD for improved gap-fill Embodiments of the present invention provide methods, apparatuses, and devices related to chemical vapor deposition of silicon oxide. In one embodiment, a single-step deposition process is used to efficiently form a silicon oxide layer exhibiting high conformality a... | 05/02/2006 |
| 7001680 | Low resistance magnetic tunnel junction structure The present disclosure describes magnetic tunnel junction (MTJ) devices and systems involving the use of diffusion components selected to alter the device properties. The diffusion components migrate from one layer of the MTJ structure to the tunneling barrier layer... | 02/21/2006 |
| 6972227 | Semiconductor processing methods, and methods of forming a dynamic random access memory (DRAM) storage capacitor Semiconductor processing methods are described which can be used to reduce the chances of an inadvertent contamination during processing. In one implementation, a semiconductor wafer backside is mechanically scrubbed to remove an undesired material prior to forming ... | 12/06/2005 |
| 6946404 | Method for passivating a semiconductor substrate A method for the passivation of a semiconductor substrate, wherein a SiNx:H layer is deposited on the surface of the substrate (1) by means of a PECVD process comprising the following steps: the substrate (1 | 09/20/2005 |
| 6943125 | Method for manufacturing semiconductor device Provided is a method for manufacturing a semiconductor device including a plurality of different semiconductor elements with a transistor for fabricating the semiconductor device formed on a semiconductor substrate, an interlayer insulation film formed all over the ... | 09/13/2005 |
| 6939792 | Low-k dielectric layer with overlying adhesion layer In one embodiment, a method of fabricating an integrated circuit includes forming a low-k dielectric layer over metal lines, forming an adhesion layer over the low-k dielectric layer, and forming a capping layer over the adhesion layer. The low-k dielectric may comp... | 09/06/2005 |
| 6917088 | Magneto-resistive devices A magneto-resistive device has a high reproducing output and is suitable for use as a CPP-GMR device. The magneto-resistive device has a first magnetic layer, a second magnetic layer, and a non-magnetic spacer formed between the first and second magnetic layers. The... | 07/12/2005 |
| 6916737 | Methods of manufacturing a semiconductor device Methods of manufacturing semiconductor devices are disclosed. In an illustrated method, a contact hole in an insulating layer is filled with a copper layer and the copper layer is planarized. During the planarzing, a CuO layer is parasitically formed on the surface ... | 07/12/2005 |
| 6913946 | Method of making an ultimate low dielectric device A method of making a semiconductor device comprising: providing a semiconductor substrate having a plurality of discrete devices formed therein, and a plurality of metal layers and support layers, the support layers comprising an uppermost support layer and other su... | 07/05/2005 |
| 6905956 | Multi-layer dielectric and method of forming same A multiple dielectric device and its method of manufacture overlaying a semiconductor material, including a substrate, an opening relative to the substrate, the opening having an aspect ratio greater than about two, a first dielectric layer in the opening, wherein a... | 06/14/2005 |
| 6887773 | Methods of incorporating germanium within CMOS process Methods for deposition of a Ge layer during a CMOS process on a monolithic device are disclosed. The insertion of the Ge layer enables the conversion of light to electrical signals easily. As a result of this method, standard metals can be attached directly to the G... | 05/03/2005 |
| 6878567 | Method and apparatus for fabrication of passivated microfluidic structures in semiconductor substrates A method and apparatus for fabrication of passivated microfluidic structures is disclosed. The method includes providing a substrate having a microfluidic structure formed therein. The microfluidic structure is embedded by an embedding layer. The method further incl... | 04/12/2005 |
| 6875681 | Wafer passivation structure and method of fabrication A wafer passivation structure and its method of fabrication is described. According to one embodiment of the present invention a metal layer having a bond pad spaced by a gap from a metal member is formed on a substrate. A first dielectric layer is then formed over ... | 04/05/2005 |
| 6872617 | Semiconductor device manufacturing method There are provided the steps of forming a first insulating film over a semiconductor substrate, forming a capacitor having a lower electrode, a ferroelectric layer, and an upper electrode over the first insulating film, and growing a second insulating film over the ... | 03/29/2005 |
| 6803327 | Cost effective polymide process to solve passivation extrusion or damage and SOG delminates The present invention teaches the deposition of a pattern of interconnecting lines and bond pads. Passivation layers are deposited over this metal pattern. A layer of photosensitive polyimide is deposited over the passivation layers. This layer of photosensitive pol... | 10/12/2004 |
| 6784124 | Methods of selective oxidation conditions for dielectric conditioning A method for conditioning or repairing a dielectric structure of a semiconductor device structure with selectivity over an adjacent conductive or semiconductive structure of the semiconductor device structure, such as a capacitor dielectric and an adjacent bottom el... | 08/31/2004 |
| 6784114 | Monatomic layer passivation of semiconductor surfaces The present invention relates generally to a method of improving the performance of solid state devices, and specifically provides methods for passivating a semiconductor surfaces with a monolayer of passivating material. ... | 08/31/2004 |
| 6784093 | Copper surface passivation during semiconductor manufacturing An embodiment of the invention is a method to reduce the corrosion of copper interconnects 90 by forming a thiol ligand coating 130 on the surface of the copper interconnects 90. ... | 08/31/2004 |
| 6764952 | Systems and methods to retard copper diffusion and improve film adhesion for a dielectric barrier on copper Two sequential treatments within a chemical vapor deposition chamber, or within sequential chambers without a vacuum break, are performed on a copper layer to clean and passivate the copper surface prior to deposition of a copper diffusion barrier layer or a dielect... | 07/20/2004 |
| 6734037 | Method and device for producing solar cells The present invention concerns a process for fabricating a solar cell, wherein material is deposited on a multicrystalline silicon substrate and passivation is performed by means of hydrogen plasma. It is proposed that the material be deposited by low-pressure CVD a... | 05/11/2004 |
| 6723250 | Method of producing structured wafers A method of producing structured wafers guarantees that the edge of the wafer will be protected from attack by an aggressive etchant medium without applying a photoresist to the edge and without using additional mechanical measures. In a type of negative process, a ... | 04/20/2004 |
| 6680232 | Trench etch with incremental oxygen flow A method for forming trenches in a device layer disposed on a silicon semiconductor substrate comprises: covering the device layer with an etch resistant masking layer to define at least two trench regions; removing semiconductor material from the exposed... | 01/20/2004 |
| 6645866 | Method of fabricating a semiconductor device using trench isolation method including hydrogen annealing step A method of fabricating a semiconductor device using a trench isolation method including a hydrogen annealing step, wherein a photoresist pattern is formed on a semiconductor substrate, a pad insulating layer may be formed before forming the photoresist p... | 11/11/2003 |
| 6635589 | Methods of heat treatment and heat treatment apparatus for silicon oxide films Silicon oxide films which are good as gate insulation films are formed by subjecting a silicon oxide film which has been formed on an active layer comprising a silicon film by means of a PVD method or CVD method to a heat treatment at 300-700° C. in a di... | 10/21/2003 |
| 6624051 | Semiconductor thin film and semiconductor device After an amorphous semiconductor thin film is crystallized by utilizing a catalyst element, the catalyst element is removed by performing a heat treatment in an atmosphere containing a halogen element. A resulting crystalline semiconductor thin film has f... | 09/23/2003 |
| 6617259 | Method for fabricating semiconductor device and forming interlayer dielectric film using high-density plasma A method for fabricating a semiconductor device and forming an insulating film used therein, includes forming an isolation insulating film on a semiconductor wafer and forming gates, separated by gaps having a predetermined distance, on an active region. ... | 09/09/2003 |
| 6613677 | Long range ordered semiconductor interface phase and oxides A semiconductor processing method capable of producing highly ordered, ultra thin dielectrics, including gate oxide and other semiconductor dielectrics, and interphase phases with low defect density. The process includes a degrease step, an etch, primary ... | 09/02/2003 |
| 6559074 | Method of forming a silicon nitride layer on a substrate A silicon nitride layer is formed over transistor gates while the processing temperature is relatively high, typically at least 500° C., and the pressure is relatively high, typically at least 50 Torr, to obtain a relatively high rate of formation of the... | 05/06/2003 |
| 6548318 | Fabrication method for a multi-layered thin film protective layer A fabrication method for a multi-layered thin film protective layer which is applicable on a substrate comprising a peripheral circuit area and a pixel cell area is described. Metal layers and pixel cells are formed on the peripheral circuit area and the ... | 04/15/2003 |
