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| Number | Title | Issue Date |
| 7354781 | Method of manufacturing field emission device A method of manufacturing a field emission device (FED) using a photoresist for performing multi-patterning processes, whereby different structures can be multi-patterned using a single photoresist mask. The photoresist has a solubility to a solvent by post-exposure... | 04/08/2008 |
| 7316784 | Method of patterning transparent conductive film, thin film transistor substrate using the same and fabricating method thereof A method of patterning a transparent conductive film adaptive for selectively etching a transparent conductive film without any mask processes, a thin film transistor for a display device using the same and a fabricating method thereof are disclosed. In the method o... | 01/08/2008 |
| 7315344 | Liquid crystal display device and method of fabricating the same A method of fabricating a liquid crystal display device includes forming a gate electrode, a gate bus line, and a gate pad on a substrate using a first mask process, forming a gate insulating layer and an active layer on an entire surface of the substrate, forming a... | 01/01/2008 |
| 7220612 | Liquid crystal display device and fabricating method thereof A thin film transistor substrate and a fabricating method thereof for simplifying a process are disclosed. In a liquid crystal display device according to the present invention, a gate line is provided on a substrate. A data line crosses the gate line with having a ... | 05/22/2007 |
| 7132358 | Method of forming solder bump with reduced surface defects A method of forming a solder bump may involve forming a first photoresist pattern on a wafer having a pad. The first photoresist pattern may have an opening that exposes a portion of the pad. A first under bump metallurgy (UBM) layer may be formed on the pad, and a ... | 11/07/2006 |
| 7129590 | Stencil and method for depositing material onto a substrate A stencil and method for depositing a coupon of underfill material onto a substrate that is to receive an integrated circuit die. ... | 10/31/2006 |
| 7078279 | Manufacturing method of a thin film transistor array substrate A method of manufacturing a thin film transistor capable of simplifying a substrate structure and a manufacturing process is disclosed. The method of manufacturing a thin film transistor array substrate includes involves a three-round mask process, which includes: f... | 07/18/2006 |
| 7067426 | Semiconductor processing methods The invention includes methods of forming patterns in low-k dielectric materials by contact lithography. In a particular application, a mold having a first pattern is pressed into a low-k dielectric material to form a second pattern within the material. The second p... | 06/27/2006 |
| 7067398 | Method of producing electronic circuit and electronic circuit According to an embodiment of the present invention, a method of producing an electronic circuit comprises printing first metal-containing resin particles which consist of at least a thermosetting resin and fine metal particles and second metal-containing resin part... | 06/27/2006 |
| 7022541 | Patterned growth of single-walled carbon nanotubes from elevated wafer structures A wafer-scale fabrication approach for manufacturing single-walled carbon nanotube (SWNT) tips is implemented. Catalyst material is selectively placed (e.g., patterned) onto a plurality of prefabricated elevated structures (e.g., silicon tips) on a wafer. SWNTs are ... | 04/04/2006 |
| 7008810 | Method for fabricating at least one mesa or ridge structure or at least one electrically pumped region in a layer or layer sequence A method for fabricating at least one mesa or ridge structure in a layer or layer sequence, in which a sacrificial layer (4) is applied and patterned above the layer or layer sequence. A mask layer is applied and patterned above the sacrificial layer for defi... | 03/07/2006 |
| 6989327 | Forming a contact in a thin-film device An aspect of the present invention is a method of forming a contact in a thin-film device. The method includes forming a liftoff stencil, depositing at least one material through the liftoff stencil, removing a portion of the liftoff stencil, forming a re-entrant pr... | 01/24/2006 |
| 6887719 | Magnetoresistive random access memory (MRAM) cell patterning A process that advantageously forms MRAM cells without the application of ion beam milling processes. Unlike conventional processes that rely on ion beam milling processes to remove materials from a magnetoresistive sandwich from areas other than areas that will lat... | 05/03/2005 |
| 6884630 | Two-step magnetic tunnel junction stack deposition Magnetic tunnel junction devices can be fabricated using a two-step deposition process wherein respective portions of the magnetic tunnel junction stack are defined independently of one another. ... | 04/26/2005 |
| 6881688 | Method of fabricating a vertically profiled electrode and semiconductor device comprising such an electrode A method of fabricating a vertically profiled electrode like a T-gate 40 on a semiconductor substrate 20 is described. The method comprises providing a resist structure 34 on the substrate 20, the resist structure 34 containing at ... | 04/19/2005 |
| 6784081 | Gate structure forming method of field effect transistor A method of forming a gate structure includes forming sequentially a pad layer and a first photoresist layer over a substrate. A cross-linked surface layer is formed on the surface of the first photoresist layer, followed by rounding the profile of the first photore... | 08/31/2004 |
| 6750150 | Method for reducing dimensions between patterns on a photoresist A semiconductor manufacturing method that includes defining a substrate, depositing a polysilicon layer over the substrate, depositing a layer of photoresist over the polysilicon layer, patterning and defining the photoresist layer, depositing a layer of inorganic m... | 06/15/2004 |
| 6737202 | Method of fabricating a tiered structure using a multi-layered resist stack and use An improved and novel method of forming a tiered structure, such as a T-gate structure, including the fabrication of a stabilized resist layer that provides for the prevention of interlayer intermixing with the deposition of subsequent resist layers. The method incl... | 05/18/2004 |
| 6670228 | Method of fabricating a polysilicon capacitor utilizing FET and bipolar base polysilicon layers A method of forming a poly-poly capacitor, a MOS transistor, and a bipolar transistor simultaneously on a substrate comprising the steps of depositing and patterning a first layer of polysilicon on the substrate to form a first plate electrode of said cap... | 12/30/2003 |
| 6605519 | Method for thin film lift-off processes using lateral extended etching masks and device A method for forming an etching mask structure on a substrate includes etching the substrate, laterally expanding the etching mask structure, and depositing a self-aligned metal layer that is aligned to the originally masked area. The etching can be isotr... | 08/12/2003 |
| 6541309 | Fabricating a molecular electronic device having a protective barrier layer A process of fabricating a molecular electronic device that preserves the integrity of the active molecular layer of the electronic device during processing is described. In one aspect, a barrier layer is provided to protect a molecular layer sandwiched b... | 04/01/2003 |
| 6340635 | Resist pattern, process for the formation of the same, and process for the formation of wiring pattern A process for the formation of a wiring pattern, which includes the steps of: exposing a resist through a photomask, the photomask having a pattern whose line width is equal to or less than a resolution limit; and developing the exposed resist to form a r... | 01/22/2002 |
| 6291296 | Method for removing anti-reflective coating layer using plasma etch process before contact CMP The present invention provides a method for selectively removing anti-reflective coating (ARC) from the surface of an dielectric layer over the surface of a substrate without scratching the dielectric layer and/or tungsten contacts formed therein. In one ... | 09/18/2001 |
| 6235587 | Method of manufacturing a semiconductor device with reduced arc loss in peripheral circuitry region Improved dimensional accuracy of the gate electrode structure in the peripheral circuitry region of a semiconductor device is achieved by reducing ARC loss during photoresist stripping associated with plural mask formation in the core memory cell region d... | 05/22/2001 |
| 6194272 | Split gate flash cell with extremely small cell size A dual-gate cell structure with self-aligned gates. A polysilicon spacer forms a second gate (213) separated from a first gate (201), which is also polysilicon, by a dielectric layer (207). A drain region (219) and a source region (221) are formed next to... | 02/27/2001 |
| 6162725 | Process of patterning conductive layer into electrode through lift-off using photo-resist mask imperfectly covered with the conductive layer Transparent electrodes of a plasma display panel is patterned from a transparent conductive layer by using a lift-off technique; a photo-resist mask is roughened through exposure to oxygen plasma before the deposition of the transparent conductive layer, ... | 12/19/2000 |
| 6156672 | Method of forming dielectric thin film pattern and method of forming laminate pattern comprising dielectric thin film and conductive thin film A method of forming a dielectric thin film pattern, comprises the steps of: depositing a dielectric thin film on a substrate having a resist pattern thereon by a vapor deposition method, wherein as a material for the dielectric thin film, at least one of ... | 12/05/2000 |
| 6107172 | Controlled linewidth reduction during gate pattern formation using an SiON BARC A gate is formed by creating a wafer stack, that includes a gate conductive layer over a substrate layer, depositing a SiOx Ny layer over the conductive layer to act as a bottom anti-reflective coating (BARC), and forming a resist ma... | 08/22/2000 |
| 6077765 | Structure of bump electrode and method of forming the same A method of forming a bump electrode, comprises the steps of preparing an Si-substrate having a plurality of bonding pads, forming a core on a substantially central portion of the bonding pad on the substrate, forming a resist layer around the core, which... | 06/20/2000 |
| 5994194 | Self-aligned base ohmic metal for an HBT device cross-reference to related applications A relatively simple method for providing relatively close spacing between the emitter mesa and the base ohmic metal of a heterojunction bipolar transistor (HBT) on a relatively uniform basis. An emitter and base layer are epitaxially grown on a substrate.... | 11/30/1999 |
| 5981355 | Method of forming isolating region A method of forming an isolating region of a semiconductor device including the steps of: forming first insulating layers which vary in width on a substrate; forming trenches which vary in width on the substrate by using the first insulating layers as a m... | 11/09/1999 |
| 5981309 | Method for fabricating charge coupled device image sensor A method for fabricating a CCD image sensor includes the steps of forming a P type well in a surface of a semiconductor substrate, forming a buried CCD (BCCD) in a surface of the P type well, forming an offset gate and a reset gate on the BCCD at a predet... | 11/09/1999 |
| 5940694 | Field effect transistor process with semiconductor mask, single layer integrated metal, and dual etch stops A method for fabricating a periodic table group III-IV field-effect transistor device is described. The disclosed fabrication arrangement uses a single metallization for ohmic and Schottky barrier contacts, employs selective etching with a permanent etch ... | 08/17/1999 |
| 5918130 | Transistor fabrication employing formation of silicide across source and drain regions prior to formation of the gate conductor The present invention advantageously provides a method for forming a transistor in which silicide contact areas are formed to the junctions during fabrication of the transistor. The silicide contact areas may be formed using a single high temperature anne... | 06/29/1999 |
| 5888892 | Metal layer pattern forming method Disclosed is a metal layer pattern forming method which easily allows lift-off. The thickness of the photoresist layer is not less than double the thickness of the metal layer, and the maximum temperature that the surface of the substrate to be processed ... | 03/30/1999 |
| 5854097 | Method of manufacturing a semiconductor device A device having, at least, a first film having a surface on which neither a natural oxide film nor impurity grains caused by a resist residue is or are present, and a conductive material layer formed on a surface adjacent to the surface of the first film,... | 12/29/1998 |
| 5804474 | Method for forming a V-shaped gate electrode in a semiconductor device, and the structure of the electrode A method for forming a V-shaped gate electrode on a semiconductor substrate includes the following steps: A first gate opening is formed in a first resist between a source and a drain formed on a semiconductor substrate, and dummy openings are formed near... | 09/08/1998 |
| 5804487 | Method of fabricating high ଲHBT devices A method for controlling the spacing between the emitter mesa and the base ohmic metal of a heterojunction bipolar transistor (HBT) to obtain a relatively high gain (ଲ) with a low-parasitic base resistance. In a first method, after the emitter, base... | 09/08/1998 |
| 5776820 | Method of forming a high-frequency transistor T gate electrode A method of forming a T-type gate electrode of a high-frequency transistor having excellent high-frequency power transfer characteristic with no concave portions and protrusions. A first resist pattern having a first relatively narrow opening is formed on... | 07/07/1998 |
| 5773198 | Method of forming high resolution circuitry by depositing a polyvinyl alcohol layer beneath a photosensitive polymer layer A method of forming a high resolution metal pattern on a substrate. A temporary polyvinyl alcohol (10) layer underneath the photoresist layer (20) aids in removing the photoresist layer after plating. The photoresist is photodelineated in conventional man... | 06/30/1998 |
