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| Number | Title | Issue Date |
| 7312159 | Compositions for dissolution of low-k dielectric films, and methods of use An improved composition and method for cleaning the surface of a semiconductor wafer are provided. The composition can be used to selectively remove a low-k dielectric material such as silicon dioxide, a photoresist layer overlying a low-k dielectric layer, or both ... | 12/25/2007 |
| 7238624 | System and method for manufacturing semiconductor devices using a vacuum chamber The present disclosure relates generally to the manufacturing of semiconductor devices, and more particularly to semiconductor manufacturing using a vacuum chamber. In one example, a method for semiconductor manufacturing includes: providing a photoresist layer for ... | 07/03/2007 |
| 7105407 | Method of fabricating semiconductor device There is provided a method of fabricating a semiconductor device comprising the steps of applying resist to a polysilicon film formed across the surface of a substrate and forming a plurality of openings in a resist pattern, for determining a spacing between floatin... | 09/12/2006 |
| 7083994 | Method of manufacturing a semiconductor device with outline of cleave marking regions and alignment or registration features This invention generally relates to semiconductor devices, for example lasers and more particularly to single frequency lasers and is directed at overcoming problems associated with the manufacture of these devices. In particular, a laser device is provided formed o... | 08/01/2006 |
| 7078319 | Laser separated die with tapered sidewalls for improved light extraction A method for separating individual optoelectronic devices, such as LEDs, from a wafer includes directing a laser beam having a width toward a major surface of the semiconductor wafer. The laser beam has an image with a first portion of a first energy per unit width ... | 07/18/2006 |
| 7008736 | Semiconductor integrated circuit device fabrication method using a mask having a phase shifting film covering region and an opening region The present invention relates to a micromininiaturization technique to achieve the miniaturization and higher integration of IC chip and to the improvement of a mask used in its manufacturing process. In other words, the phases of lights transmitted through the mask... | 03/07/2006 |
| 6992015 | Pattern formation method After forming a resist film made from a chemically amplified resist material, pattern exposure is carried out by selectively irradiating the resist film with exposing light while supplying, onto the resist film, water that includes triphenylsulfonium nonaflate, that... | 01/31/2006 |
| 6962878 | Method to reduce photoresist mask line dimensions A method for reducing the dimension of a patterned organic photoresist area by reducing the pressure of a reactive environment surrounding the patterned photoresist to cause outgasing. The outgased materials CxHyOz are then decompose... | 11/08/2005 |
| 6958292 | Method of manufacturing integrated circuit In order to shorten the period for the development and manufacture of a semiconductor integrated circuit device, at the time of transferring integrated circuit patterns onto a wafer by an exposure process, a photomask PM1 is used which is provided partially w... | 10/25/2005 |
| 6924230 | Method for forming a conductive layer A method for forming a conductive layer is disclosed, which has the following steps. First, a substrate is provided, and then a patterned photoresist layer having an undercut is formed on the substrate. After that, at least one conductive layer is deposited on the s... | 08/02/2005 |
| 6908854 | Method of forming a dual-layer resist and application thereof A method of forming a dual-layer resist and application thereof. With respect to the method of forming a dual-layer resist, first, a patterned first resist layer is formed on a substrate. Next, the first resist layer is cured so that the first resist layer does not ... | 06/21/2005 |
| 6885078 | Circuit isolation utilizing MeV implantation A circuit isolation technique that uses implanted ions in embedded portions of a wafer substrate to lower the resistance of the substrate under circuits formed on the wafer or portions of circuits formed on the wafer to prevent the flow of injected currents across t... | 04/26/2005 |
| 6881688 | Method of fabricating a vertically profiled electrode and semiconductor device comprising such an electrode A method of fabricating a vertically profiled electrode like a T-gate 40 on a semiconductor substrate 20 is described. The method comprises providing a resist structure 34 on the substrate 20, the resist structure 34 containing at ... | 04/19/2005 |
| 6872646 | Method for manufacturing conductive pattern substrate A conductive pattern is obtained by forming concave-convex on a substrate by using a pattern substrate. A conductive thin layer is formed and then coated with a layer of a photosensitive resin. The photo sensitive resin is exposed and development by using the patter... | 03/29/2005 |
| 6855646 | Plasma polymerized electron beam resist A process for producing a pattern of negative electron beam resist comprises: depositing a layer of plasma polymerized fluoropolymer on a face of a substrate, the plasma polymerized fluoropolymer forming the negative electron beam resist; producing an electron beam;... | 02/15/2005 |
| 6844270 | Polymers and photoresist compositions for short wavelength imaging The present invention includes polyacetal polymers and photoresist compositions that include the polymers as a resin binder component. Photoresists of the invention include chemically-amplified positive-acting resists that can be effectively imaged at short waveleng... | 01/18/2005 |
| 6841465 | Method of forming dual damascene pattern in semiconductor device Disclosed is a method of forming the dual damascene pattern in the semiconductor device. After forming the trench, a photoresist pattern in which a via hole region is defined is formed by exposure and development processes in a state that a photoresist is thinly coa... | 01/11/2005 |
| 6828167 | Method for manufacturing a thin film transistor for a liquid crystal display Disclosed is a thin film transistor (TFT) for a liquid crystal display (LCD) and a method for manufacturing the same that allows the number of photomasks used in a photolithography process to be decreased as compared to conventional methods. A passivation film is fo... | 12/07/2004 |
| 6815347 | Method of forming a reflective electrode The present invention provides a method of forming a TFT and a reflective electrode having recesses or projections with reduced manufacturing cost and a reduced number of manufacturing steps, and provides a liquid crystal display device to which the method is applie... | 11/09/2004 |
| 6812128 | Method of manufacturing multilayer structured semiconductor device A step for forming a wiring on a semiconductor substrate, a step for forming a first silicon oxide film on the semiconductor substrate having the wiring, and a step for forming an interlayer insulating film composed of a material bearing a low specific inductive cap... | 11/02/2004 |
| 6808984 | Method for forming a contact opening A method for forming a contact opening is provided. After forming transistors on a substrate, a stacked resist layer including a resist layer without a silicon element and a resist layer with a silicon element covers the transistors and the substrate. The stacked re... | 10/26/2004 |
| 6803261 | Photoelectric converter and fabrication method thereof There is provided a laminated type photoelectric converter whose sensitivity is enhanced uniformly. In the photoelectric converter in which a photoelectric conversion device is laminated above a signal transfer device, the sensitivity is enhanced by providing bends ... | 10/12/2004 |
| 6780781 | Method for manufacturing an electronic device A method for manufacturing an electronic device is provided. In one example of the method, the method prevents deformation of a resist mask caused by the irradiation of exposure light. The resist mask has a resist as an opaque element, and can afford mask patterns u... | 08/24/2004 |
| 6750154 | Gas assisted method for applying resist stripper and gas-resist stripper combinations A method for moving resist stripper across the surface of a semiconductor substrate. The method includes applying a wet chemical resist stripper, such as an organic or oxidizing wet chemical resist stripper, to at least a portion of a photomask positioned over the s... | 06/15/2004 |
| 6746973 | Effect of substrate surface treatment on 193 NM resist processing One aspect of the present invention relates to a system and method for mitigating surface abnormalities on a semiconductor structure. The method involves exposing the layer to a first plasma treatment in order to mitigate surface interactions between the layer and a... | 06/08/2004 |
| 6734034 | Transistor and associated driving device A method of forming a thin film transistor and its associated driver. A polysilicon layer, a gate oxide layer and a gate layer are formed on a substrate. A photoresist layer comprising of a top section and a base section is formed over the gate layer. The top sectio... | 05/11/2004 |
| 6653244 | Monolithic three-dimensional structures Three-dimensional structures of arbitrary shape are fabricated on the surface of a substrate through a series of processing steps wherein a monolithic structure is fabricated in successive layers. A first layer of photoresist material is spun onto a subst... | 11/25/2003 |
| 6566178 | Transistor and associated driving device A method of forming a thin film transistor and its associated driver. A polysilicon layer, a gate oxide layer and a gate layer are formed on a substrate. A photoresist layer comprising of a top section and a base section is formed over the gate layer. The... | 05/20/2003 |
| 6562670 | Poly-silicon thin film transistor and method for fabricating thereof A thin film transistor. The thin film transistor comprises a substrate, a dielectric layer and a polysilicon layer. A gate electrode is located on the substrate. A dielectric layer is located on the substrate and the gate electrode. A polysilicon layer is... | 05/13/2003 |
| 6518175 | Process for reducing critical dimensions of contact holes, vias, and trench structures in integrated circuits An integrated circuit fabrication process to pattern reduced feature size is disclosed herein. The process includes reducing the width of a patterned area of a patterned photoresist layer provided over a substrate before patterning the substrate. The patt... | 02/11/2003 |
| 6514871 | Gate etch process with extended CD trim capability A method is provided herein for trim etching a resist line in a plasma etch apparatus. The method provides a reduced rate of vertical direction etching of the resist, and an increased rate of horizontal direction etching of the resist, by applying a lower... | 02/04/2003 |
| 6479411 | Method for forming high quality multiple thickness oxide using high temperature descum A method for forming high quality multiple thickness oxide layers having different thicknesses by eliminating descum induced defects. The method includes forming an oxide layer, masking the oxide layer with a photoresist layer, and developing the photores... | 11/12/2002 |
| 6451504 | Semiconductor processing method of promoting photoresist adhesion to an outer substrate layer predominately comprising silicon nitride A semiconductor processing method of promoting adhesion of photoresist to an outer substrate layer predominately comprising silicon nitride includes, a) providing a substrate; b) providing an outer layer of Si3 N4 outwardly of the su... | 09/17/2002 |
| 6440871 | Gas assisted method for applying resist stripper and gas-resist stripper combinations A method for moving resist stripper across the surface of a semiconductor substrate. The method includes applying a wet chemical resist stripper, such as an organic or oxidizing wet chemical resist stripper, to at least a portion of a photomask positioned... | 08/27/2002 |
| 6423569 | Photoelectric converter and fabrication method thereof There is provided a laminated type photoelectric converter whose sensitivity is enhanced uniformly. In the photoelectric converter in which a photoelectric conversion device is laminated above a signal transfer device, the sensitivity is enhanced by provi... | 07/23/2002 |
| 6403475 | Fabrication method for semiconductor integrated device Annealing technology is capable of heating a wafer on which a copper film is formed at a desired temperature within a short period of time. A light-shielding plate 106 of SiC (silicon carbide) exhibiting a flat emissivity irrespective of the wavelengths a... | 06/11/2002 |
| 6358791 | Method for increasing a very-large-scale-integrated (VLSI) capacitor size on bulk silicon and silicon-on-insulator (SOI) wafers and structure formed thereby A method of forming a semiconductor device, includes forming at least one conductive island having a predetermined sidewall angle in a conductive substrate, forming a dielectric material over the at least one island, forming a conductive material over the... | 03/19/2002 |
| 6340635 | Resist pattern, process for the formation of the same, and process for the formation of wiring pattern A process for the formation of a wiring pattern, which includes the steps of: exposing a resist through a photomask, the photomask having a pattern whose line width is equal to or less than a resolution limit; and developing the exposed resist to form a r... | 01/22/2002 |
| 6303488 | Semiconductor processing methods of forming openings to devices and substrates, exposing material from which photoresist cannot be substantially selectively removed In one aspect, the invention provides a method of exposing a material from which photoresist cannot be substantially selectively removed utilizing photoresist. In one preferred implementation, a first material from which photoresist cannot be substantiall... | 10/16/2001 |
| 6261898 | Method for fabricating a salicide gate A method of fabricating a salicide gate is provided, wherein a logic region and a memory cell region are formed on a substrate. A plurality of polysilicon gates and adjoining source/drain regions are also formed in both regions. A protection layer is form... | 07/17/2001 |
