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| Number | Title | Issue Date |
| 7322287 | Apparatus for fluid pressure imprint lithography Improved apparatus for imprint lithography involves using direct fluid pressure to press a mold into a substrate-supported film. Advantageously the mold and/or substrate are sufficiently flexible to provide wide area contact under the fluid pressure. Fluid pressing ... | 01/29/2008 |
| 7282461 | Phase-shifting mask and semiconductor device Disclosed is a phase-shifting mask having a pattern comprising a plurality of substantially transparent regions and a plurality of substantially opaque regions wherein the mask pattern phase-shifts at least a portion of incident radiation and wherein the phases are ... | 10/16/2007 |
| 7241683 | Stabilized photoresist structure for etching process A method for forming features in an etch layer is provided. A first mask is formed over the etch layer where the first mask defines a plurality of spaces with widths. The first mask is laterally etched where the etched first mask defines a plurality of spaces with w... | 07/10/2007 |
| 7205184 | Method of crystallizing silicon film and method of manufacturing thin film transistor liquid crystal display A method of crystallizing a silicon film by which it is possible to obtain a polycrystalline silicon thin film having a uniform crystal structure and a good quality, and a method of manufacturing a thin film transistor-liquid crystal display (TFT-LCD) using the same... | 04/17/2007 |
| 7199059 | Method for removing polymer as etching residue A method for removing polymer as an etching residue is described. A substrate with polymer as an etching residue thereon is provided, and a hydrogen-containing plasma is used to treat the substrate. A wet clean step is then performed to remove the polymer from the s... | 04/03/2007 |
| 7172960 | Multi-layer film stack for extinction of substrate reflections during patterning A method including introducing a dielectric layer over a substrate between an interconnection line and the substrate, the dielectric layer comprising a plurality of alternating material layers; and patterning an interconnection to the substrate. An apparatus compris... | 02/06/2007 |
| 7157377 | Method of making a semiconductor device using treated photoresist A semiconductor device is made by patterning a conductive layer for forming gates of transistors. The process for forming the gates has a step of patterning photoresist that overlies the conductive layer. The patterned photoresist is trimmed so that its width is red... | 01/02/2007 |
| 7132361 | System for and method of forming via holes by multiple deposition events in a continuous inline shadow mask deposition process Via holes are formed in a continuous inline shadow mask production system by depositing a first conductor layer and subsequently depositing a first insulator layer over a portion of the first conductor layer. The first insulator layer is deposited in a manner to def... | 11/07/2006 |
| 7119014 | Method for fabricating a semiconductor device having a tapered-mesa side-wall film A method for fabricating a semiconductor memory device includes the consecutive steps of consecutively depositing metallic, nitride and oxide films on an underlying insulating film, patterning the nitride and oxide films to allow the oxide film to have a patterned a... | 10/10/2006 |
| 7105431 | Masking methods The invention includes masking methods. In one implementation, a masking material comprising boron doped amorphous carbon is formed over a feature formed on a semiconductor substrate. The masking material comprises at least about 0.5 atomic percent boron. The maskin... | 09/12/2006 |
| 7083994 | Method of manufacturing a semiconductor device with outline of cleave marking regions and alignment or registration features This invention generally relates to semiconductor devices, for example lasers and more particularly to single frequency lasers and is directed at overcoming problems associated with the manufacture of these devices. In particular, a laser device is provided formed o... | 08/01/2006 |
| 7029592 | Coated beads and process utilizing such beads for forming an etch mask having a discontinuous regular pattern A process for forming an etch mask having a discontinuous regular pattern utilizes beads, each of which has a substantially unetchable core covered by a removable spacer coating. Beads are dispensed as a hexagonally packed monolayer onto a thermo-adhesive layer. Fol... | 04/18/2006 |
| 6998350 | Method for forming micro groove structure A method of forming a micro groove structure according to the invention has the steps of: (a) forming a mask pattern on a substrate capable of being subjected to dry etching; (b) dry etching the substrate having the mask pattern formed thereon; (c) vapor-phase formi... | 02/14/2006 |
| 6998333 | Method for making nanoscale wires and gaps for switches and transistors A method for forming first and second linear structures of a first composition that meet at right angles, there being a gap at the point at which the structures meet. The linear structures are constructed on an etchable crystalline layer having the first composition... | 02/14/2006 |
| 6958292 | Method of manufacturing integrated circuit In order to shorten the period for the development and manufacture of a semiconductor integrated circuit device, at the time of transferring integrated circuit patterns onto a wafer by an exposure process, a photomask PM1 is used which is provided partially w... | 10/25/2005 |
| 6929959 | Manufacturing method of CPP type magnetic sensor having current-squeezing path On a multilayer film formed on a lower electrode layer, a resist layer having cutaway parts at a lower portion is formed, and on parts of the upper surface of the multilayer film which are not overlapped with the resist layer except for areas inside the cutaway part... | 08/16/2005 |
| 6919272 | Method for patterning densely packed metal segments in a semiconductor die and related structure A method of patterning a metal layer in a semiconductor die comprises forming a mask on the metal layer to define an open region and a dense region. The method further comprises etching the metal layer at a first etch rate to form a number of metal segments in the o... | 07/19/2005 |
| 6905966 | METHOD FOR ESTIMATING REMAINING FILM THICKNESS DISTRIBUTION, METHOD FOR DESIGNING PATTERNING MASK USING THE METHOD FOR ESTIMATING REMAINING FILM THICKNESS DISTRIBUTION, AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICES BY USING PATTERNING MASK DESIGNED BY USING THE METHOD FOR ESTIMATING REMAINING FILM THICKNESS DISTRIBUTION A method for estimating relative remaining film thickness distribution (CMP pattern ratio distribution) among sparse and dense active regions after CMP on the basis of the layout of a mask pattern in a one-chip mask region. In each mask pattern, a reduced region is ... | 06/14/2005 |
| 6905949 | Semiconductor apparatus fabrication method forming a resist pattern, a film over the resist, and reflowing the resist A semiconductor apparatus fabrication method is capable of effectively suppressing edge roughness when an extremely fine resist pattern is formed. In the semiconductor apparatus fabrication method, the extremely fine resist pattern is covered with a film whose heat-... | 06/14/2005 |
| 6881688 | Method of fabricating a vertically profiled electrode and semiconductor device comprising such an electrode A method of fabricating a vertically profiled electrode like a T-gate 40 on a semiconductor substrate 20 is described. The method comprises providing a resist structure 34 on the substrate 20, the resist structure 34 containing at ... | 04/19/2005 |
| 6872650 | Ball electrode forming method A ball electrode forming method comprises steps of: preparing a semiconductor apparatus having a plurality of electrode pads; arranging a mask having an upper surface and a lower surface, an area in the lower surface being larger than an area in the upper surface, a... | 03/29/2005 |
| 6872646 | Method for manufacturing conductive pattern substrate A conductive pattern is obtained by forming concave-convex on a substrate by using a pattern substrate. A conductive thin layer is formed and then coated with a layer of a photosensitive resin. The photo sensitive resin is exposed and development by using the patter... | 03/29/2005 |
| 6869899 | Lateral-only photoresist trimming for sub-80 nm gate stack The invention relates generally to lithographic patterning of very small features. In particular, the invention relates generally to patterning of semiconductor circuit features smaller than lithographically defined using either conventional optical lithography or n... | 03/22/2005 |
| 6844235 | Reticle repeater monitor wafer and method for verifying reticles According to one embodiment, verifying a reticle may include patterning an inspected layer (102-2) according to a reticle pattern, depositing a contrast enhancing layer (104-0) on a patterned layer (102-2), and inspecting a ... | 01/18/2005 |
| 6828167 | Method for manufacturing a thin film transistor for a liquid crystal display Disclosed is a thin film transistor (TFT) for a liquid crystal display (LCD) and a method for manufacturing the same that allows the number of photomasks used in a photolithography process to be decreased as compared to conventional methods. A passivation film is fo... | 12/07/2004 |
| 6824698 | Uniform emitter array for display devices, etch mask for the same, and methods for making the same A method for making an emitter for a display device, an emitter array produced by such method, an etch mask used during such method, and a method for making such an etch mask. The method for making the emitter comprising providing a substrate, forming a conducting l... | 11/30/2004 |
| 6794207 | Method of manufacturing integrated circuit In order to shorten the period for the development and manufacture of a semiconductor integrated circuit device, at the time of transferring integrated circuit patterns onto a wafer by an exposure process, a photomask PM1 is used which is provided partially w... | 09/21/2004 |
| 6784070 | Intra-cell mask alignment for improved overlay A method for intra-cell alignment of a substrate and mask comprises providing a substrate comprising an exposed photosensitive material, providing a phase-shift mask, and aligning the phase-shift mask to an intra-cell structure on the substrate. ... | 08/31/2004 |
| 6780781 | Method for manufacturing an electronic device A method for manufacturing an electronic device is provided. In one example of the method, the method prevents deformation of a resist mask caused by the irradiation of exposure light. The resist mask has a resist as an opaque element, and can afford mask patterns u... | 08/24/2004 |
| 6767821 | Method for fabricating an interconnect line A method of fabricating an interconnect line comprises forming a wall, depositing an etch mask having a thickness that decreases towards a bottom of the wall, and isotropically etching the wall at the bottom to form the interconnect line having a pre-determined gap ... | 07/27/2004 |
| 6767824 | Method of fabricating a gate structure of a field effect transistor using an alpha-carbon mask A method of fabricating a gate structure of a field effect transistor comprising processes of forming an α-carbon mask and plasma etching a gate electrode and a gate dielectric using the α-carbon mask. In one embodiment, the gate dielectric comprises hafnium dioxi... | 07/27/2004 |
| 6759351 | Method for eliminating development related defects in photoresist masks Polymer blobs that are development related defects are substantially eliminated in patterned photoresist masks by a heat treatment of the wafer performed at a development step in two different manners according to the present invention. In the first method, after th... | 07/06/2004 |
| 6759328 | Masks and method for contact hole exposure A mask and method for contact hole exposure. First, a mask including a transparent substrate, a phase shift layer installed on the transparent substrate to define a series of patterns having contact hole areas set in array, an a plurality of metal lines installed on... | 07/06/2004 |
| 6750087 | Thin film transistor array, fabrication method thereof, and liquid crystal display device employing the same A fabrication method of a thin film transistor array substrate includes a step of forming a gate insulation film, a semiconductor layer, an ohmic layer, and a metal film on the insulating substrate on which the gate line is formed, a step of forming a resist pattern... | 06/15/2004 |
| 6734079 | Microelectronic fabrication having sidewall passivated microelectronic capacitor structure fabricated therein Within a method for fabricating a microelectronic fabrication, and the microelectronic fabrication fabricated employing the method, there is formed within the microelectronic fabrication a capacitor structure which comprises a first capacitor plate layer having form... | 05/11/2004 |
| 6727195 | Method and system for decreasing the spaces between wordlines A method and system for providing a semiconductor device is disclosed. The method and system include providing a semiconductor substrate and providing a plurality of lines separated by a plurality of spaces. Each of the plurality of spaces preferably has a first wid... | 04/27/2004 |
| 6716736 | Method for manufacturing an under-bump metallurgy layer In a method for manufacturing an under-bump metallurgy (UBM) layer, a plate having a plurality of openings is prepared. Then, the plate is placed on the wafer. Finally, the material of the under-bump metallurgy layer is sputtered on the wafer using the plate as a sp... | 04/06/2004 |
| 6712903 | Mask for evaluating selective epitaxial growth process Disclosed is a mask for evaluating selective epitaxial growth process. The disclosed mask comprises a mask pattern for resistance measurement to measure sheet resistance of grown single crystal silicon in a first area, a mask pattern for selectivity evaluation to ev... | 03/30/2004 |
| 6699779 | Method for making nanoscale wires and gaps for switches and transistors A method for forming first and second linear structures of a first composition that meet at right angles, there being a gap at the point at which the structures meet. The linear structures are constructed on an etchable crystalline layer having the first ... | 03/02/2004 |
| 6686300 | Sub-critical-dimension integrated circuit features A method of photolithographically forming an integrated circuit feature, such as a conductive structure, for example a gate electrode (15), or such as a patterned insulator feature, is disclosed. A critical dimension (CD) for a photolithography process de... | 02/03/2004 |
