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| Number | Title | Issue Date |
| 7339248 | Self-adjusting serial circuit of thin layers and method for production thereof The invention relates to a self-adjusting serial connection of thin layers and a method for the production thereof. The invention is characterized in that electrically conducting conductor tracks (20) are applied to a substrate (10), whereupon several ... | 03/04/2008 |
| 7316978 | Method for forming recesses A method for forming a recess. The method includes providing a substrate with two protrusions having a first side wall and a second side wall opposite to the first side wall disposed above the substrate, conformally forming a mask layer on the substrate and the prot... | 01/08/2008 |
| 7297581 | SRAM formation using shadow implantation A method of doping fins of a semiconductor device that includes a substrate includes forming multiple fin structures on the substrate, each of the fin structures including a cap formed on a fin. The method further includes performing a first tilt angle implant proce... | 11/20/2007 |
| 7288426 | Automatically adjusting serial connections of thick and thin layers and method for the production thereof The invention relates to a method for the production of automatically adjusting serial connections of thick and/or thin layers. The method comprises the following process steps: applying electrically conductive strip conductors (20) to a substrate (10)... | 10/30/2007 |
| 7250336 | Method for fabricating a shadow mask in a trench of a microelectronic or micromechanical structure The present invention provides a method for fabricating a shadow mask in a trench of a microelectronic or micromechanical structure, comprising the steps of: providing a trench in the microelectronic or micromechanical structure; providing a partial filling in the t... | 07/31/2007 |
| 7217656 | Structure and method for bond pads of copper-metallized integrated circuits A metal structure for a contact pad of a wafer or substrate (101), which have copper interconnecting traces (102) surrounded by a barrier metal layer (103). The wafer or substrate is protected by an insulating overcoat (104). In the struc... | 05/15/2007 |
| 7179748 | Method for forming recesses A method for forming a recess. The method includes providing a substrate with two protrusions having a first side wall and a second side wall opposite to the first side wall disposed above the substrate, conformally forming a mask layer on the substrate and the prot... | 02/20/2007 |
| 7132361 | System for and method of forming via holes by multiple deposition events in a continuous inline shadow mask deposition process Via holes are formed in a continuous inline shadow mask production system by depositing a first conductor layer and subsequently depositing a first insulator layer over a portion of the first conductor layer. The first insulator layer is deposited in a manner to def... | 11/07/2006 |
| 7078328 | Semiconductor processing methods of transferring patterns from patterned photoresists to materials, and structures comprising silicon nitride The invention includes a semiconductor processing method. A first material comprising silicon and nitrogen is formed. A second material is formed over the first material, and the second material comprises silicon and less nitrogen, by atom percent, than the first ma... | 07/18/2006 |
| 6894368 | Microelectronic device fabricating method, method of forming a pair of conductive device components of different base widths from a common deposited conductive layer, and integrated circuitry A microelectronic device fabricating method includes providing a substrate having a mean global outer surface extending along a plane. A first portion is formed over the substrate comprising a straight linear segment which is angled from the plane and forming a seco... | 05/17/2005 |
| 6849540 | METHOD OF FABRICATING SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE AND METHOD OF PRODUCING A MULTI-CHIP MODULE THAT INCLUDES PATTERNING WITH A PHOTOMASK THAT USES METAL FOR BLOCKING EXPOSURE LIGHT AND A PHOTOMASK THAT USES ORGANIC RESIN FOR BLOCKING EXPOSURE LIGHT Productivity of a semiconductor integrated circuit device is improved. According to how many times the photomask is used, a photomask having an opaque pattern made of metal and a photomask having an opaque pattern made of a resist film are properly used, and thereby... | 02/01/2005 |
| 6815318 | Manufacturing method of semiconductor device When an opening diameter of a top end of a substantially column-shaped contact hole is S1, an opening diameter of a top end of a substantially column-shaped contact hole is T1, and a thickness of a silicon insulating layer is h, then contact holes are formed so as t... | 11/09/2004 |
| 6787406 | Systems and methods for forming dense n-channel and p-channel fins using shadow implanting A method facilitates the doping of fins of a semiconductor device that includes a substrate. The method includes forming fin structures on the substrate, where each of the fin structures includes a cap formed on a fin. The method further includes performing a first ... | 09/07/2004 |
| 6774006 | Microelectronic device fabricating method, and method of forming a pair of field effect transistor gate lines of different base widths from a common deposited conductive layer A microelectronic device fabricating method includes providing a substrate having a mean global outer surface extending along a plane. A first portion is formed over the substrate comprising a straight linear segment which is angled from the plane and forming a seco... | 08/10/2004 |
| 6667215 | Method of making transistors A method for making transistors comprises depositing source electrode and drain electrode features onto a substrate through a single aperture in a stationary shadow mask, said aperture having at least two opposing edges; wherein the shapes of the features... | 12/23/2003 |
| 6509626 | Conductive device components of different base widths formed from a common conductive layer A microelectronic device fabricating method includes providing a substrate having a mean global outer surface extending along a plane. A first portion is formed over the substrate comprising a straight linear segment which is angled from the plane and for... | 01/21/2003 |
| 6291135 | Ionization technique to reduce defects on next generation lithography mask during exposure In one embodiment, the present invention relates to a method of processing a semiconductor structure including a resist thereon, involving contacting the semiconductor structure including the resist with a plasma comprising at least one inert gas selected... | 09/18/2001 |
| 6274198 | Shadow mask deposition A method of depositing material on a substrate using a shadow mask. The mask includes a plurality of etched features which correspond to a plurality of features in the substrate. Spheres are provided in the features of the mask or substrate so that the ma... | 08/14/2001 |
| 6194268 | Printing sublithographic images using a shadow mandrel and off-axis exposure The present invention overcomes the limitations of the prior art to allow for the creation of smaller components for use in logic circuits. The invention provides a new method of defining and forming features on a semiconductor substrate by using a layer ... | 02/27/2001 |
| 6117774 | Method for manufacturing shadow mask and etching-resistant layer-coating apparatus A method of manufacturing a shadow mask by making use of a coating apparatus, wherein a gravure roll 20 mm to 60 mm in diameter is disposed below a metallic thin plate and any supporting member is not disposed at an opposite side portion of the metallic t... | 09/12/2000 |
| 6050827 | Method of manufacturing a thin-film transistor with reinforced drain and source electrodes A thin film transistor where source and drain electrodes are film laminates including at least two layers. A first layer film of the laminate, which is formed to a thickness of 10 to 700 Å is in ohmic contact with underlying semiconductor film. A second ... | 04/18/2000 |
| 6049104 | MOSFET device to reduce gate-width without increasing JFET resistance The present invention discloses a method for fabricating a MOSFET device supported on a substrate. The method includes the steps of (a) growing an oxide layer on the substrate followed by depositing a polysilicon layer and applying a gate mask for perform... | 04/11/2000 |
| 6036772 | Method for making semiconductor device A method for making a semiconductor device comprises: depositing at least one Group II-VI compound semiconductor layer comprising at least one Group II element selected from the group consisting of zinc, magnesium, manganese, beryllium, cadmium and mercur... | 03/14/2000 |
| 6022809 | Composite shadow ring for an etch chamber and method of using A composite shadow ring for use in an etch chamber that does not generate contaminating oxygen gas when bombarded by a gas plasma and a method for using such composite shadow ring are presented. The composite shadow ring may have a structure of a body por... | 02/08/2000 |
| 5994194 | Self-aligned base ohmic metal for an HBT device cross-reference to related applications A relatively simple method for providing relatively close spacing between the emitter mesa and the base ohmic metal of a heterojunction bipolar transistor (HBT) on a relatively uniform basis. An emitter and base layer are epitaxially grown on a substrate.... | 11/30/1999 |
| 5916822 | Method of etching a substrate by means of chemical beams In order to facilitate resuming molecular beam epitaxy after etching a substrate or an epitaxial layer, the etching method is implemented in an ultra-high vacuum, and it consists in producing at least two simultaneous chemical beams converging towards the... | 06/29/1999 |
| 5804487 | Method of fabricating high ଲHBT devices A method for controlling the spacing between the emitter mesa and the base ohmic metal of a heterojunction bipolar transistor (HBT) to obtain a relatively high gain (ଲ) with a low-parasitic base resistance. In a first method, after the emitter, base... | 09/08/1998 |
| 5780329 | Process for fabricating a moderate-depth diffused emitter bipolar transistor in a BICMOS device without using an additional mask A bipolar transistor with a relatively deep emitter region is formed in a BICMOS device using the source/drain mask used to form the source and drain regions of MOSFETs of the device and the base region mask which would otherwise be required in any event ... | 07/14/1998 |
| 5741736 | Process for forming a transistor with a nonuniformly doped channel A semiconductor device (83)including a transistor (85) with a nonuniformly doped channel region can be formed with a relatively simple process without having to use high dose implants or additional heat cycles. In one embodiment, a polysilicon layer (14) ... | 04/21/1998 |
| 5739058 | Method to control threshold voltage by modifying implant dosage using variable aperture dopant implants A semiconductor fabrication method is provided for forming transistors upon a semiconductor substrate wherein the semiconductor substrate has first, second and third substrate regions. A single mask layer is formed over the semiconductor substrate. The si... | 04/14/1998 |
| 5716759 | Method and apparatus for producing integrated circuit devices A method for three dimensional lithography including the steps of providing a substrate (44) having surfaces extending in three dimensions and a light sensitive coating and illuminating the substrate via a mask (40) with light impinging on the surfaces at... | 02/10/1998 |
| 5693234 | Method for producing at least one recess in a surface of a substrate apparatus for carrying out the said method and use of the product thus obtained With the proposed method, a masking device (5) with an aperture (6) is placed on the substrate (8), the masking device (5) and the region to be etched (90) on the substrate surface (9) forming a hollow chamber (11) which communicates with the reaction cha... | 12/02/1997 |
| 5665614 | Method for making fully self-aligned submicron heterojunction bipolar transistor A submicron emitter heterojunction bipolar transistor and a method for fabricating the same is disclosed. The fabrication process includes lattice matched growth of subcollector, collector, base, emitter, and emitter cap layers in sequential order on a se... | 09/09/1997 |
| 5652179 | Method of fabricating sub-micron gate electrode by angle and direct evaporation Disclosed is a method of fabricating semiconductor devices having sub-micron gate electrodes using angle and direct evaporation techniques. A first and second photoresist layer are formed atop a substrate and the second layer is selectively processed to f... | 07/29/1997 |
| 5597740 | Semiconductor display device and a method of fabricating the same A light emitting device and a method of fabricating the same in which a first cladding layer is formed on a substrate, then red, green and blue light emitting portions each made of II-VI semiconductor are formed in a horizontal direction with respect to a... | 01/28/1997 |
| 5561071 | DNA and DNA technology for the construction of networks to be used in chip construction and chip production (DNA-chips) The invention relates to construction of specific molecular microcircuits by the use of double and single stranded nucleic acids and specific DNA-binding proteins.... | 10/01/1996 |
| 5536677 | Method of forming conductive bumps on a semiconductor device using a double mask structure A method for forming conductive bumps (60, 62) on a semiconductor device (50) using a mask structure (20) employs two masks (22, 24) individually fabricated and positioned in a back-to-back relationship. Each mask is patterned and isotropically etched to ... | 07/16/1996 |
| 5527719 | Process for making a semiconductor MOS transistor using a fluid material A process for formation of an MOS semiconductor device having an LDD structure is disclosed, which may include the steps of: forming an active region and an isolation region on a semiconductor substrate; forming a first insulating layer on the surface of ... | 06/18/1996 |
| 5346581 | Method of making a compound semiconductor device In a preferred embodiment, the disclosed method of making a compound semiconductor (e.g., InP, GaAs) device comprises etching of a semiconductor body by exposure of the body to a chemical beam or beams that comprise an etching medium (e.g., PCl3 | 09/13/1994 |
| 5332681 | Method of making a semiconductor device by forming a nanochannel mask The present invention provides a method for depositing a pattern of deposd material on or within a substrate, comprising the steps of: interposing a glass mask between a source and a substrate, the mask having channels therethrough which are arranged in ... | 07/26/1994 |
