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| Number | Title | Issue Date |
| 7442657 | Producing stress-relaxed crystalline layer on a substrate A stress relaxed monocrystalline layer structure is made on a nonlattice matched substrate by first applying to the substrate epitaxially a monocrystalline layer structure comprising at least one layer, the monocrystalline layer structure forming with the substrate ... | 10/28/2008 |
| 7435605 | Method for fabricating a component having an electrical contact region A method for fabricating a component having an electrical contact region on an n-conducting AlGaInP-based or AlGaInAs-based outer layer of an epitaxially grown semiconductor layer sequence, in which electrical contact material, which includes Au and at least one dop... | 10/14/2008 |
| 7432559 | Silicide formation on SiGe A semiconductor structure includes a first silicon-containing layer comprising an element selected from the group consisting essentially of carbon and germanium wherein the silicon-containing layer has a first atomic percentage of the element to the element and sili... | 10/07/2008 |
| 7393735 | Structure for and method of fabricating a high-mobility field-effect transistor A structure and method of fabricating a high-mobility semiconductor layer structure and field-effect transistor (MODFET) that includes a high-mobility conducting channel, while at the same time, maintaining counter doping to control deleterious short-channel effects... | 07/01/2008 |
| 7378305 | Semiconductor integrated circuit and fabrication process thereof A semiconductor integrated circuit device includes an n-channel MOS transistor formed on a first device region of a silicon substrate and a p-channel MOS transistor formed on a second device region of the silicon substrate, wherein the n-channel MOS transistor inclu... | 05/27/2008 |
| 7361574 | Single-crystal silicon-on-glass from film transfer A method is provided for transferring a single-crystal silicon (Si) film to a glass substrate. The method deposits a germanium (Ge)-containing material overlying a Si wafer, forming a sacrificial Ge-containing film. A single-crystal Si film is formed overlying the s... | 04/22/2008 |
| 7358112 | Method of growing a semiconductor layer A method of growing a p-type nitride semiconductor material having magnesium as a p-type dopant by molecular beam epitaxy (MBE), comprises supplying ammonia gas, gallium and magnesium to an MBE growth chamber containing a substrate so as to grow a p-type nitride sem... | 04/15/2008 |
| 7348284 | Non-planar pMOS structure with a strained channel region and an integrated strained CMOS flow A non-planar tri-gate p-MOS transistor structure with a strained channel region and a non-planar tri-gate integrated strained complimentary metal-oxide-semiconductor (CMOS) structure are described. A relaxed Si1-x Gex layer is formed on the sil... | 03/25/2008 |
| 7344933 | Method of forming device having a raised extension region A method is disclosed of forming an extension region for a transistor having a gate structure overlying a compound semiconductor layer. An anneal is used either before or after deep source/drain implantation to diffuse a dopant from a raised region adjacent the gate... | 03/18/2008 |
| 7327036 | Method for depositing a group III-nitride material on a silicon substrate and device therefor The present invention is related to a device comprising a substrate comprising a silicon substrate having a porous top layer, a second layer on said top layer, said second layer made of a material comprising Ge, and a further layer of a Group III-nitride material on... | 02/05/2008 |
| 7314513 | Methods of forming a doped semiconductor thin film, doped semiconductor thin film structures, doped silane compositions, and methods of making such compositions Methods for forming doped silane and/or semiconductor thin films, doped liquid phase silane compositions useful in such methods, and doped semiconductor thin films and structures. The composition is generally liquid at ambient temperatures and includes a Group IVA a... | 01/01/2008 |
| 7274055 | Method for improving transistor performance through reducing the salicide interface resistance An embodiment of the invention reduces the external resistance of a transistor by utilizing a silicon germanium alloy for the source and drain regions and a nickel silicon germanium self-aligned silicide (i.e., salicide) layer to form the contact surface of the sour... | 09/25/2007 |
| 7256107 | Damascene process for use in fabricating semiconductor structures having micro/nano gaps In fabricating a microelectromechanical structure (MEMS), a method of forming a narrow gap in the MEMS includes a) depositing a layer of sacrificial material on the surface of a supporting substrate, b) photoresist masking and at least partially etching the sacrific... | 08/14/2007 |
| 7241670 | Method to form relaxed SiGe layer with high Ge content using co-implantation of silicon with boron or helium and hydrogen A method of forming a relaxed SiGe layer having a high germanium content in a semiconductor device includes preparing a silicon substrate; depositing a strained SiGe layer; implanting ions into the strained SiGe layer, wherein the ions include silicon ions and ions ... | 07/10/2007 |
| 7238622 | Wafer bonded virtual substrate and method for forming the same A method of forming a virtual substrate comprised of an optoelectronic device substrate and handle substrate comprises the steps of initiating bonding of the device substrate to the handle substrate, improving or increasing the mechanical strength of the device and ... | 07/03/2007 |
| 7232737 | Treatment of a removed layer of silicon-germanium A method of forming a structure that includes a removed layer taken from a donor wafer donor wafer that includes a first layer of Si1-xGex and a second layer of Si1-yGey. The method includes implanting atomic species into ... | 06/19/2007 |
| 7229865 | Methods of making semiconductor-on-insulator thin film transistor constructions The invention includes SOI thin film transistor constructions, memory devices, computer systems, and methods of forming various structures, devices and systems. The structures typically comprise a thin crystalline layer of silicon/germanium formed over a wide range ... | 06/12/2007 |
| 7220632 | Method of forming a semiconductor device and an optical device and structure thereof An integration process where a first semiconductor protective layer and a second semiconductor protective layer are formed to protect the first and second semiconductor materials, respectfully, during processing to form an optical device, such as a photodetector, an... | 05/22/2007 |
| 7211521 | Capping layer for crystallizing germanium, and substrate having thin crystallized germanium layer A structure including at least one layer of germanium formed on a surface of a ceramic substrate is provided. The layer of germanium has a thickness of not larger than 10 microns and includes grains having grain size of at least 0.05 mm. A structure including at lea... | 05/01/2007 |
| 7208357 | Template layer formation A process for forming a strained semiconductor layer. The process includes implanting ions into a semiconductor layer prior to performing a condensation process on the layer. The ions assist in diffusion of atoms (e.g. germanium) in the semiconductor layer and to in... | 04/24/2007 |
| 7202503 | III-V and II-VI compounds as template materials for growing germanium containing film on silicon An assembly comprising a semiconductor substrate having a first lattice constant, an intermediate layer having a second lattice constant formed on the semiconductor substrate, and a virtual substrate layer having a third lattice constant formed on the intermediate l... | 04/10/2007 |
| 7202122 | Cobalt silicidation process for substrates with a silicon—germanium layer A method comprises providing a semiconductor alloy layer on a semiconductor substrate, forming a gate structure on the semiconductor alloy layer, forming source and drain regions in the semiconductor substrate on both sides of the gate structure, removing at least a... | 04/10/2007 |
| 7199015 | Rare earth-oxides, rare earth-nitrides, rare earth-phosphides and ternary alloys with silicon Atomic layer epitaxy (ALE) is applied to the fabrication of new forms of rare-earth oxides, rare-earth nitrides and rare-earth phosphides. Further, ternary compounds composed of binary (rare-earth oxides, rare-earth nitrides and rare-earth phosphides) mixed with sil... | 04/03/2007 |
| 7192868 | Method of obtaining release-standing micro structures and devices by selective etch removal of protective and sacrificial layer using the same A method of patterning and releasing chemically sensitive low k films without the complication of a permanent hardmask stack, yielding an unaltered free-standing structure is provided. The method includes providing a structure including a Si-containing substrate hav... | 03/20/2007 |
| 7186664 | Methods and structures for metal interconnections in integrated circuits A typical integrated-circuit fabrication requires interconnecting millions of microscopic transistors and resistors with metal wires. Making the metal wires flush, or coplanar, with underlying insulation requires digging trenches in the insulation, and then filling ... | 03/06/2007 |
| 7179727 | Formation of lattice-tuning semiconductor substrates A method of forming a lattice-tuning semiconductor substrate comprises the steps of defining parallel strips of a Si surface by the provision of spaced parallel oxide walls (2) on the surface, selectively growing a first SiGe layer on the strips such that fir... | 02/20/2007 |
| 7169226 | Defect reduction by oxidation of silicon A method of fabricating high-quality, substantially relaxed SiGe-on-insulator substrate materials which may be used as a template for strained Si is described. A silicon-on-insulator substrate with a very thin top Si layer is used as a template for compressively str... | 01/30/2007 |
| 7166528 | Methods of selective deposition of heavily doped epitaxial SiGe The invention generally teaches a method for depositing a silicon film or silicon germanium film on a substrate comprising placing the substrate within a process chamber and heating the substrate surface to a temperature in the range from about 600° C. to about 900... | 01/23/2007 |
| 7163854 | Fabrication method of a semiconductor device To form a wiring electrode having excellent contact function, in covering a contact hole formed in an insulting film, a film of a wiring material comprising aluminum or including aluminum as a major component is firstly formed and on top of the film, a film having a... | 01/16/2007 |
| 7163903 | Method for making a semiconductor structure using silicon germanium A semiconductor substrate having a silicon layer is provided. In one embodiment, the substrate is a silicon-on-insulator (SOI) substrate having an oxide layer underlying the silicon layer. An amorphous or polycrystalline silicon germanium layer is formed overlying t... | 01/16/2007 |
| 7148096 | Method of manufacturing a semiconductor device having a gate electrode containing polycrystalline silicon-germanium An aspect of the present invention includes a first conductive type semiconductor region formed in a semiconductor substrate, a gate electrode formed on the first conductive type semiconductor region, a channel region formed immediately below the gate electrode in t... | 12/12/2006 |
| 7148130 | Semiconductor device and method of manufacturing the same A semiconductor device is disclosed, which comprises a semiconductor substrate, source/drain regions formed in the semiconductor substrate, a gate insulating film formed on a channel region between the source/drain regions, a gate electrode formed on the gate insula... | 12/12/2006 |
| 7138650 | Semiconductor substrate, field-effect transistor, and their manufacturing method of the same A semiconductor substrate, a field effect transistor and their manufacturing methods provided with, in order to lower penetrating dislocation density and reduce surface roughness to a practical level, an Si substrate 1, a first SiGe layer 2 on the Si s... | 11/21/2006 |
| 7129168 | Method of estimating substrate temperature A method of estimating substrate temperature according to this invention includes the steps of epitaxially growing a Si-containing layer (103) on a SiGe layer (102) formed on a substrate for temperature estimation (101) constituted of a Si subst... | 10/31/2006 |
| 7094671 | Transistor with shallow germanium implantation region in channel A method of manufacturing a transistor and a structure thereof, wherein a very shallow region having a high dopant concentration of germanium is implanted into a channel region of a transistor at a low energy level, forming an amorphous germanium implantation region... | 08/22/2006 |
| 7087444 | Method for integration of microelectronic components with microfluidic devices A method of forming an integrated microelectronic device and a micro channel is provided. The method offers an inexpensive way of integrating devices that are usually incompatible during fabrication, a microchannel and a microelectronic structure such as an electro-... | 08/08/2006 |
| 7081410 | Controlling threading dislocation densities in Ge on Si using graded GeSi layers and planarization A semiconductor structure including a semiconductor substrate, at least one first crystalline epitaxial layer on the substrate, the first layer having a surface which is planarized, and at least one second crystalline epitaxial layer on the at least one first layer.... | 07/25/2006 |
| 7078353 | Indirect bonding with disappearance of bonding layer The invention provides a method of producing a structure of a thin layer of semiconductor material on a support substrate. The thin layer is obtained from a donor substrate and includes an upper layer of semiconductor material. The method includes forming on the upp... | 07/18/2006 |
| 7078300 | Thin germanium oxynitride gate dielectric for germanium-based devices A method for producing thin, below 6 nm of equivalent oxide thickness, germanium oxynitride layer on Ge-based materials for use as gate dielectric is disclosed. The method involves a two step process. First, nitrogen is incorporated in a surface layer of the Ge-base... | 07/18/2006 |
| 7078299 | Formation of finFET using a sidewall epitaxial layer A method of forming a finFET transistor using a sidewall epitaxial layer includes forming a silicon germanium (SiGe) layer above an oxide layer above a substrate, forming a cap layer above the SiGe layer, removing portions of the SiGe layer and the cap layer to form... | 07/18/2006 |
