...that power steering was invented by independent inventor Francis W. Davis? As chief engineer in the 1920s of the truck division of the Pierce Arrow Motor Car Company, he saw how hard it was to steer heavy vehicles. So that he would be able to keep the profits from his future invention, Davis left his job, rented a small engineering shop in Waltham, Mass., and developed a hydraulic power steering system that led to power steering.
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| Number | Title | Issue Date |
| 7541300 | Silicon carbide semiconductor device and method for manufacturing the same A silicon carbide semiconductor device includes: a semiconductor substrate having a silicon carbide substrate, a first semiconductor layer, a second semiconductor layer, and a third semiconductor layer; a trench penetrating the second and the third semiconductor lay... | 06/02/2009 |
| 7498273 | Formation of high quality dielectric films of silicon dioxide for STI: usage of different siloxane-based precursors for harp II—remote plasma enhanced deposition processes Methods of depositing a dielectric layer in a gap formed on a substrate are described. The methods include introducing an organo-silicon precursor and an oxygen precursor to a deposition chamber. The organo-silicon precursor has a C:Si atom ratio of less than 8, and... | 03/03/2009 |
| 7432171 | Silicon carbide and related wide-bandgap transistors on semi-insulating epitaxy for high-speed, high-power applications A silicon carbide semi-insulating epitaxy layer is used to create power devices and integrated circuits having significant performance advantages over conventional devices. A silicon carbide semi-insulating layer is formed on a substrate, such as a conducting substr... | 10/07/2008 |
| 7407837 | Method of manufacturing silicon carbide semiconductor device Stress is exerted to the SiC crystal in the region, in which the carriers of a SiC semiconductor device flow, to change the crystal lattice intervals of the SiC crystal. Since the degeneration of the conduction bands in the bottoms thereof is dissolved, since the in... | 08/05/2008 |
| 7396410 | Featuring forming methods to reduce stacking fault nucleation sites Epitaxial silicon carbide layers are fabricated by forming features in a surface of a silicon carbide substrate having an off-axis orientation toward a crystallographic direction. The features include at least one sidewall that is orientated nonparallel (i.e., obliq... | 07/08/2008 |
| 7381992 | Silicon carbide power devices with self-aligned source and well regions Silicon carbide semiconductor devices and methods of fabricating silicon carbide semiconductor devices are provided by successively etching a mask layer to provide windows for formation of a source region of a first conductivity type, a buried silicon carbide region... | 06/03/2008 |
| 7372087 | Semiconductor structure for use in a static induction transistor having improved gate-to-drain breakdown voltage A structure for use in a static induction transistor includes a semiconductor body having first and second semiconductor layers on a substrate, with the second layer having a dopant concentration of around an order of magnitude higher than the dopant concentration o... | 05/13/2008 |
| 7329606 | Semiconductor device having nanowire contact structures and method for its fabrication A semiconductor device having small electrical contacts to impurity doped regions and a method for fabrication of such a device are provided. In accordance with one embodiment of the invention the semiconductor device comprises a semiconductor substrate having a dop... | 02/12/2008 |
| 7282438 | Low-k SiC copper diffusion barrier films Copper diffusion barrier films having low dielectric constants are suitable for a variety of copper/inter-metal dielectric integration schemes. Copper diffusion barrier films in accordance with the invention are composed of one or more layers of silicon carbide, at ... | 10/16/2007 |
| 7279115 | Method to reduce stacking fault nucleation sites and reduce V drift in bipolar devices A method is disclosed for preparing a substrate and epilayer for reducing stacking fault nucleation and reducing forward voltage (Vf) drift in silicon carbide-based bipolar devices. The method includes the steps of etching the surface of a silicon carbide... | 10/09/2007 |
| 7247513 | Dissociation of silicon clusters in a gas phase during chemical vapor deposition homo-epitaxial growth of silicon carbide A method of forming a layer of silicon carbide wherein silicon clusters are dissociated in a gas phase. Silicon clusters may be dissociated by a silicon-etching gas such as a group VII-containing component. A semiconductor device is also disclosed having a layer for... | 07/24/2007 |
| 7247550 | Silicon carbide-based device contact and contact fabrication method A silicon carbide-based device contact and contact fabrication method employ a layer of poly-silicon on a SiC substrate, with the contact's metal layer deposited on top of the poly-silicon. Both Schottky and ohmic contacts can be formed. The poly-silicon layer can b... | 07/24/2007 |
| 7242049 | Memory device A floating gate transistor has a reduced barrier energy at an interface with an adjacent gate insulator, allowing faster charge transfer across the gate insulator at lower voltages. Data is stored as charge on the floating gate. The data charge retention time on the... | 07/10/2007 |
| 7235438 | Inclusion of nitrogen at the silicon dioxide-silicon carbide interface for passivation of interface defects In one aspect the present invention provides a method for manufacturing a silicon carbide semiconductor device. A layer of silicon dioxide is formed on a silicon carbide substrate and nitrogen is incorporated at the silicon dioxide/silicon carbide interface. In one ... | 06/26/2007 |
| 7226805 | Sequential lithographic methods to reduce stacking fault nucleation sites An epitaxial silicon carbide layer is fabricated by forming first features in a surface of a silicon carbide substrate having an off-axis orientation toward a crystallographic direction. The first features include at least one sidewall that is orientated nonparallel... | 06/05/2007 |
| 7196929 | Method for operating a memory device having an amorphous silicon carbide gate insulator A floating gate transistor has a reduced barrier energy at an interface with an adjacent amorphous silicon carbide (a-SiC) gate insulator, allowing faster charge transfer across the gate insulator at lower voltages. Data is stored as charge on the floating gate. The... | 03/27/2007 |
| 7189643 | Semiconductor device and method of fabricating the same An SiC film, a porous silica film as an interlayer dielectric film, another SiC film, an SiO2 film, an SiN film, and an antireflection film are formed in this order on an interlayer dielectric film and Cu film. The antireflection film is coated with an or... | 03/13/2007 |
| 7189658 | Strengthening the interface between dielectric layers and barrier layers with an oxide layer of varying composition profile A method of processing a substrate including depositing a transition layer and a dielectric layer on a substrate in a processing chamber are provided. The transition layer is deposited from a processing gas including an organosilicon compound and an oxidizing gas. T... | 03/13/2007 |
| 7173285 | Lithographic methods to reduce stacking fault nucleation sites Epitaxial silicon carbide layers are fabricated by forming features in a surface of a silicon carbide substrate having an off-axis orientation toward a crystallographic direction. The features include at least one sidewall that is orientated nonparallel (i.e., obliq... | 02/06/2007 |
| 7173284 | Silicon carbide semiconductor device and manufacturing method A silicon carbide semiconductor device that includes J-FETs has a drift layer of epitaxially grown silicon carbide having a lower impurity concentration level than a substrate on which the drift layer is formed. Trenches are formed in the surface of the drift layer,... | 02/06/2007 |
| 7169666 | Method of forming a device having a gate with a selected electron affinity A floating gate transistor has a reduced barrier energy at an interface with an adjacent gate insulator, allowing faster charge transfer across the gate insulator at lower voltages. Data is stored as charge on the floating gate. The data charge retention time on the... | 01/30/2007 |
| 7166894 | Schottky power diode with SiCOI substrate and process for making such diode The present invention relates to a power junction device including a substrate of the SiCOI type with a layer of silicon carbide (16) insulated from a solid carrier (12) by a buried layer of insulant (14), and including at least one Schottky con... | 01/23/2007 |
| 7163882 | Formulation and fabrication of an improved Ni based composite Ohmic contact to n-SiC for high temperature and high power device applications A composite Pt/Ti/WSi/Ni Ohmic contact has been fabricated by a physical deposition process which uses electron beam evaporation and dc-sputter deposition. The Ni based composite Ohmic contact on n-Sic is rapid thermally annealed (RTA) at 950° C. to 1000° C. for 3... | 01/16/2007 |
| 7154153 | Memory device A floating gate transistor has a reduced barrier energy at an interface with an adjacent gate insulator, allowing faster charge transfer across the gate insulator at lower voltages. Data is stored as charge on the floating gate. The data charge retention time on the... | 12/26/2006 |
| 7138291 | Methods of treating a silicon carbide substrate for improved epitaxial deposition and resulting structures and devices A method is disclosed for treating a silicon carbide substrate for improved epitaxial deposition thereon and for use as a precursor in the manufacture of devices such as light emitting diodes. The method includes the steps of implanting dopant atoms of a first condu... | 11/21/2006 |
| 7135359 | Manufacturing methods for large area silicon carbide devices Large area silicon carbide devices, such as light-activated silicon carbide thyristors, having only two terminals are provided. The silicon carbide devices are selectively connected in parallel by a connecting plate. Silicon carbide thyristors are also provided havi... | 11/14/2006 |
| 7129129 | Vertical device with optimal trench shape A method of forming a trench in a semiconductor substrate includes a step of converting the cross section of the upper portion of the trench from octagonal to rectangular, so that sensitivity to alignment errors between the trench lithography and the active area lit... | 10/31/2006 |
| 7118970 | Methods of fabricating silicon carbide devices with hybrid well regions MOS channel devices and methods of fabricating such devices having a hybrid channel are provided. Exemplary devices include vertical power MOSFETs that include a hybrid well region of silicon carbide and methods of fabricating such devices are provided. The hybrid w... | 10/10/2006 |
| 7109548 | Operating a memory device A floating gate transistor has a reduced barrier energy at an interface with an adjacent gate insulator, allowing faster charge transfer across the gate insulator at lower voltages. Data is stored as charge on the floating gate. The data charge retention time on the... | 09/19/2006 |
| 7105875 | Lateral power diodes A lateral power diodes with an optimal drift doping formed in widebandgap semiconductors like Silicon Carbide, Aluminum Nitride and Gallium Nitride and Diamond are provided with a voltage rating greater 200V. Contrary to conventional vertical design of power diodes,... | 09/12/2006 |
| 7078329 | Method of manufacturing silicon carbide semiconductor device An insulating film (2) is formed on a semiconductor substrate (1) formed of silicon carbide. A contact hole (3) is formed in the insulating film (2) to expose a part of the upper surface of the semiconductor substrate (1). Then, ni... | 07/18/2006 |
| 7074643 | Silicon carbide power devices with self-aligned source and well regions and methods of fabricating same Silicon carbide semiconductor devices and methods of fabricating silicon carbide semiconductor devices are provided by successively etching a mask layer to provide windows for formation of a source region or a first conductivity type, a buried silicon carbide region... | 07/11/2006 |
| 7061021 | System and method for fabricating diodes This invention is directed to a system and method of fabricating PN and PiN diodes by diffusing an acceptor impurity into a substrate. This invention is particularly advantageous for fabricating SiC diodes having linearly graded, deep pn junctions. One method that t... | 06/13/2006 |
| 7060620 | Method of preparing a surface of a semiconductor wafer to make it epiready The invention concerns a method of preparing the surface of a semiconductor wafer intended for microelectronics and/or optoelectronics applications. In particular, a method of preparing a SiC surface of a semiconductor wafer to make it epiready is described. The tec... | 06/13/2006 |
| 7052932 | Oxygen doped SiC for Cu barrier and etch stop layer in dual damascene fabrication A method of forming a dual damascene structure with improved performance is described. A first etch stop layer comprised of oxygen doped SiC is deposited on a SiC barrier layer to form a composite barrier/etch stop layer on a substrate. The remainder of the damascen... | 05/30/2006 |
| 7033950 | Graded junction termination extensions for electronic devices A graded junction termination extension in a silicon carbide (SiC) semiconductor device and method of its fabrication using ion implementation techniques is provided for high power devices. The properties of silicon carbide (SiC) make this wide band gap semiconducto... | 04/25/2006 |
| 7022545 | Production method of SiC monitor wafer The present invention has its object to obtain an SiC monitor wafer which can flatten the surface until particle detection is possible. SiC of a crystal system 3C is deposited on a substrate by a CVD (Chemical Vapor Deposition) method, and the SiC is detached from a... | 04/04/2006 |
| 7018554 | Method to reduce stacking fault nucleation sites and reduce forward voltage drift in bipolar devices A method is disclosed for preparing a substrate and epilayer for reducing stacking fault nucleation and reducing forward voltage (Vf) drift in silicon carbide-based bipolar devices. The method includes the steps of etching the surface of a silicon carbide... | 03/28/2006 |
| 7015142 | Patterned thin film graphite devices and method for making same In a method of making graphite devices, a preselected crystal face of a crystal is annealed to create a thin-film graphitic layer disposed against selected face. A preselected pattern is generated on the thin-film graphitic layer. A functional structure includes a c... | 03/21/2006 |
| 7008886 | Process for treatment of the surface of a semiconducting material, particularly using hydrogen, and surface obtained using this process A process treats a surface of a semiconductor material in order to put the surface into a predetermined electrical state. The semiconductor material is preferably monocrystalline. The process includes (a) preparing the surface of the semiconductor material such that... | 03/07/2006 |