An enclosure for small animals which is wearable on the front or back of an animate being.
Make the Most of Our Site
See this month's Top Inventors and Most Cited Patents.
Stay on top of the latest innovations by subscribing to an RSS feed.
Registered users: Manage your profile.
| Number | Title | Issue Date |
| 7368317 | Method of producing an N-type diamond with high electrical conductivity The invention relates to a method of producing an n-type diamond. The inventive method comprises an n-doping stage during which a donor species is vacuum diffused in a diamond that was initially doped with an acceptor, in order to form donor groups containing the do... | 05/06/2008 |
| 7361540 | Method of reducing noise disturbing a signal in an electronic device Certain aspects of a method for reducing noise disturbing at least one signal in an electronic device may comprise shielding a first layer doped with a first dopant from a signaling layer employing a second layer doped with a second dopant. A first signaling compone... | 04/22/2008 |
| 7341787 | Process for producing highly doped semiconductor wafers, and dislocation-free highly doped semiconductor wafers The invention relates to a process for producing highly doped semiconductor wafers, in which at least two dopants which are electrically active and belong to the same group of the periodic system of the elements are used for the doping. The invention also relates to... | 03/11/2008 |
| 7314794 | Low-cost high-performance planar back-gate CMOS A method of fabricating a high-performance planar back-gate CMOS structure having superior short-channel characteristics and reduced capacitance using processing steps that are not too lengthy or costly is provided. Also provided is a high-performance planar back-ga... | 01/01/2008 |
| 7250312 | Doping method and method for fabricating thin film transistor It is an object of the present invention to provide a doping apparatus, a doping method, and a method for fabricating a thin film transistor that can carry out doping to the carrier concentration which is optimum for obtaining the desired electric characteristic non... | 07/31/2007 |
| 7232744 | Method for implanting dopants within a substrate by tilting the substrate relative to the implant source The present invention provides a method for implanting a dopant in a substrate and a method for manufacturing a semiconductor device. The method for implanting a dopant, among other steps, including tilting a substrate (310) located on or over an implant plat... | 06/19/2007 |
| 7176484 | Use of an energy source to convert precursors into patterned semiconductors The present invention provides a substrate having thereon a patterned small molecule organic semiconductor layer. The present invention also provides a method and a system for the production of the substrate having thereon a patterned small molecule organic semicond... | 02/13/2007 |
| 7148131 | Method for implanting ions in a semiconductor A method for implanting ions in a semiconductor is disclosed. The method includes implanting indium ions into a substrate of a semiconductor material of the semiconductor device for a first time period. The method also includes implanting boron ions into the substra... | 12/12/2006 |
| 6977204 | Method for forming contact plug having double doping distribution in semiconductor device The present invention provides a method for forming a contact plug in a semiconductor device capable of preventing an increase of contact resistance caused by a decrease in dopant concentration and suppressing diffusions of dopants implanted into the contact. The do... | 12/20/2005 |
| 6872628 | Method of manufacturing semiconductor device A gate structure (4), an LDD region (6) and a sidewall (7) are provided in this order. Arsenic ions (8) are thereafter implanted into the upper surface of a silicon substrate (1) by tilted implantation. The next step is annealing f... | 03/29/2005 |
| 6872643 | Implant damage removal by laser thermal annealing A method of manufacturing a semiconductor device includes forming a layer over a substrate, and doping the layer with a dopant, after which the layer is laser thermal annealed. The layer can be a nitride, an oxide, or a polysilicon layer. The dopants can be arsenic,... | 03/29/2005 |
| 6815318 | Manufacturing method of semiconductor device When an opening diameter of a top end of a substantially column-shaped contact hole is S1, an opening diameter of a top end of a substantially column-shaped contact hole is T1, and a thickness of a silicon insulating layer is h, then contact holes are formed so as t... | 11/09/2004 |
| 6812079 | Method for a junction field effect transistor with reduced gate capacitance An apparatus and method for a semiconductor device with reduced gate capacitance. Specifically, an n-channel or p-channel junction field effect transistor (JFET) is described including an appropriately doped substrate forming a drain region, an epitaxial layer forme... | 11/02/2004 |
| 6797596 | Sacrificial deposition layer as screening material for implants into a wafer during the manufacture of a semiconductor device A method used during the formation of a semiconductor device reduces ion channeling during implantation of the wafer. The method comprises providing a semiconductor wafer and an unetched transistor gate stack assembly over the wafer. The unetched transistor gate sta... | 09/28/2004 |
| 6794277 | Method of doping semiconductor layer, method of manufacturing thin film semiconductor device, and thin film semiconductor device A lower concentration impurity diffusion region can be formed under excellent control, even when a low heat-resistant substrate is used. At the time of doping a semiconductor layer, a mask such as sidewalls (24) where an energy beam passes through, is formed ... | 09/21/2004 |
| 6716690 | Uniformly doped source/drain junction in a double-gate MOSFET Multiple dopant implantations are performed on a FinFET device to thereby distribute the dopant in a substantially uniform manner along a vertical depth of the FinFET in the source/drain junction. Each of the multiple implantations may be performed at different tilt... | 04/06/2004 |
| 6645839 | Method for improving a doping profile for gas phase doping A method for improving a doping profile using gas phase doping is described. In the method, silicon nitride and/or products of decomposition from a silicon nitride deposition are introduced in a process chamber before or during the actual gas phase doping... | 11/11/2003 |
| 6616786 | Process for applying an ink-only label to a polymeric surface The invention is directed to a returnable plastic crate provided on at least one surface with an ink only label that is removable without destructive treatment of the said surface, said label being adhered to said at least one surface by an activated adhe... | 09/09/2003 |
| 6602768 | MOS-gated power device with doped polysilicon body and process for forming same An improved MOS-gated power device 300 with a substrate 101 having an upper layer 101a of doped monocrystalline silicon of a first conduction type that includes a doped well region 107 of a second conduction type. The substrate further includes at least o... | 08/05/2003 |
| 6555451 | Method for making shallow diffusion junctions in semiconductors using elemental doping A method is provided for making ultra-shallow diffused junctions using an elemental dopant. A semiconductor wafer is cleaned for providing a clean reaction surface. The cleaned wafer in loaded onto a stage located in a doping system. A quantity of element... | 04/29/2003 |
| 6503841 | Oxide etch The invention includes a method of etching silicon dioxide, comprising doping a layer of silicon dioxide to form a layer of doped silicon dioxide and etching the doped silicon dioxide layer with phosphoric acid.... | 01/07/2003 |
| 6498079 | Method for selective source diffusion Deep profile and highly doped impurity regions can be formed by diffusing from a solid source or doped silicon glass and using a patterned nitride layer. An oxide etch stop and polysilicon sacrificial layer are left in place in the patterned regions and t... | 12/24/2002 |
| 6486064 | Shallow junction formation A method of forming junctions in a semiconductor substrate, where a gate dielectric layer is grown on the semiconductor substrate, a gate electrode layer is deposited on the gate dielectric layer, and a sacrificial layer is formed on the gate electrode la... | 11/26/2002 |
| 6444550 | Laser tailoring retrograde channel profile in surfaces A semiconductor device having a retrograde channel profile is achieved by forming a retrograde impurity region in the surface portion of a semiconductor substrate, and subsequently forming a semiconductor layer on the retrograde impurity region at a prede... | 09/03/2002 |
| 6432783 | Method for doping a semiconductor device through a mask The manufacturing method produces a semiconductor in which current is not generated during the off state by reducing the electric field at the corner of an active region. The method includes patterning a gate material layer on a predetermined portion on t... | 08/13/2002 |
| 6313398 | Ga-doped multi-crytsalline silicon, Ga-doped multi-crystalline silicon wafer and method for producing the same There are disclosed multi-crystalline silicon which is added with Ga (gallium) as a dopant and a method for producing Ga-doped multi-crystalline silicon, which comprises adding Ga to silicon melt in a crucible, which is melted by heating, and cooling the ... | 11/06/2001 |
| 6180561 | Complexing agent for thermal color proofing A magenta dye-donor element for thermal dye transfer comprising a support having thereon a dye layer comprising a mixture of magenta dyes and a yellow dye dispersed in a polymeric binder, at least one of the magenta dyes having the formula: ##STR1## ... | 01/30/2001 |
| 6001770 | Slipping layer for dye-donor element used in thermal dye transfer A dye-donor element for thermal dye transfer comprising a support having on one side thereof a dye layer and on the other side a slipping layer comprising a binder containing polyalkylsilsesquioxane particles wherein less than about 8% of the particles ha... | 12/14/1999 |
| 5985728 | Silicon on insulator process with recovery of a device layer from an etch stop layer A silicon on insulator (SOI) process is disclosed which includes the steps of forming an etch stop layer in a starting wafer, forming an insulating layer on the etch stop layer, bonding this wafer to a handle wafer, thinning the start wafer down to the et... | 11/16/1999 |
| 5972743 | Precursor compositions for ion implantation of antimony and ion implantation process utilizing same A method for n-doping a material layer with antimony, comprising ion implanting antimony from an antimony precursor composition including a compound of the formula SbXn ((CH2)y SiR3)n-3, wherein: n is... | 10/26/1999 |
| 5895259 | Polysilicon diffusion doping method employing a deposited doped oxide layer with a highly uniform thickness A polysilicon diffusion doping method which employs a deposited dopant-rich oxide layer with a highly uniform distribution of dopant atoms and thickness. Polysilicon layers 1,500 angstroms thick have been doped, achieving average resistance values of 60 o... | 04/20/1999 |
| 5739059 | Method of forming a semiconductor device having high and low resistance polysilicon The present invention is a method of manufacturing a high/low resistance on a mix-mode product. The method includes forming a polysilicon layer over a wafer. A blanket ion implantation is performed to implant ions into the entire polysilicon layer. The po... | 04/14/1998 |
| 5650038 | Method for dry etching A method and apparatus for dry etching changes at least one of the effective pumping speed of a vacuum chamber and the gas flow rate to alter the processing of an etching pattern side wall of a sample between first and second conditions. The first and sec... | 07/22/1997 |
| 5565377 | Process for forming retrograde profiles in silicon A process for forming retrograde and oscillatory profiles in crystalline and polycrystalline silicon. The process consisting of introducing an n- or p-type dopant into the silicon, or using prior doped silicon, then exposing the silicon to multiple pulses... | 10/15/1996 |
| 5514620 | Method of producing PN junction device A PN junction device is formed by removing an inert film from a surface of an N type semiconductor layer to expose an active face, then applying a source gas containing an P type impurity component to the active face to form an impurity adsorption film, a... | 05/07/1996 |
| 5298435 | Application of electronic properties of germanium to inhibit n-type or p-type diffusion in silicon A method of inhibiting dopant diffusion in silicon using germanium is provided. Germanium is distributed in substitutional sites in a silicon lattice to form two regions of germanium interposed between a region where dopant is to be introduced and a regio... | 03/29/1994 |
| 5236856 | Method for minimizing diffusion of conductivity enhancing impurities from one region of polysilicon layer to another region and a semiconductor device produced according to the method A polysilicon layer is provided with a p-type impurity, and masked with an oxide mask to define a p-type region of the polysilicon layer. A second impurity is then provided into first unmasked regions of the polysilicon layer. A second oxide mask is depos... | 08/17/1993 |
| 5189297 | Planar double-layer heterojunction HgCdTe photodiodes and methods for fabricating same A double layer heterojunction array 10 of IR photodiodes has formed within an upper planar surface region of a collector layer 16 a plurality of isolation junctions 20 which are disposed between individual photodiodes. The isolation junctions are formed b... | 02/23/1993 |
| 5177025 | Method of fabricating an ultra-thin active region for high speed semiconductor devices A method of fabricating a semiconductor device to retard diffusion of a dopant from a center active region into adjacent regions. The center active region is epitaxially formed by selectively increasing and decreasing an introduction of diffusion-suppress... | 01/05/1993 |
| 4900257 | Method of making a polycide gate using a titanium nitride capping layer A semiconductor device has a multilayer comprising a refractory metal silicide and a metal nitride on a silicon layer. The metal nitride prevents the silicon layer from being oxidized so that a good ohmic contact is obtained. A method of manufacturing the... | 02/13/1990 |