Class 438/910 - CONTROLLING CHARGING STATE AT SEMICONDUCTOR-INSULATOR INTERFACE

Subclass of Class 438 - Semiconductor device manufacturing: process
Definition: Art collection involving adjusting the charge state where
No. of patents: 132
Last issue date: 01/30/2007

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Number	Title	Issue Date
7169671	Method of recording information in nonvolatile semiconductor memory A nonvolatile semiconductor memory includes a transistor, one or two resistance-change portions, and one or two charge accumulation portions. The transistor has a control electrode, first main electrode region, and second main electrode region. Each resistance-chang...	01/30/2007
7148109	Method for manufacturing flash memory device The present invention discloses a method for manufacturing a flash memory device which can minimize a hole current by impurity diffusion of floating gates, obtain a sufficient capacitance for a cell operation by increasing a breakdown voltage, and improve retention ...	12/12/2006
7067434	Hydrogen free integration of high-k gate dielectrics The present invention pertains to forming a transistor in the absence of hydrogen, or in the presence of a significantly reduced amount of hydrogen. In this manner, a high-k material can be utilized to form a gate dielectric layer in the transistor and facilitate de...	06/27/2006
7005362	Method of fabricating a thin film transistor A method of fabricating a TFT includes a step of forming an impurity region for a source and a drain by simultaneously implanting and activating impurity ions. More particularly, the present invention includes the steps of forming a gate insulating layer and a gate ...	02/28/2006
6943116	Method for fabricating a p-channel field-effect transistor on a semiconductor substrate A p-channel field-effect transistor is formed on a semiconductor substrate. The transistor has an n-doped gate electrode, a buried channel, a p-doped source and a p-doped drain. The transistor is fabricated by a procedure in which, after an implantation for defining...	09/13/2005
6927137	Forming a retrograde well in a transistor to enhance performance of the transistor A method of forming a retrograde well in a transistor is provided. A transistor structure having a substrate, a gate, and a gate oxide layer between the substrate and the gate is formed. The substrate includes a channel region located generally below the gate. A fir...	08/09/2005
6917077	Protection diode for improved ruggedness of a radio frequency power transistor and self-defining method to manufacture such protection diode A semiconductor arrangement including: a substrate having a substrate layer (13) with an upper and lower surface, the substrate layer (13) being of a first conductivity type; a first buried layer (...	07/12/2005
6893936	Method of Forming strained SI/SIGE on insulator with silicon germanium buffer A method is disclosed for forming a semiconductor wafer having a strained Si or SiGe layer on an insulator layer. The method produces a structure having a SiGe buffer layer between the insulator layer and the strained Si or SiGe layer, but eliminates the need for Si...	05/17/2005
6818570	Method of forming silicon-containing insulation film having low dielectric constant and high mechanical strength A silicon-containing insulation film having high mechanical strength is formed on a semiconductor substrate by (a) introducing a reaction gas comprising (i) a source gas comprising a silicon-containing hydrocarbon compound containing cross-linkable groups, (ii) a cr...	11/16/2004
6784114	Monatomic layer passivation of semiconductor surfaces The present invention relates generally to a method of improving the performance of solid state devices, and specifically provides methods for passivating a semiconductor surfaces with a monolayer of passivating material. ...	08/31/2004
6770517	Semiconductor device and method for fabricating the same In a silicon layer formed on an insulator layer, a lattice defect region is formed to be adjacent to a channel region and source/drain regions, and the lower part of the channel region functions as a high-concentration channel region. The holes of hole-electron pair...	08/03/2004
6709906	Method for producing semiconductor device In producing a semiconductor device such as a thin film transistor (TFT), a silicon semiconductor film is formed on a substrate having an insulating surface, such as a glass substrate, and then a silicon nitride film is formed on the silicon semiconductor film. Afte...	03/23/2004
6686230	Semiconducting devices and method of making thereof A process for providing a semiconducting device including the steps of depositing a semiconducting layer onto a substrate by means of heating a gas to a predetermined dissociation temperature so that the gas dissociates into fractions, whereby those fract...	02/03/2004
6635589	Methods of heat treatment and heat treatment apparatus for silicon oxide films Silicon oxide films which are good as gate insulation films are formed by subjecting a silicon oxide film which has been formed on an active layer comprising a silicon film by means of a PVD method or CVD method to a heat treatment at 300-700° C. in a di...	10/21/2003
6603181	MOS device having a passivated semiconductor-dielectric interface A MOS structure processed to have a semiconductor-dielectric interface that is passivated to reduce the interface state density. An example is a MOSFET having a gate dielectric on which an electrode is present that is substantially impervious to molecular...	08/05/2003
6444533	Semiconductor devices and methods for same Described are preferred processes for conditioning semiconductor devices with deuterium to improve operating characteristics and decrease depassivation which occurs during the course of device operation. Also described are semiconductor devices which can ...	09/03/2002
6364731	Circuit device manufacturing equipment An electronic device manufacturing equipment such as for manufacturing liquid crystal display devices containing semiconductor integrated circuits. The equipment includes a protective resistive layer such as with a thickness d (μm) and a surface resistan...	04/02/2002
6337514	Semiconductor integrated circuit device effectively decreased in surface state regardless of non-permeable layer for chemical species against surface state and process for fabricating thereof A cell plate electrode is shared between storage capacitors of memory cells incorporated in a semiconductor dynamic random access memory device of the type having the storage capacitors over bit lines, and slits are formed in the cell plate electrode in s...	01/08/2002
6294404	Semiconductor integrated circuit having function of reducing a power consumption and semiconductor integrated circuit system comprising this semiconductor integrated circuit A semiconductor integrated circuit according to the present invention comprises a synchronous SRAM, a signal generation circuit generating a chip selection signal, a clock signal etc. supplied to the synchronous SRAM, a voltage set circuit setting the vol...	09/25/2001
6281550	Transistor and logic circuit of thin silicon-on-insulator wafers based on gate induced drain leakage currents A transistor structure fabricated on thin SOI is disclosed. The transistor on thin SOI has gated n+ and p+ junctions, which serve as switches turning on and off GIDL current on the surface of the junction. GIDL current will flow into the floating body and...	08/28/2001
6277718	Semiconductor device and method for fabricating the same The method for fabricating a semiconductor device comprises an insulation film forming step of forming an insulation film 12 on a semiconductor substrate 10, a semiconductor layer forming step of forming a semiconductor layer 14 on the insulation film 12,...	08/21/2001
6255221	Methods for running a high density plasma etcher to achieve reduced transistor device damage Disclosed are methods and systems for etching dielectric layers in a high density plasma etcher. A method includes providing a wafer having a photoresist mask over a dielectric layer in order to define at least one contact via hole or open area that is el...	07/03/2001
6218245	Method for fabricating a high-density and high-reliability EEPROM device A method for fabricating a high-density and high-reliability EEPROM device includes providing a semiconductor substrate having both an EEPROM cell region, and a peripheral MOS transistor region. A gate oxide layer is formed to overlie the peripheral MOS t...	04/17/2001
6218218	Method for reducing gate oxide damage caused by charging A method of processing wafers containing a gate oxide assembly (10) is disclosed that reduces gate oxide damage during wafer production due to damage caused by charging. The method comprises creating an oxide gate assembly (10) on a silicon layer (11) in ...	04/17/2001
6159778	Methods of forming semiconductor-on-insulator field effect transistors with reduced floating body parasitics SOI FETs include an electrically insulating substrate, a semiconductor region on the electrically insulating substrate, a field effect transistor having source, drain and channel regions in the semiconductor region and a metal silicide region between the ...	12/12/2000
6130460	Interconnect track connecting, on several metallization levels, an insulated gate of a transistor to a discharge diode within an integrated circuit, and process for producing such a track An interconnect track connects, on several metallization levels, an insulated gate of a transistor to a discharge diode within an integrated circuit. The interconnect track comprises a first track element extending under the highest metallization level, h...	10/10/2000
6121099	Selective spacer formation for optimized silicon area reduction A semiconductor manufacturing process comprising providing a semiconductor substrate, forming a gate dielectric on an upper surface of the semiconductor substrate, forming a conductive gate on an upper surface of the gate dielectric, forming a first pair ...	09/19/2000
6090671	Reduction of gate-induced drain leakage in semiconductor devices Reduction of gate-induced-drain-leakage in metal oxide semiconductor (MOS) devices is achieved by performing an anneal in a non-oxidizing ambient. In one embodiment, the anneal is performed in a argon and/or ammonia ambients after gate sidewall oxidation ...	07/18/2000
6069041	Process for manufacturing non-volatile semiconductor memory device by introducing nitrogen atoms A process for manufacturing a non-volatile semiconductor memory device by forming a tunnel dielectric film, a floating gate electrode, an interlayer capacitive film and a control gate electrode successively on a semiconductor substrate includes introducin...	05/30/2000
6063698	Method for manufacturing a high dielectric constant gate oxide for use in semiconductor integrated circuits A method for forming a gate dielectric (14b) begins by providing a substrate (12). A high K dielectric layer (14a) is deposited overlying the substrate (12). The dielectric layer (14a) contains bulk traps (16) and interface traps (18). A polysilicon gate ...	05/16/2000
5970384	Methods of heat treating silicon oxide films by irradiating ultra-violet light Silicon oxide films which are good as gate insulation films are formed by subjecting a silicon oxide film which has been formed on an active layer comprising a silicon film by means of a PVD method or CVD method to a heat treatment at 300-700° C. in a di...	10/19/1999
5937303	High dielectric constant gate dielectric integrated with nitrogenated gate electrode A semiconductor process for forming a gate electrode of an MOS transistor. A gate dielectric is deposited on an upper surface of a semiconductor substrate. A dielectric constant of the gate dielectric layer is in the range of approximately 25 to 300. A th...	08/10/1999
5897346	Method for producing a thin film transistor In producing a semiconductor device such as a thin film transistor (TFT), a silicon semiconductor film is formed on a substrate having an insulating surface, such as a glass substrate, and then a silicon nitride film is formed on the silicon semiconductor...	04/27/1999
5851893	Method of making transistor having a gate dielectric which is substantially resistant to drain-side hot carrier injection A transistor fabrication process is provided which derives a benefit from having barrier atoms incorporated in a lateral area under a gate oxide of the transistor in close proximity to the drain. To form the transistor, a gate oxide layer is first grown a...	12/22/1998
5843835	Damage free gate dielectric process during gate electrode plasma etching In a CMOS device uses a thin oxide film as a gate dielectric film, gate electrode plasma etching frequently induces gate dielectric damage. This invention discloses a process which can form a damage free gate dielectric even though there is plasma nonunif...	12/01/1998
5837585	Method of fabricating flash memory cell The present invention discloses a method of fabricating flash memory cell for use in semiconductor memories. A nitrogen implantation step is added in the process to increase the performance of the device. The nitrogen implanted tunnel oxide exhibits a muc...	11/17/1998
5801076	Method of making non-volatile memory device having a floating gate with enhanced charge retention A non-volatile memory device is fabricated having enhanced charge retention capability. Enhanced charge retention is achieved upon the floating gate of the non-volatile memory device. The floating gate maybe can configured as a stacked or non-stacked pair...	09/01/1998
5753543	Method of forming a thin film transistor A method of forming a bottom gated TFT includes, a) providing a transistor gate relative to a substrate which projects outward thereof; b) providing a dielectric layer over the gate; c) providing a TFT layer of semiconductive material over the dielectric ...	05/19/1998
5707895	Thin film transistor performance enhancement by water plasma treatment A process is provided in which silicon thin film transistors fabricated with polycrystalline silicon, silicon oxide, and silicon conductive layers are exposed to microwave plasmas containing water vapor and to subsequent annealing steps to bring about an ...	01/13/1998
5683946	Method for manufacturing fluorinated gate oxide layer A method for manufacturing a gate oxide layer containing fluorine is disclosed. The method includes steps of providing a substrate; depositing a fluorinated oxide layer over said substrate; and oxidizing said fluorinated oxide layer at a high temperature....	11/04/1997

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Class 438/910 - CONTROLLING CHARGING STATE AT SEMICONDUCTOR-INSULATOR INTERFACE