Bizarre Patents
Decorative Jeweled Wheel Cover
An improved wheel is provided wherein decorative items such as gem stones are embedded in either the wheel surface, a special mounting section attached to the wheel surface, or to a spoke strap that wraps around each spoke and positions embedded gem stones on the outside surface of the spoke.
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| Number | Title | Issue Date |
| 8440575 | Method of fabricating semiconductor device A method includes: forming an device isolation region in a substrate to divide the device isolation region into first and second diffusion regions; forming a target film on the substrate; forming a hard mask layer and a first resist layer on the film; forming a firs... | 05/14/2013 |
| 8329594 | Method for fabricating a semiconductor structure A method for fabricating a semiconductor structure is disclosed. The method includes the steps of: providing a substrate; depositing a material layer on the substrate; forming at least one dielectric layer on the material layer; forming a patterned resist on the die... | 12/11/2012 |
| 8314036 | Methods of forming fine patterns of semiconductor device A method of forming fine patterns of a semiconductor device is provided. The method includes forming plural preliminary first mask patterns, which are spaced apart from each other by a first distance in a direction parallel to a surface of a substrate, on the substr... | 11/20/2012 |
| 8298960 | Plasma etching method, control program and computer storage medium A plasma etching method, for plasma-etching a target substrate including at least a film to be etched, an organic film to become a mask of the to-be-etched film, and a Si-containing film which are stacked in order from bottom, includes the first organic film etching... | 10/30/2012 |
| 8298961 | Patterns of semiconductor device and method of forming the same A method of forming patterns of a semiconductor device comprises providing a semiconductor substrate comprising a first region wherein first patterns are to be formed and a second region wherein second patterns are to be formed, each of the second patterns having a ... | 10/30/2012 |
| 8293656 | Selective self-aligned double patterning of regions in an integrated circuit device A selective self-aligned dual patterning method. The method includes performing a single lithography operation to form a patterned mask having a narrow feature in a region of a substrate that is to a have pitch-reduced feature and a wide feature in a region of the s... | 10/23/2012 |
| 8278223 | Method for forming hole pattern A method for forming a hole pattern includes forming a hard mask layer for a hole pattern over an etch target layer, forming pillar patterns having a gap therebetween over the hard mask layer for a hole pattern, forming spacer patterns on sidewalls of the pillar pat... | 10/02/2012 |
| 8222159 | Manufacturing method of semiconductor device A manufacturing method of semiconductor device comprises: sequentially laminating a third mask layer, a second mask layer, and a first mask layer on a processed layer; forming a fourth mask layer on the first mask layer; processing the first mask layer so as to have... | 07/17/2012 |
| 8216949 | Method for integrated circuit fabrication using pitch multiplication A method lor integrated circuit fabrication is disclosed. A spacer pattern is provided including a plurality ot spacers in an array region of a partially-fabricated integrated circuit. Each spacer is at least partly defined by opposing open volumes extending along l... | 07/10/2012 |
| 8193100 | Exposure mask manufacturing method, drawing apparatus, semiconductor device manufacturing method, and mask blanks product A method of manufacturing an exposure mask includes generating or preparing flatness variation data relating to a mask blanks substrate to be processed into an exposure mask, the flatness variation data being data relating to change of flatness of the mask blank sub... | 06/05/2012 |
| 8153530 | Method of manufacturing a semiconductor device In this method of manufacturing a semiconductor device, the remaining layer of an etching mask layer remains in a predetermined thickness when the stamping face of a nano-stamper is pressed on the surface of the etching mask layer. Therefore, the remaining layer of ... | 04/10/2012 |
| 8143171 | Method for manufacturing semiconductor device and computer readable medium for storing pattern size setting program A method of manufacturing a semiconductor device, which forms a pattern by performing pattern transformation steps multiple times, comprises setting finished pattern sizes for patterns to be formed in each consecutive two pattern transformation steps among the plura... | 03/27/2012 |
| 8138097 | Method for processing semiconductor structure and device based on the same Methods for fabricating a device and related device structures are provided herein. According to one embodiment, a method for fabricating a device includes the acts of producing a substrate; forming a structure on the substrate having a lower dielectric layer, a met... | 03/20/2012 |
| 8124542 | Method of fabricating semiconductor device The present invention includes the steps of: forming an device isolation region in a substrate to divide the device isolation region into a first and a second diffusion regions; forming a target film to be processed on the substrate; forming a hard mask layer and a ... | 02/28/2012 |
| 8119535 | Pitch reduced patterns relative to photolithography features Differently-sized features of an integrated circuit are formed by etching a substrate using a mask which is formed by combining two separately formed patterns. Pitch multiplication is used to form the relatively small features of the first pattern and conventional p... | 02/21/2012 |
| 8110506 | Methods of forming fine patterns in semiconductor devices Methods of forming a semiconductor device can be provided by simultaneously forming a plurality of mask patterns using self-aligned reverse patterning, including respective mask pattern elements having different widths. ... | 02/07/2012 |
| 8084366 | Modified DARC stack for resist patterning A method of making a device includes forming a device layer, forming an organic hard mask layer over the device layer, forming a first oxide hard mask layer over the organic hard mask layer, forming a DARC layer over the first oxide hard mask layer, forming a photor... | 12/27/2011 |
| 8071487 | Patterning method using stacked structure A stacked structure for patterning a material layer to form an opening pattern with a predetermined opening width in the layer is provided. The stacked structure includes an underlayer, a silicon rich organic layer, and a photoresist layer. The underlayer is on the ... | 12/06/2011 |
| 8053370 | Semiconductor device and fabrications thereof A method for forming a semiconductor device is disclosed. A substrate comprising a structural layer thereon is provided. A hard mask layer is formed on the structural layer. A photoresist layer is formed on the hard mask layer. The photoresist layer is patterned to ... | 11/08/2011 |
| 8048813 | Method of reducing delamination in the fabrication of small-pitch devices A method of forming an integrated circuit structure includes providing a substrate; forming a first hard mask layer over the substrate; forming a second hard mask layer over the first hard mask layer; patterning the second hard mask layer to form a hard mask; and, a... | 11/01/2011 |
| 8034722 | Method of forming dual damascene semiconductor device A method of forming a dual damascene includes forming first, second and third material layers sequentially over a substrate. The first, second and third material layers have first, second and third thicknesses, respectively. An opening is etched within the first mat... | 10/11/2011 |
| 8030218 | Method for selectively modifying spacing between pitch multiplied structures Methods for circuit material processing are provided. In at least one such method, a substrate is provided with a plurality of overlying spacers. The spacers have substantially straight inner sidewalls and curved outer sidewalls. An augmentation material is formed o... | 10/04/2011 |
| 8012881 | Method for forming contact holes in semiconductor device A method for forming contact holes in a semiconductor device includes forming a hard mask layer over an etch target layer, forming a first line pattern in the hard mask layer by etching a portion of the hard mask layer through a primary etch process, forming a secon... | 09/06/2011 |
| 7989355 | Method of pitch halving The present disclosure provides a method of fabricating a semiconductor device that includes forming a mask layer over a substrate, forming a dummy layer having a first dummy feature and a second dummy feature over the mask layer, forming first and second spacer roo... | 08/02/2011 |
| 7935639 | Process for increasing feature density during the manufacture of a semiconductor device Methods used during the manufacture of a semiconductor device, such as one that includes forming a plurality of vertically oriented first support features. Each feature comprises first and second sidewalls and the first support features are formed to have a first pi... | 05/03/2011 |
| 7906436 | Method of manufacturing semiconductor device, and semiconductor device A method of manufacturing a semiconductor device which includes step of forming a lower resist film over an insulating interlayer; forming a first opening having a circular geometry in a plan view, and second to fifth openings arranged respectively on four sides of ... | 03/15/2011 |
| 7851371 | Method for manufacturing semiconductor device A method for manufacturing a semiconductor device of the present invention includes: forming a first film, a second film and a third film in sequence on a silicon substrate; patterning a resist film formed on the third film by conducting an exposure and developing p... | 12/14/2010 |
| 7846849 | Frequency tripling using spacer mask having interposed regions A method for fabricating a semiconductor mask is described. A semiconductor stack having a sacrificial mask comprised of a series of lines is first provided. A spacer mask having spacer lines adjacent to the sidewalls of the series of lines of the sacrificial mask i... | 12/07/2010 |
| 7772126 | Hard mask arrangement, contact arrangement and methods of patterning a substrate and manufacturing a contact arrangement An interlayer is disposed on a pattern surface of a substrate. A buried hard mask may be provided on the interlayer. The buried hard mask includes a template opening having a template length along a line axis and a template width perpendicular thereto. The buried ha... | 08/10/2010 |
| 7741228 | Method for fabricating semiconductor device After a first insulating film is formed on a substrate, a wiring groove is formed in the first insulating film, and then a wire is formed inside the wiring groove. Subsequently, a protection film is formed on the first insulating film and on the wire, and then a har... | 06/22/2010 |
| 7741227 | Process for structuring at least one year as well as electrical component with structures from the layer A process for structuring at least one layer as well as an electrical component with structures from the layer are described. The invention states a process to generate at least one structured layer (10A), wherein a mask structure (20) with a fi... | 06/22/2010 |
| 7727899 | Manufacturing method of semiconductor device and semiconductor storage device including fine contact holes A manufacturing method of a semiconductor device is carried out as follows. A first mask layer having a first linear opening pattern is formed above the first interlayer insulating layer. A second mask layer having a plurality of second linear opening patterns and f... | 06/01/2010 |
| 7709396 | Integral patterning of large features along with array using spacer mask patterning process flow Embodiments of the present invention pertain to methods of forming patterned features on a substrate having an increased density (i.e. reduced pitch) as compared to what is possible using standard photolithography processing techniques using a single high-resolution... | 05/04/2010 |
| 7696101 | Process for increasing feature density during the manufacture of a semiconductor device A method used during the manufacture of a semiconductor device comprises the formation of a first patterned layer having individual features of a first density. Through the formation and etching of various layers, for example conformal layers and a spun-on layer, a ... | 04/13/2010 |
| 7638436 | Semiconductor processing methods of transferring patterns from patterned photoresists to materials The invention includes a semiconductor processing method. A first material comprising silicon and nitrogen is formed. A second material is formed over the first material, and the second material comprises silicon and less nitrogen, by atom percent, than the first ma... | 12/29/2009 |
| 7629263 | Semiconductor sensor production method and semiconductor sensor A semiconductor sensor production method includes the steps of (A) forming a first etching mask layer on a support part segment of a backside semiconductor layer, except on a portion of the support part segment which portion is along edges of the support part segmen... | 12/08/2009 |
| 7615496 | Method of forming pad patterns using self-align double patterning method, pad pattern layout formed using the same, and method of forming contact holes using self-align double patterning method A self-align patterning method for forming patterns includes forming a first layer on a substrate, forming a plurality of first hard mask patterns on the first layer, forming a sacrificial layer on top surfaces and sidewalls of the first hard mask patterns, thereby ... | 11/10/2009 |
| 7615497 | Forming fine pattern of semiconductor device using three mask layers and CMP of spin-on carbon layer A method for forming a fine pattern of a semiconductor device includes forming a deposition film over a substrate having an underlying layer. The deposition film includes first, second, and third mask films. The method also includes forming a photoresist pattern ove... | 11/10/2009 |
| 7592265 | Method of trimming a hard mask layer, method for fabricating a gate in a MOS transistor, and a stack for fabricating a gate in a MOS transistor A method of trimming hard mask is provided. The method includes providing a substrate, a hard mask layer, and a tri-layer stack on the substrate. The tri-layer stack includes a top photo resist layer, a silicon photo resist layer, and a bottom photo resist layer. Th... | 09/22/2009 |
| RE40748 | Process for producing semiconductor device A process for producing a semiconductor device for forming a highly reliable wiring structure is provided that solves the problem occurring on using a xerogel or a fluorine resin in an inter level dielectric between the wirings to decrease a wiring capacitance, and ... | 06/16/2009 |
