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| Number | Title | Issue Date |
| 8158529 | Method for forming active pillar of vertical channel transistor A method for forming an active pillar of a vertical channel transistor includes forming a hard mask pattern on a substrate, etching vertically the substrate using the hard mask pattern as an etch barrier to form an active pillar, and etching horizontally to remove b... | 04/17/2012 |
| 8129286 | Reducing effective dielectric constant in semiconductor devices Method of manufacturing a semiconductor device structure, including the steps of providing a structure having an insulator layer with at least one interconnect, forming a sub lithographic template mask over the insulator layer, and selectively etching the insulator ... | 03/06/2012 |
| 7700495 | Thin film transistor device and method of manufacturing the same, and liquid crystal display device The present invention relates to a thin film transistor device formed on an insulating substrate of a liquid crystal display device and others, a method of manufacturing the same, and a liquid crystal display device. In structure, there are provided the steps of for... | 04/20/2010 |
| 7550393 | Solid-state imaging device with reduced smear A solid-state imaging device includes a light sensor formed in a semiconductor substrate. In addition, the solid-state imaging device includes a light block layer with an opening formed through the light block layer over at least a portion of the light sensor. Furth... | 06/23/2009 |
| 7521371 | Methods of forming semiconductor constructions having lines In some embodiments, an opening is formed through a first material, and sidewall topography of the opening is utilized to form a pair of separate anistropically etched spacers. The spacers are utilized to pattern lines in material underlying the spacers. Some embodi... | 04/21/2009 |
| 7473649 | Methods for controlling feature dimensions in crystalline substrates A method of forming a slot in a substrate comprises growing an oxide layer on a first side of a substrate, patterning and etching the oxide layer to form an opening, forming a material overlying the opening and the oxide layer, removing substrate material through a ... | 01/06/2009 |
| 7470630 | Approach to reduce parasitic capacitance from dummy fill An integrated circuit includes a semiconductor substrate and multiple dielectric layers stacked on the substrate. Multiple interconnect metal lines and dummy metals are embedded in the dielectric layers. At least one of the dummy metals is substantially thinner than... | 12/30/2008 |
| 7439185 | Method for fabricating semiconductor device and semiconductor device A method of fabricating a semiconductor device having an air-gapped multilayer interconnect wiring structure is disclosed. After having formed a first thin film on or above a substrate, define a first opening in the first thin film. Then, deposit a conductive materi... | 10/21/2008 |
| 7432195 | Method for integrating a conformal ruthenium layer into copper metallization of high aspect ratio features A method of integrated processing of a patterned substrate for copper metallization. The method includes providing the patterned substrate containing a via and a trench in a vacuum processing tool, and performing an integrated process on the patterned substrate in t... | 10/07/2008 |
| 7416973 | Method of increasing the etch selectivity in a contact structure of semiconductor devices By providing an additional silicon dioxide based etch stop layer, a corresponding etch process for forming contact openings for directly connecting polysilicon lines and active areas may be controlled in a highly reliable manner. In another aspect, the etch selectiv... | 08/26/2008 |
| 7396765 | Method of fabricating a liquid crystal display device A method of fabricating a liquid crystal display device according to an embodiment of the present invention includes forming first and second conductive layers on a substrate, wherein the first layer is transparent; patterning the second conductive layer and the fir... | 07/08/2008 |
| 7396737 | Method of forming shallow trench isolation A method of manufacturing a semiconductor device including forming a pad oxide layer on a semiconductor substrate, forming a spacer oxide layer pattern on sidewalls of the pad oxide layer, and forming a nitride layer on the pad oxide layer. The method further includ... | 07/08/2008 |
| 7365009 | Structure of metal interconnect and fabrication method thereof A process and structure for a metal interconnect includes providing a substrate with a first electric conductor, forming a first dielectric layer and a first patterned hard mask, using the first patterned hard mask to form a first opening and a second electric condu... | 04/29/2008 |
| 7354522 | Substrate etching method for forming connected features A method of etching a substrate and an article(s) formed using the method are provided. The method includes providing a substrate; coating a region of the substrate with a temporary material having properties that enable the temporary material to remain substantiall... | 04/08/2008 |
| 7337420 | Methodology for layout-based modulation and optimization of nitride liner stress effect in compact models System and method for compact model algorithms to accurately account for effects of layout-induced changes in nitride liner stress in semiconductor devices. The layout-sensitive compact model algorithms account for the impact of large layout variation on circuits by... | 02/26/2008 |
| 7329365 | Etchant composition for indium oxide layer and etching method using the same An etchant for removing an indium oxide layer includes sulfuric acid as a main oxidizer, an auxiliary oxidizer such as H3PO4, HNO3, CH3COOH, HClO4, H2O2, and a Compound A that is obtained b... | 02/12/2008 |
| 7320942 | Method for removal of metallic residue after plasma etching of a metal layer A method for removal of metallic residue from a substrate after a plasma etch process in a semiconductor substrate processing system by cleaning the substrate in a hydrogen fluoride solution. ... | 01/22/2008 |
| 7307025 | Lag control A method for etching features in a silicon oxide based dielectric layer over a substrate, comprising performing an etch cycle. A lag etch partially etching features in the silicon oxide based dielectric layer is performed, comprising providing a lag etchant gas, for... | 12/11/2007 |
| 7300827 | Method of manufacturing a thin film transistor substrate and stripping composition A method of manufacturing a thin film transistor substrate includes forming a transistor thin layer pattern, forming a protecting layer, forming a photoresist film, forming a pixel electrode and a conductive layer that are separated from each other, stripping a phot... | 11/27/2007 |
| RE39913 | Method to control gate CD The invention is a process for reducing variations in CD from wafer to wafer. It begins by increasing all line widths in the original pattern data file by a fixed amount that is sufficient to ensure that all lines will be wider than the lowest acceptable CD value. U... | 11/06/2007 |
| 7291560 | Method of production pitch fractionizations in semiconductor technology Spacers are formed on sidewalls of striplike parts of a pattern layer of periodic structure. The pattern layer is removed, and the spacers are covered with a further spacer layer, which is then structured to second sidewall spacers. Gaps between the spacers are fill... | 11/06/2007 |
| 7288848 | Overlay mark for measuring and correcting alignment errors An overlay mark includes at least one hole array formed on a semiconductor substrate and at least one linear trench adjacent to the hole array. The hole array may be formed adjacent to the linear trench along a predetermined direction. When alignment errors among pa... | 10/30/2007 |
| 7288478 | Method for performing chemical shrink process over BARC (bottom anti-reflective coating) A structure and a method for forming the same. The method comprises providing a structure including (a) a hole layer, (b) a BARC (bottom antireflective coating) layer on the top of the hole layer, and (c) a patterned photoresist layer on top of the BARC layer and ha... | 10/30/2007 |
| 7279112 | Method of manufacture of smart microfluidic medical device with universal coating A method of applying a universal coating for a medical device comprising a medical device component, the medical device component having an outer surface and an inner surface, the universal coating applied to at least the outer surface or the inner surface of the me... | 10/09/2007 |
| 7279429 | Method to improve ignition in plasma etching or plasma deposition steps In one embodiment, the present invention relates to a method for increasing the ignition reliability of a plasma in a plasma reactor, the method comprising: supplying a source gas to the plasma reactor, the source gas comprising: (a) at least one reactive compound; ... | 10/09/2007 |
| 7271106 | Critical dimension control for integrated circuits Methods of etching substrates with small critical dimensions and altering the critical dimensions are disclosed. In one embodiment, a sulfur oxide based plasma is used to etch an amorphous carbon hard mask layer. The features of a pattern can be shrunk using a plasm... | 09/18/2007 |
| 7261825 | Method for the production of a micromechanical device, particularly a micromechanical oscillating mirror device A method for producing a micromechanical device, e.g., a micromechanical oscillating mirror device, is provided. It is provided, starting from the front side of an SOI/EOI(epipoly on insulator) substrate, to penetrate to the desired depth of the silicon substrate la... | 08/28/2007 |
| 7262136 | Modified facet etch to prevent blown gate oxide and increase etch chamber life A modified facet etch is disclosed to prevent blown gate oxide and increase etch chamber life. The modified facet etch is a two-stage process. The first stage is a plasma sputter etch to form a facet profile. The first stage etch is terminated prior to reaching the ... | 08/28/2007 |
| 7259051 | Method of forming SI tip by single etching process and its application for forming floating gate The invention provides a method of forming a silicon tip by a single etching process, as well as a method of forming a tip floating gate to increase erase speed. Etching gases comprising (1) chlorine and/or (2) oxygen/helium are performed to form a silicon tip witho... | 08/21/2007 |
| 7244369 | Method for producing active or passive components on a polymer basis for integrated optical devices “A process for fabricating active and passive, polymer-based components for use in integrated optics. As a result of this process, active and passive optoelectronic components of a high quality having a high level of integration and high packing density are fabric... | 07/17/2007 |
| 7226872 | Lightly doped drain MOS transistor A method of forming a MOS transistor in an upper surface of a semiconductor substrate. A gate oxide layer covers the upper surface of the substrate. A gate stack including one or more thin film layers covers the gate oxide layer. A gate electrode pattern is partiall... | 06/05/2007 |
| 7214324 | Technique for manufacturing micro-electro mechanical structures A technique for manufacturing a micro-electro mechanical structure includes a number of steps. Initially, a cavity is formed into a first side of a handling wafer, with a sidewall of the cavity forming a first angle greater than about 54.7 degrees with respect to a ... | 05/08/2007 |
| 7186604 | Semiconductor integrated circuit device and method for fabricating the same After forming a silicon oxide film 9 on the surface of a region A of a semiconductor substrate 1, a high dielectric constant insulating film 10, a silicon film, a silicon oxide film 14 are successively deposited over the semiconductor sub... | 03/06/2007 |
| 7179752 | Dry etching method A dry etching method involves plasma etching an organic anti-reflecting coating film through a mask layer made of photoresist and having a predetermined pattern by using an etching gas of CF4 and O2. The method allows an organic anti-reflecting... | 02/20/2007 |
| 7169712 | Method for manufacturing a microlens A method for manufacturing a microlens formed on a semiconductor substrate includes the steps of preparing the semiconductor substrate, forming an insulating film, which has high etching selectivity with the semiconductor substrate, on the semiconductor substrate, f... | 01/30/2007 |
| 7163879 | Hard mask etch for gate polyetch A transistor gate structure that is free from notches is formed by using a hard mask. The hard mask has a bilayer structure of a BARC (bottom antireflective coating) over a silicon dioxide layer. A photoresist layer is formed over a portion corresponding to the gate... | 01/16/2007 |
| 7153731 | Method of forming a field effect transistor with halo implant regions A method of forming a field effect transistor includes forming a channel region within bulk semiconductive material of a semiconductor substrate. Source/drain regions are formed on opposing sides of the channel region. An insulative dielectric region is formed withi... | 12/26/2006 |
| 7118679 | Method of fabricating a sharp protrusion A method of fabricating a sharp protrusion on an underlayer is disclosed. A tip layer is deposited on an underlayer and then a mask layer is deposited on the tip layer. The mask layer is patterned with a beam-and-hat pattern that is used to form a beam-and-hat mask ... | 10/10/2006 |
| 7109101 | Capping layer for reducing amorphous carbon contamination of photoresist in semiconductor device manufacture; and process for making same In the fabrication of semiconductor devices using the PECVD process to deposit hardmask material such as amorphous carbon, structure and process are described for reducing migration of species from the amorphous carbon which can damage an overlying photoresist. In o... | 09/19/2006 |
| 7105456 | Methods for controlling feature dimensions in crystalline substrates A method of forming a slot in a substrate comprises growing an oxide layer on a first side of a substrate, patterning and etching the oxide layer to form an opening, forming a material overlying the opening and the oxide layer, removing substrate material through a ... | 09/12/2006 |
