Pet Toilet-Like Water Disk and Food Storage
One pet-friendly inventor patented "a device for watering pets, e.g., a dog or cat." The device, he helpfully noted, "has the general shape of a toilet."
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| Number | Title | Issue Date |
| 8163653 | Semiconductor device and method of manufacturing the same A semiconductor device includes a substrate, a compound semiconductor layer formed over the substrate, and a protective insulating film composed of silicon nitride, which is formed over a surface of the compound semiconductor layer and whose film density in an inter... | 04/24/2012 |
| 7989353 | Method for in-situ refurbishing a ceramic substrate holder Method for operating a processing system and refurbishing a ceramic substrate holder within a process chamber of the processing system are described. The method includes plasma processing one or more substrates on the ceramic substrate holder, where the processing c... | 08/02/2011 |
| 7977249 | Methods for removing silicon nitride and other materials during fabrication of contacts Methods for removing silicon nitride and elemental silicon during contact preclean process involve converting these materials to materials that are more readily etched by fluoride-based etching methods, and subsequently removing the converted materials by a fluoride... | 07/12/2011 |
| 7915175 | Etching nitride and anti-reflective coating A method of forming a semiconductor structure comprises etching an anti-reflective coating on a substrate with a first plasma comprising bromine and oxygen; and etching a nitride layer on the substrate with a second plasma comprising bromine and oxygen. ... | 03/29/2011 |
| 7842618 | System and method for improving mesa width in a semiconductor device A method for forming a memory device is provided. A nitride layer is formed over a substrate. The nitride layer and the substrate are etched to form a trench. The nitride layer is trimmed on opposite sides of the trench to widen the trench within the nitride layer. ... | 11/30/2010 |
| 7790620 | Method for fabricating semiconductor device A method for fabricating a semiconductor device is provided. The method includes: forming device isolation layers on a substrate; sequentially forming an anti-reflective coating layer and a photoresist layer on the substrate; patterning the anti-reflective coating l... | 09/07/2010 |
| 7732342 | Method to increase the compressive stress of PECVD silicon nitride films Compressive stress in a film of a semiconductor device may be controlled utilizing one or more techniques, employed alone or in combination. A first set of embodiments increase silicon nitride compressive stress by adding hydrogen to the deposition chemistry, and re... | 06/08/2010 |
| 7632757 | Method for forming silicon oxynitride film A silicon oxynitride film is formed on a target substrate by CVD, in a process field configured to be selectively supplied with a first process gas containing a chlorosilane family gas, a second process gas containing an oxidizing gas, and a third process gas contai... | 12/15/2009 |
| 7585779 | Fabrication method of semiconductor device A fabrication method of a semiconductor device includes steps of performing any one of O2 ashing, organic processing, and dry etching on a surface of a GaN-based semiconductor layer, etching the surface of the GaN-based semiconductor layer in a mixed solu... | 09/08/2009 |
| 7547639 | Selective surface exposure, cleans and conditioning of the germanium film in a Ge photodetector A method of protecting a sensitive layer from harsh chemistries. The method includes forming a first sensitive layer, forming a second layer upon the first layer, then forming a third layer over the second layer. The third layer is utilized as a mask during patterni... | 06/16/2009 |
| 7507674 | Memory device including resistance change layer as storage node and method(s) for making the same A method for manufacturing a memory device including a resistance change layer as a storage node according to example embodiment(s) of the present invention and a memory device made by the method(s) are provided. Pursuant to example embodiments of the present invent... | 03/24/2009 |
| 7488690 | Silicon nitride film with stress control An assembly comprises a multilayer nitride stack having nitride etch stop layers formed on top of one another, each of the nitride etch stop layers is formed using a film forming process. A method of making the multilayer nitride stack includes placing a substrate i... | 02/10/2009 |
| 7465672 | Method of forming etching mask The present invention relates to a method of forming an etching mask. According to the present invention, there is provided a method of forming an etching mask, comprising the steps of: depositing a hard mask film containing silicon on a substrate; depositing a phot... | 12/16/2008 |
| 7439087 | Semiconductor device and manufacturing method thereof A technology for reducing distance between adjacent pixel electrodes to smaller than the limit set by conventional process margin and also preventing adjacent pixel electrodes from being short circuited is provided. In a manufacturing method of a semiconducto... | 10/21/2008 |
| 7435354 | Treatment method for surface of photoresist layer and method for forming patterned photoresist layer A treatment method for a surface of a photoresist layer is provided. After forming a patterned photoresist layer over a wafer, a surface treatment step is performed to the photoresist layer by using at least one reaction gas comprising hydrogen bromide or hydrogen i... | 10/14/2008 |
| 7432205 | Method for controlling polishing process The invention is directed to a method for controlling a polishing process. The method comprises steps of providing a first wafer, wherein a thin film is located over the first wafer. A film average thickness distribution is obtained by measuring a plurality of thick... | 10/07/2008 |
| 7425277 | Method for hard mask CD trim Broadly speaking, methods and an apparatus are provided for removing an inorganic material from a substrate. More specifically, the methods provide for removing the inorganic material from the substrate through exposure to a high density plasma generated using an in... | 09/16/2008 |
| 7422020 | Aluminum incorporation in porous dielectric for improved mechanical properties of patterned dielectric A porous dielectric layer is formed on a substrate. Aluminum is incorporated in the porous dielectric layer with a pattern process using an Aluminum gas precursor. The incorporated Aluminum improves the mechanical properties of the porous dielectric layer. ... | 09/09/2008 |
| 7422936 | Facilitating removal of sacrificial layers via implantation to form replacement metal gates Replacement metal gates may be formed by removing a polysilicon layer from a gate structure. The gate structure may be formed by patterning the polysilicon layer and depositing a spacer layer over the gate structure such that the spacer layer has a first polish rate... | 09/09/2008 |
| 7416992 | Method of patterning a low-k dielectric using a hard mask By using a non-metallic hard mask for patterning low-k dielectric materials of advanced semiconductor devices, an enhanced degree of etch fidelity is obtained. The present invention may readily be applied to via first-trench last, trench first-via last schemes. ... | 08/26/2008 |
| 7405153 | Method for direct electroplating of copper onto a non-copper plateable layer A process for the formation of an interconnect in a semiconductor structure including the steps of forming a dielectric layer on a substrate, forming a first barrier layer on the dielectric layer, forming a second barrier layer on the first barrier layer, wherein th... | 07/29/2008 |
| 7402529 | Method of applying cladding material on conductive lines of MRAM devices A method of fabricating a cladding region for use in MRAM devices includes the formation of a conductive bit line proximate to a magnetoresistive memory device. The conductive bit line is immersed in a first bath containing dissolved ions of a first conductive mater... | 07/22/2008 |
| 7402513 | Method for forming interlayer insulation film It is an object of the present invention to provide a method for forming an interlayer insulation film suppressing the occurrence of voids in the interlayer insulation film. A method for forming an interlayer insulation film of the present invention, comprisi... | 07/22/2008 |
| 7393791 | Etching method, method of fabricating metal film structure, and etching structure There is provided an etching method in which a protective film existing in an etching-destined region of a substrate structure is removed by means of ICP-RIE to form an exposure region of the principal surface of the substrate. The substrate structure comprises a su... | 07/01/2008 |
| 7368390 | Photolithographic patterning process using a carbon hard mask layer of diamond-like hardness produced by a plasma-enhanced deposition process A carbon hard mask layer is applied to a substrate to be patterned by means of a plasma-enhanced deposition process in such a manner that it has a hardness comparable to that of diamond in at least one layer thickness section. During the production of this diamond-l... | 05/06/2008 |
| 7361601 | Chemical mechanical polish process and method for improving accuracy of determining polish endpoint thereof A method for improving accuracy of determining polish endpoint of chemical mechanical polish (CMP) process is provided. The method is performed before the CMP process. First, a test wafer with a to-be-polished layer and a material layer under the to-be-polished laye... | 04/22/2008 |
| 7358595 | Method for manufacturing MOS transistor Disclosed is a method for fabricating a MOS transistor. The present method includes forming a buffer layer pattern including nitrogen on the semiconductor substrate; forming a gate insulating layer and a gate electrode on the exposed substrate surface; forming a LDD... | 04/15/2008 |
| 7354867 | Etch process for improving yield of dielectric contacts on nickel silicides The embodiments of the invention generally relate to an etching process, and more particularly to an etch processing for improving the yield of dielectric contacts on nickel silicides. An oxygen-free feedgas is used in an etching process to reduce or eliminate resid... | 04/08/2008 |
| 7338907 | Selective etching processes of silicon nitride and indium oxide thin films for FeRAM device applications A dry etch process is described for selectively etching silicon nitride from conductive oxide material for use in a semiconductor fabrication process. Adding an oxidant in the etch gas mixture could increase the etch rate for the silicon nitride while reducing the e... | 03/04/2008 |
| 7332447 | Method of forming a contact A method of forming a contact is provided. A substrate having at least two metal oxide semiconductor devices is provided and a gap is formed between the two devices. A first stress layer is formed over the substrate to cover the metal-oxide semiconductor devices and... | 02/19/2008 |
| 7329610 | Method of high selectivity SAC etching A method for SAC etching is provided involving a) etching a Si wafer having a nitride present thereon with a first etching gas containing a first perfluorocarbon and carbon monoxide, and b) etching the resultant Si wafer having an initially etched nitride photoresis... | 02/12/2008 |
| 7326358 | Plasma processing method and apparatus, and storage medium A plasma processing method performs a plasma processing on a substrate mounted on a mounting table installed in an airtight processing chamber, the mounting table having a smaller size than the substrate. The substrate having a surface, on which a resist mark is for... | 02/05/2008 |
| 7323420 | Method for manufacturing multi-thickness gate dielectric layer of semiconductor device In a method for manufacturing a multi-thickness gate dielectric layer of a semiconductor device, a first dielectric layer is formed on a semiconductor substrate. A second dielectric layer is formed using a different dielectric material from the material constituting... | 01/29/2008 |
| 7316785 | Methods and apparatus for the optimization of etch resistance in a plasma processing system In a plasma processing system, including a plasma processing chamber, a method of optimizing the etch resistance of a substrate material is described. The method includes flowing pre-coat gas mixture into the plasma processing chamber, wherein the pre-coat gas mixtu... | 01/08/2008 |
| 7315076 | Display device and manufacturing method of the same A display device is provided in which contact holes, each having a sidewall with an ideal tapered shape, are formed in a structure in which a silicon oxide film, a silicon nitride film and a silicon oxide film are stacked in the named order. The display device inclu... | 01/01/2008 |
| 7309448 | Selective etch process of a sacrificial light absorbing material (SLAM) over a dielectric material A process of selectively etching a sacrificial light absorbing material (SLAM) over a dielectric material, such as carbon doped oxide, on a substrate using a plasma of a gas mixture in a plasma etch chamber. The gas mixture comprises a hydrofluorocarbon gas, an opti... | 12/18/2007 |
| 7300881 | Plasma etching method A plasma etching is performed on a substrate having a pattern wherein an interval between neighboring openings formed on a resist mask is equal to or less than 200 nm, wherein the etching is performed by converting a processing gas comprising an active species gener... | 11/27/2007 |
| 7297638 | Method for manufacturing a semiconductor device A method of forming patterns in a semiconductor device comprises: forming a conductive film on a substrate; forming an anti-reflective layer on the conductive film; cleaning oxide residues on the anti-reflective layer using a first cleaning solution; cleaning the ox... | 11/20/2007 |
| 7297628 | Dynamically controllable reduction of vertical contact diameter through adjustment of etch mask stack for dielectric etch Inwardly-tapered openings are created in an Anti-Reflection Coating layer (ARC layer) provided beneath a patterned photoresist layer. The smaller, bottom width dimensions of the inwardly-tapered openings are used for defining further openings in an interlayer dielec... | 11/20/2007 |
| RE39895 | Semiconductor integrated circuit arrangement fabrication method To realize etching with a high selection ratio and a high accuracy in fabrication of an LSI, the composition of dissociated species of a reaction gas is accurately controlled when dry-etching a thin film on a semiconductor substrate by causing an inert gas excited t... | 10/23/2007 |