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Class 438/722 - Metal oxide


Subclass of Class 438 - Semiconductor device manufacturing: process
Definition: Processes wherein the material undergoing etching with the
No. of patents: 194
Last issue date: 07/19/2011


1          
NumberTitleIssue Date
7981805Method for manufacturing resistance change element
The present invention provides a method for manufacturing a resistance change element that can reduce occurrence of corrosion without increasing a substrate temperature. A laminate film that includes a high melting-point metal film and a metal oxide film, is etched ...
07/19/2011
7964512Method for etching high dielectric constant materials
In one implementation, a method is provided for etching a high k dielectric material in a plasma etch reactor, the method comprising plasma etching the high k dielectric material with a first plasma gas reactant mixture having BCl3. The high k dielectric ...
06/21/2011
7915174Dielectric stack containing lanthanum and hafnium
Dielectric layers containing a dielectric layer including lanthanum and hafnium and methods of fabricating such dielectric layers provide an insulating layer in a variety of structures for use in a wide range of electronic devices. ...
03/29/2011
7910490Semiconductor device and manufacturing method thereof
An object is to provide a semiconductor device of which a manufacturing process is not complicated and by which cost can be suppressed, by forming a thin film transistor using an oxide semiconductor film typified by zinc oxide, and a manufacturing method thereof. Fo...
03/22/2011
7820555Method of patterning multilayer metal gate structures for CMOS devices
A method of forming patterning multilayer metal gate structures for complementary metal oxide semiconductor (CMOS) devices includes performing a first etch process to remove exposed portions of a polysilicon layer included within a gate stack, the polysilicon layer ...
10/26/2010
7807584Method of forming metallic oxide films using atomic layer deposition
Example embodiments are directed to methods of forming a metallic oxide film using Atomic Layer Deposition while controlling the power reflected by a reactor. The method may include feeding metallic source gases, for example, first and second metallic source gases, ...
10/05/2010
7442654Method of forming an oxide layer on a compound semiconductor structure
A method of forming a dielectric layer structure on a supporting semiconductor structure having a first surface comprises providing a first beam of oxide; depositing a first layer of oxide on the first surface of the supporting semiconductor structure using the firs...
10/28/2008
7442651Plasma etching method
An etching technique capable of applying etching at high selectivity to a transition metal element-containing electrode material layer which is formed on or above a dielectric material layer made of a high-dielectric-constant or “high-k” insulator is provided. T...
10/28/2008
7422020Aluminum incorporation in porous dielectric for improved mechanical properties of patterned dielectric
A porous dielectric layer is formed on a substrate. Aluminum is incorporated in the porous dielectric layer with a pattern process using an Aluminum gas precursor. The incorporated Aluminum improves the mechanical properties of the porous dielectric layer. ...
09/09/2008
7371263Plasmaless dry contact cleaning method using interhalogen compounds
A method of removing an oxide layer from an article. The article may be located in a reaction chamber into which an interhalogen compound reactive with the oxide layer is introduced. A temperature of the reaction chamber may be modified so as to remove the oxide lay...
05/13/2008
7368394Etch methods to form anisotropic features for high aspect ratio applications
Methods for forming anisotropic features for high aspect ratio application in etch process are provided in the present invention. The methods described herein advantageously facilitates profile and dimension control of features with high aspect ratios through a side...
05/06/2008
7364956Method for manufacturing semiconductor devices
A method for manufacturing semiconductor devices includes a step of etching a sample including an interlayer insulating layer containing Al2O3 and a polysilicon or SiO2 layer in contact with the interlayer insulating layer using a pl...
04/29/2008
7361606Method of forming a metal line and method of manufacturing display substrate having the same
A method of forming a metal line is provided. A first metal layer and a second metal layer protecting the first metal layer are formed on a base substrate. The first metal layer includes aluminum or aluminum alloy. A photoresist pattern having a linear shape is form...
04/22/2008
7344927Method and apparatus for manufacturing active matrix device including top gate type TFT
A method and an apparatus are provided for manufacturing an active matrix device including a top gate type TFT. A manufacturing process of the top gate type TFT includes the steps of forming an oxide film on the inner wall of a CVD processing chamber and arranging a...
03/18/2008
7335590Method of fabricating semiconductor device by forming diffusion barrier layer selectively and semiconductor device fabricated thereby
In a method of fabricating a semiconductor device by selectively forming a diffusion barrier layer, and a semiconductor device fabricated thereby, a conductive pattern and an insulating layer, which covers the conductive pattern, are formed on a semiconductor substr...
02/26/2008
7323418Etch-back process for capping a polymer memory device
The present invention leverages an etch-back process to provide an electrode cap for a polymer memory element. This allows the polymer memory element to be formed within a via embedded in layers formed on a substrate. By utilizing the etch-back process, the present ...
01/29/2008
7312091Methods for forming a ferroelectric layer and capacitor and FRAM using the same
Metal organic chemical vapor deposition (MOCVD) may be utilized in methods of forming an (111) oriented PZT ferroelectric layer at a lower temperature, a ferroelectric capacitor and methods of fabricating, and a ferroelectric memory device using the same may be prov...
12/25/2007
7309652Method for removing photoresist layer and method for forming metal line in semiconductor device using the same
Disclosed are a method for removing a photoresist layer and a method for forming a metal line using the same. The method for removing a photoresist pattern, including the steps of: forming a bottom layer on a substrate by using the photoresist pattern as a mask; and...
12/18/2007
7294241Method to form alpha phase Ta and its application to IC manufacturing
A method of sputtering a Ta layer comprised of alpha phase Ta on a Cu layer. An embodiment includes a Ta sputter deposition on a Cu surface at a substrate temperature less than 200° C. Another embodiment has a pre-cooling step at a temperature less than 100° C. pr...
11/13/2007
7279732Enhanced atomic layer deposition
A method of enhanced atomic layer deposition is described. In an embodiment, the enhancement is the use of plasma. Plasma begins prior to flowing a second precursor into the chamber. The second precursor reacts with a prior precursor to deposit a layer on the substr...
10/09/2007
7273815Etch features with reduced line edge roughness
A method for forming a feature in a layer with reduced line edge roughening is provided. A photoresist layer is formed over the layer. The photoresist layer is patterned to form photoresist features with photoresist sidewalls. A sidewall layer with a thickness less ...
09/25/2007
7271071Method of forming a catalytic surface comprising at least one of Pt, Pd, Co and Au in at least one of elemental and alloy forms
The invention includes methods of forming a substrate having a surface comprising at least one of Pt, Pd, Co and Au in at least one of elemental and alloy forms. In one implementation, a substrate is provided which has a first substrate surface comprising at least o...
09/18/2007
7268076Apparatus and method for metal plasma vapor deposition and re-sputter with source and bias power frequencies applied through the workpiece
Physical vapor deposition and re-sputtering of a barrier layer in an integrated circuit is performed by providing a metal target near a ceiling of the chamber and a wafer support pedestal facing the target near a floor of the chamber. A process gas is introduced int...
09/11/2007
7256497Semiconductor device with a barrier layer and a metal layer
This invention provides a semiconductor device that can minimize deterioration of electric characteristics of the semiconductor device while minimizing the amount of etching required. In the semiconductor device of the invention, a pad electrode layer formed of a fi...
08/14/2007
7253094Methods for cleaning contact openings to reduce contact resistance
A method for processing a semiconductor topography which includes removing metal oxide layers from the bottom of contact openings is provided. In some embodiments, the method may include etching openings within a dielectric layer to expose conductive and silicon sur...
08/07/2007
7253109Method of depositing a tantalum nitride/tantalum diffusion barrier layer system
We have discovered a method of providing a thin, approximately from about 2 Å to about 100 Å thick TaN seed layer, which can be used to induce the formation of alpha tantalum when tantalum is deposited over the TaN seed layer. Further, the ...
08/07/2007
7244344Physical vapor deposition plasma reactor with VHF source power applied through the workpiece
A physical vapor deposition plasma reactor includes a vacuum chamber including a sidewall, a ceiling and a wafer support pedestal near a floor of the chamber, and a vacuum pump coupled to the chamber, a process gas inlet coupled to the chamber and a process gas sour...
07/17/2007
7241696Method for depositing a metal layer on a semiconductor interconnect structure having a capping layer
Disclosed is a method for depositing a metal layer on an interconnect structure for a semiconductor wafer. In the method, a metal conductor is covered by a capping layer and a dielectric layer. The dielectric layer is patterned so as to expose the capping layer. The...
07/10/2007
7235854Lanthanide doped TiOdielectric films
A dielectric film containing lanthamide doped TiOx and a method of fabricating such a dielectric film produce a reliable gate dielectric having an equivalent oxide thickness thinner than attainable using SiO2. A dielectric film is formed by ion...
06/26/2007
7221586Memory utilizing oxide nanolaminates
Structures, systems and methods for transistors utilizing oxide nanolaminates are provided. One transistor embodiment includes a first source/drain region, a second source/drain region, and a channel region therebetween. A gate is separated from the channel region b...
05/22/2007
7217665Method of plasma etching high-K dielectric materials with high selectivity to underlying layers
A method of plasma etching a layer of dielectric material having a dielectric constant that is greater than four (4). The method includes exposing the dielectric material layer to a plasma comprising a hydrocarbon gas and a halogen containing gas. ...
05/15/2007
7217619Method for fabricating memory components
The top of the semiconductor body (1) has a sacrificial layer (4) made of nitride applied to it on a region, which is provided for the actuation circuit. A memory layer (6) provided for the memory cells is applied over the entire area and is rem...
05/15/2007
7214619Method for forming a barrier layer in an integrated circuit in a plasma with source and bias power frequencies applied through the workpiece
A barrier layer is formed in an integrated circuit by providing a metal target near a ceiling of the chamber and a wafer support pedestal facing the target near a floor of the chamber. A process gas is introduced into the vacuum chamber. A target-sputtering plasma i...
05/08/2007
7208804Crystalline or amorphous medium-K gate oxides, Y0and Gd0
A gate oxide and method of fabricating a gate oxide that produces a more reliable and thinner equivalent oxide thickness than conventional SiO2 gate oxides are provided. Also shown is a gate oxide with a conduction band offset of 2 eV or greater. Gate oxi...
04/24/2007
7205218Method including forming gate dielectrics having multiple lanthanide oxide layers
A dielectric film having a layer of a lanthanide oxide and a layer of another lanthanide oxide, and a method of fabricating such a dielectric film produce a reliable gate dielectric with a equivalent oxide thickness thinner than attainable using SiO2. A g...
04/17/2007
7205620Highly reliable amorphous high-k gate dielectric ZrON
A gate dielectric and method of fabricating a gate dielectric that produces a more reliable and thinner equivalent oxide thickness than conventional SiO2 gate oxides are provided. Gate dielectrics formed from metals such as zirconium are thermodynamically...
04/17/2007
7202169Method and system for etching high-k dielectric materials
A system and a method to remove a layer of high-k dielectric material during the manufacturing of an integrated circuit. In one embodiment of the invention, an etch reactant is employed to form volatile etch products when reacted with high-k layers. Alternately, hig...
04/10/2007
7199023Atomic layer deposited HfSiON dielectric films wherein each precursor is independendently pulsed
A dielectric film containing atomic layer deposited HfSiON and a method of fabricating such a dielectric film produce a reliable dielectric layer having an equivalent oxide thickness thinner than attainable using SiO2. The HfSiON layer thickness is contro...
04/03/2007
7192892Atomic layer deposited dielectric layers
An atomic layer deposited dielectric layer and a method of fabricating such a dielectric layer produce a reliable dielectric layer having an equivalent oxide thickness thinner than attainable using SiO2. Depositing a hafnium metal layer on a substrate sur...
03/20/2007
7183658Low cost microelectronic circuit package
A low cost microelectronic circuit package includes a single build up metallization layer above a microelectronic die. At least one die is fixed within a package core using, for example, an encapsulation material. A single metallization layer is then built up over t...
02/27/2007
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