Comic actor Danny Kaye received patent D166,807 for the co-design of "Blowout Toy or the Like". It's similar to one of those toys that unravels when you blow into at a birthday party except Kaye's has three blowouts going in different directions, not just one.
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| Number | Title | Issue Date |
| 7202177 | Nitrous oxide stripping process for organosilicate glass A method of stripping an integrated circuit (IC) structure having a photoresist material and an organosilicate glass (OSG) material is described. The method comprises feeding a nitrous oxide (N2O) gas into a reactor, generating a plasma in the reactor and... | 04/10/2007 |
| 7202178 | Micro-fluid ejection head containing reentrant fluid feed slots A method of micro-machining a semiconductor substrate to form through slots therein and substrates made by the method. The method includes providing a dry etching chamber having a platen for holding a semiconductor substrate. During an etching cycle of a dry etch pr... | 04/10/2007 |
| 7199059 | Method for removing polymer as etching residue A method for removing polymer as an etching residue is described. A substrate with polymer as an etching residue thereon is provided, and a hydrogen-containing plasma is used to treat the substrate. A wet clean step is then performed to remove the polymer from the s... | 04/03/2007 |
| 7199060 | Method for patterning dielectric layers on semiconductor substrates The invention relates to a process for patterning dielectric layers. A photoresist layer is applied to the dielectric layer and patterned. Then, the pattern which has been predetermined by the resist mask is transferred to the dielectric layer. The incineration of t... | 04/03/2007 |
| 7199021 | Methods and systems to mitigate etch stop clipping for shallow trench isolation fabrication The present invention facilitates semiconductor fabrication by maintaining shape and density of an etch stop layer (206) during trench fill operations. The shape and density of the etch stop layer (206) is maintained by forming a protective alloy liner... | 04/03/2007 |
| 7198677 | Low temperature wafer backside cleaning A ring is provided that, together with a wafer, separates a processing chamber into an upper portion and a lower portion so that one side of the wafer, such as the backside, can be cleaned or otherwise processed with little or no interaction to the frontside of the ... | 04/03/2007 |
| 7199023 | Atomic layer deposited HfSiON dielectric films wherein each precursor is independendently pulsed A dielectric film containing atomic layer deposited HfSiON and a method of fabricating such a dielectric film produce a reliable dielectric layer having an equivalent oxide thickness thinner than attainable using SiO2. The HfSiON layer thickness is contro... | 04/03/2007 |
| 7199051 | Method for fabricating semiconductor device capable of preventing damages to conductive structure Disclosed is a method for fabricating a semiconductor device with protected conductive structures. The method includes the steps of: forming a plurality of conductive structures on a substrate, each conductive structure including a conductive layer and a hard mask i... | 04/03/2007 |
| 7199058 | Method of manufacturing a semiconductor device and apparatus for manufacturing a semiconductor device Precision in an etching process is to be improved. A detecting unit 404 detects a variation of plasma emission intensity at a plurality of wavelengths (an emission band having an intensity peak in the proximity of 358 nm and an emission band having an intensi... | 04/03/2007 |
| 7196283 | Plasma reactor overhead source power electrode with low arcing tendency, cylindrical gas outlets and shaped surface An overhead gas distribution electrode forming at least a portion of the ceiling of a plasma reactor has a bottom surface facing a processing zone of the reactor. The electrode includes a gas supply manifold for receiving process gas at a supply pressure at a top po... | 03/27/2007 |
| 7196507 | Apparatus for testing substrates An apparatus for testing substrates reduces the area required and the costs which arise with the testing of substrates, in particular semiconductor wafers, during the production process. The apparatus includes testing arrangements comprising a chuck, a chuck drive, ... | 03/27/2007 |
| 7195716 | Etching process and patterning process An etching process is described. A material layer having a bottom anti-reflection coating (BARC) and a patterned photoresist layer thereon is provided. An etching step is performed to the BARC using the patterned photoresist layer as a mask. A cleaning step is perfo... | 03/27/2007 |
| 7196004 | Method and fabricating semiconductor device A method for fabricating a semiconductor device is capable of preventing a hard mask layer of a conductive structure from being damaged during a self-aligned contact etching process. The method includes the steps of: forming a plurality of conductive structures incl... | 03/27/2007 |
| 7192880 | Method for line etch roughness (LER) reduction for low-k interconnect damascene trench etching The present invention provides a method for etching a substrate 100. The method includes conducting a first etch on an anti-reflective layer 170 and a portion of a hardmask layer 140, 150 to form an opening 162 in the substrate 100... | 03/20/2007 |
| 7192910 | Cleaning solutions and etchants and methods for using same Composition for cleaning or etching a semiconductor substrate and method for using the same. The composition may include a fluorine-containing compound as an active agent such as a quaternary ammonium fluoride, a quaternary phosphonium fluoride, sulfonium fluoride, ... | 03/20/2007 |
| 7192877 | Low-K dielectric etch process for dual-damascene structures A method includes performing a first etch process to form a via hole in a dual-damascene integrated circuit structure comprising a first dielectric layer and a second dielectric layer. The via hole extends at least substantially through the first and second dielectr... | 03/20/2007 |
| 7192531 | In-situ plug fill A method for forming damascene features in a dielectric layer over a barrier layer over a substrate is provided. A plurality of vias are etched in the dielectric layer to the barrier layer with a plasma etching process in the plasma processing chamber. A patterned p... | 03/20/2007 |
| 7192874 | Method for reducing foreign material concentrations in etch chambers A method of reducing foreign material concentrations in an etch chamber having inner chamber walls is described. The method includes the step of etching a work piece in the etch chamber such that reaction products from the work piece having one or more elements form... | 03/20/2007 |
| 7192532 | Dry etching method A tungsten silicide layer (104) is etched by plasma etching using Cl2+O2 gas as etching gas. When etching of the tungsten silicide layer (104) is ended substantially, etching gas is switched to Cl2+O2+NF... | 03/20/2007 |
| 7192625 | Manufacturing method of barrier-forming film In manufacturing a barrier-forming film, a vapor-deposited inorganic oxide film is provided on a face of a substrate film. An annealing treatment is applied to the substrate film having said vapor-deposited inorganic film. The substrate film is a resinous film which... | 03/20/2007 |
| 7192875 | Processes for treating morphologically-modified silicon electrode surfaces using gas-phase interhalogens Processes for treating a morphologically-modified surface of a silicon upper electrode of a plasma processing chamber include exposing the surface to a gas composition containing at least one gas-phase halogen fluoride. The gas composition is effective to remove sil... | 03/20/2007 |
| 7189291 | Method for the removal of airborne molecular contaminants using oxygen gas mixtures The present invention discloses a method for the removal of a number of molecular contaminants from surfaces within a device. A purge gas containing oxygen and/or water is introduced into the interior of the device, contacting at least a portion of the interior surf... | 03/13/2007 |
| 7189654 | Manufacturing method for wiring In the case in which a film for a resist is formed by spin coating, there is a resist material to be wasted, and the process of edge cleaning is added as required. Further, when a thin film is formed on a substrate using a vacuum apparatus, a special apparatus or eq... | 03/13/2007 |
| 7189661 | Method of forming silicon oxynitride layer in semiconductor device and apparatus of forming the same There are provided a method and an apparatus of forming an insulating layer including silicon oxynitride. The method includes performing a plasma treatment process for supplying a plasma reaction gas to a substrate to be treated after completing the annealing proces... | 03/13/2007 |
| 7186659 | Plasma etching method The present invention provides a plasma etching method that can etch a metal film as a material to be etched selectively against an organic film underlying the material. The etching method comprising the steps of introducing an etching gas in an etching chamber wher... | 03/06/2007 |
| 7186660 | Silicon precursors for deep trench silicon etch processes The present invention relates to etch chemistry and methods for the etching of silicon substrates. The method is particularly useful for deep trench etching of silicon substrates and produces a trench having a high aspect ratio. In this type of deep trench etching, ... | 03/06/2007 |
| 7186943 | MERIE plasma reactor with overhead RF electrode tuned to the plasma with arcing suppression A plasma reactor for processing a semiconductor workpiece, includes a reactor chamber having a chamber wall and containing a workpiece support for holding the semiconductor support, the electrode comprising a portion of the chamber wall, an RF power generator for su... | 03/06/2007 |
| 7182879 | Plasma processing method A plasma processing method, in which a process gas is introduced into an evacuated process chamber for subjecting the target object to a plasma processing. The plasma processing method is featured in that at least a part of the process gas exhausted from the process... | 02/27/2007 |
| 7183120 | Etch-stop material for improved manufacture of magnetic devices A method for fabricating a magnetoresistive device having at least one active region, which may be formed into a magnetic memory bit, sensor element and/or other device, is provided. In forming the magnetoresistive device, a magnetoresistive stack, such as a giant m... | 02/27/2007 |
| 7183186 | Atomic layer deposited ZrTiOfilms After pulsing the second purging gas, a zirconium-containing precursor is pulsed into reaction chamber 220, at block 430. In an embodiment, the zirconium-containing precursor is ZTB. In other embodiments, a zirconium-containing precursor includes but i... | 02/27/2007 |
| 7183201 | Selective etching of organosilicate films over silicon oxide stop etch layers A method of selectively etching organosilicate layers in integrated circuit fabrication processes is disclosed. The organosilicate layers are selectively etched using a hydrogen-containing fluorocarbon gas. The hydrogen-containing fluorocarbon gas may be used to sel... | 02/27/2007 |
| 7183217 | Dry-etching method A dry-etching method using an apparatus where a wafer is placed on either of a pair of opposed electrodes provided in an etching chamber, and high-frequency power is supplied to both the opposed electrodes to effect a plasma etching. The plasma etching uses a gas co... | 02/27/2007 |
| 7183220 | Plasma etching methods A plasma etching method includes forming a polymer comprising carbon and a halogen over at least some internal surfaces of a plasma etch chamber. After forming the polymer, plasma etching is conducted using a gas which is effective to etch polymer from chamber inter... | 02/27/2007 |
| 7179707 | Method of forming gate electrode in semiconductor device A method for forming a gate electrode in the semiconductor device is disclosed. The disclosed methods for forming a gate electrode in a semiconductor includes forming a polysilicon film and a metal silicide film sequentially on an upper portion of a semiconductor su... | 02/20/2007 |
| 7176728 | High voltage low power driver A power driver circuit is provided including a low voltage source, a high voltage source, at least one input signal line, an output node, and circuitry adapted to connect the output node to the low voltage source when the input signal line is in a first state and to... | 02/13/2007 |
| 7176139 | Etching method in a semiconductor processing and etching system for performing the same Disclosed is an etching method for semiconductor processing by which a pattern loading phenomenon is reduced. First, plasma is generated while setting a bias power applied to a wafer to zero and applying a source power. After a predetermined time period, an etching ... | 02/13/2007 |
| 7176141 | Plasma treatment to improve barrier layer performance over porous low-K insulating dielectrics A method for plasma treating an etched opening formed in a porous low-K material to improve barrier layer integrity including providing a substrate comprising an etched opening formed in an insulating dielectric layer including porous low-K silicon oxide according t... | 02/13/2007 |
| 7176140 | Adhesion promotion for etch by-products Methods and apparatus for cleaning a semiconductor substrate that significantly reduce the number of particles falling onto the substrate during cleaning by coating all interior surfaces within a processing chamber with an adhesion film that has an increased stickin... | 02/13/2007 |
| 7176109 | Method for forming raised structures by controlled selective epitaxial growth of facet using spacer Raised structures comprising overlying silicon layers formed by controlled selective epitaxial growth, and methods for forming such raised-structure on a semiconductor substrate are provided. The structures are formed by selectively growing an initial epitaxial laye... | 02/13/2007 |
| 7177081 | High contrast grating light valve type device A grating light valve has with a plurality of spaced reflective ribbons are spatially arranged over a substrate with reflective surfaces. The grating light valve is configured to optimized the conditions for constructive and destructive interference with an incident... | 02/13/2007 |