Class 438/686 - Noble group metal (i.e., silver (Ag), gold (Au), platinum (Pt), palladium (Pd), rhodium (Rh), ruthenium (Ru), iridium (Ir), osmium (Os), or alloy thereof)

Subclass of Class 438 - Semiconductor device manufacturing: process
Definition: Processes for forming a contact using one of the noble group
No. of patents: 428
Last issue date: 03/26/2013

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Number	Title	Issue Date
6455424	Selective cap layers over recessed polysilicon plugs Methods are provided for selective formation of oxidation-resistant caps for conductive plugs in semiconductor device fabrication. One embodiment of the present invention forms a sacrificial layer over a recessed polysilicon plug. The sacrificial layer is...	09/24/2002
6451688	Method for manufacturing a semiconductor device A manufacturing process which enables the opening of a downwardly protruding window for a dual damascene structure, etc. both easily and in a well-controlled fashion even in a case where the opening is small. After a depression constituted by a silicon ni...	09/17/2002
6451685	Method for multilevel copper interconnects for ultra large scale integration A method of manufacturing integrated circuits using a thin metal oxide film as a seed layer for building multilevel interconnects structures in integrated circuits. Thin layer metal oxide films are deposited on a wafer, and standard optical lithography is...	09/17/2002
6451624	Stackable semiconductor package having conductive layer and insulating layers and method of fabrication A semiconductor package includes a substrate and a semiconductor die wire bonded, or alternately flip chip bonded, to the substrate. The substrate includes three separate layers including a conductive layer having a pattern of conductive traces, a first i...	09/17/2002
6440854	Anti-agglomeration of copper seed layers in integrated circuit metalization The present invention pertains to systems and methods for reducing the agglomeration of copper deposited by physical vapor deposition. More specifically, the invention pertains to systems and methods for depositing copper seed layers on a semiconductor wa...	08/27/2002
6436823	Method for forming a TiN layer on top of a metal silicide layer in a semiconductor structure and structure formed A method for forming a TiN layer on top of a metal silicide layer in a semiconductor structure without the formation of a thick amorphous layer containing Ti, Co and Si and the structure formed are provided. In the method, after a Ti layer is deposited on...	08/20/2002
6429127	Methods for forming rough ruthenium-containing layers and structures/methods using same A method for forming a rough ruthenium-containing layer on the surface of a substrate assembly includes providing a ruthenium-containing precursor into the reaction chamber. A rough ruthenium layer may be deposited on the surface of the substrate assembly...	08/06/2002
6426292	Methods for forming iridium and platinum containing films on substrates A method of forming an iridium and platinum containing film on a substrate, such as a semiconductor wafer using complexes of the formula Ly IrXz, wherein: each L group is independently a neutral or anionic ligand; each Y group is ind...	07/30/2002
6424046	Substrate for manufacturing a semiconductor device with three element alloy The substrate according to the present invention is comprised of a silver/gold/grain element alloy layer, wherein the alloy forms an outside layer of the product. The grain element is selected from a group consisting of selenium, antimony, bismuth, nickel...	07/23/2002
6417062	Method of forming ruthenium oxide films A method of forming a ruthenium dioxide film for such purposes as the fabrication of stable thin-film resistors for microcircuits. The method generally entails forming an inorganic ruthenium-based film on a substrate, and then thermally decomposing at lea...	07/09/2002
6414344	Semiconductor device for use in a memory cell and method for the manufacture thereof A semiconductor device for use in a memory cell includes an active matrix provided with a silicon substrate, a transistor formed on the silicon substrate and isolation regions for isolating the transistor, a capacitor structure formed on top of the active...	07/02/2002
6413862	Use of palladium in IC manufacturing An apparatus and a method for forming a substrate having a palladium metal layer over at least one contact point of the substrate and having a flexible conductive polymer bump, preferably a two-stage epoxy, on the palladium plated contact point. The prese...	07/02/2002
6410460	Technology for thermodynamically stable contacts for binary wide band gap semiconductors A thermodynamically stable metallic contact for binary oxide-, nitride-, carbide or phosphide-semiconductors and a method of its preparation, the contact is formed in a high temperature reaction in vacuum of a metal bi-layer with the binary semiconductor ...	06/25/2002
6399492	Ruthenium silicide processing methods The invention includes methods of processing ruthenium silicide. In one implementation, a ruthenium silicide processing method sequentially includes forming ruthenium silicide over front and back sides of a semiconductor substrate. The backside ruthenium ...	06/04/2002
6399477	Semiconductor devices and methods for manufacturing semiconductor devices In a method for manufacturing a semiconductor device in which wiring layers are formed by a damascene method, certain embodiment relate to a manufacturing methods and semiconductor devices, in which a bonding pad section having a multiple-layered structur...	06/04/2002
6391770	Method of manufacturing semiconductor device In a semiconductor device, an opening having a high aspect ratio from a back surface of a GaAs substrate and is formed by anisotropic dry etching. After an Au film is deposited on the entire back surface of the GaAs substrate, including inside of the open...	05/21/2002
6391773	Method and materials for through-mask electroplating and selective base removal Multilayer metal materials are selected so that the materials will alloy or intermix under rapid thermal annealing conditions. The individual materials of the multilayers are preferably chosen such that at least one of the materials may be selectively etc...	05/21/2002
6380080	Methods for preparing ruthenium metal films The present invention provides methods for the preparation of ruthenium metal films from liquid ruthenium complexes of the formula (diene)Ru(CO)3, wherein "diene" refers to linear, branched, or cyclic dienes, bicyclic dienes, tricyclic dienes, ...	04/30/2002
6376090	Method for manufacturing a substrate with an oxide ferroelectric thin film formed thereon and a substrate with an oxide ferroelectric thin film formed thereon A method for manufacturing a substrate with an oxide ferroelectric thin film formed thereon includes the steps of forming an electrode on a substrate, prebaking the substrate with the electrode formed thereon and forming an oxide ferroelectric thin film o...	04/23/2002
6355492	Process for the manufacturing of oxide electrodes for ferroelectric capacitor An electrode for a capacitor having two electrodes and a capacitor insulation layer formed of a dielectric film sandwiched between the two electrodes, at least one of the electrodes being formed of a metal layer and a metal oxide layer, and the metal oxid...	03/12/2002
6350363	Electric field directed construction of diodes using free-standing three-dimensional components A process of making an electric current rectifying device using spatially coupled bipolar electrochemical deposition includes (a) placing at least two electrically conductive substrates, which may be a source of electrically conductive material, or a sepa...	02/26/2002
6350644	Ferroelectric thin-film device and method for producing the same A ferroelectric thin-film device comprises: a single crystal substrate; a conductive thin film formed on the single crystal substrate; and an oriented ferroelectric oxide thin film having a perovskite structure formed on the conductive thin film. The orie...	02/26/2002
6344410	Manufacturing method for semiconductor metalization barrier A semiconductor metalization barrier, and manufacturing method therefor, is provided which is a stack of a cobalt layer and cobalt tungsten layer deposited on a copper bonding pad....	02/05/2002
6342446	Plasma process for organic residue removal from copper An embodiment of the instant invention is a method of fabricating an electronic device formed on a semiconductor wafer, the method comprising the steps of: forming a conductive structure over the semiconductor substrate, the conductive structure comprised...	01/29/2002
6339024	Reinforced integrated circuits A method of manufacturing integrated circuits wherein a conductive structure in a topmost semiconductive layer of an integrated circuit is provided having a thickness greater than or equal to 1.5 μm. The thickness of the conductive structure is sufficien...	01/15/2002
6333067	Selective growth of ferromagnetic films A method of forming the device, includes selective area deposition of a ferromagnetic material on a substrate. The substrate surface is partially covered with material having a crystal structure having at least one symmetry relation with the crystal struc...	12/25/2001
6323128	Method for forming Co-W-P-Au films A method for forming a quaternary alloy film of Co--W--P--Au for use as a diffusion barrier layer on a copper interconnect in a semiconductor structure and devices formed incorporating such film are disclosed. In the method, a substrate that has copper co...	11/27/2001
6323081	Diffusion barrier layers and methods of forming same A method for use in the fabrication of integrated circuits includes providing a substrate assembly having a surface and forming a barrier layer over at least a portion of the surface. The barrier layer is formed of a platinum(x):ruthenium(1-x) alloy, wher...	11/27/2001
6319741	Method for fabricating metal interconnections and wiring board having the metal interconnections A Ni film for a ground metal film is formed on an insulating substrate by direct current magnetron sputtering process, which prevents occurrence of minute protrusions on a surface of the ground metal film. Next, a Ni film is patterned into a specified int...	11/20/2001
6319765	Method for fabricating a memory device with a high dielectric capacitor The present invention provides a method for fabricating a ferroelectric memory device to reduce manufacturing cost and to obtain the electric characteristic of capacitor. The method comprises the steps of: forming an intermetal insulating layer provided w...	11/20/2001
6319808	Ohmic contact to semiconductor devices and method of manufacturing the same An ohmic contact of semiconductor and its manufacturing method are disclosed. The present invention provides a low resistivity ohmic contact so as to improve the performance and reliability of the semiconductor device. This ohmic contact is formed by firs...	11/20/2001
6319757	Adhesion and/or encapsulation of silicon carbide-based semiconductor devices on ceramic substrates A SiC die with Os and/or W/WC/TiC contacts and metal conductors is encapsulated either alone or on a ceramic substrate using a borosilicate (BSG) glass that is formed at a temperature well below upper device operating temperature limits but serves as a st...	11/20/2001
6313035	Chemical vapor deposition using organometallic precursors A multi-component layer is deposited on a semiconductor substrate in a semiconductor process. The multi-component layer may be a dielectric layer formed from a gaseous titanium organometallic precursor, reactive silane-based gas and a gaseous oxidant. The...	11/06/2001
6306754	Method for forming wiring with extremely low parasitic capacitance A method for creating metal layers in a microelectronic device where air is the primary dielectric separating adjacent metal features within a layer. A temporary structural solid, such as a photoresist, is deposited on a substrate with exposed metal featu...	10/23/2001
6297157	Time ramped method for plating of high aspect ratio semiconductor vias and channels A method is provided for forming conductive layers in semiconductor vias by using forward and reverse pulses during the electroplating process which have time intervals between pulses which increase with time and for forming conductive layers in semicondu...	10/02/2001
6297146	Low resistivity semiconductor barrier layer manufacturing method A semiconductor, and manufacturing method therefor, is provided with a barrier/adhesion layer, having cobalt, nickel, or palladium for semiconductors having conductive materials of copper, silver or gold. The barrier/adhesion layer can be alloyed with bet...	10/02/2001
6297138	Method of depositing a metal film onto MOS sensors A method for depositing a metal film onto the semiconductor substrate and insulator of a MOS sensor is provided. The method utilizes a laser ablation technique to deposit metal films having a desired thickness and roughness to enhance the reliability and ...	10/02/2001
6294396	Monitoring barrier metal deposition for metal interconnect The barrier effectiveness of a barrier material with respect to a conductive material is evaluated by providing a silicon substrate and then etching said silicon substrate to define an opening therein. The barrier material is then deposited in the opening...	09/25/2001
6291347	Method and system for constructing semiconductor devices A system for constructing semiconductor devices is disclosed. The system comprises a wafer (102) having semiconductor devices (104), a bevel (108), an edge (110), a frontside (111), and a backside (112). The system also has a chamber (107), and a heater (...	09/18/2001
6284655	Method for producing low carbon/oxygen conductive layers The present invention provides a method for forming a substantially carbon- and oxygen-free conductive layer, wherein the layer can contain a metal and/or a metalloid material. According to the present invention, a substantially carbon- and oxygen-free co...	09/04/2001

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Class 438/686 - Noble group metal (i.e., silver (Ag), gold (Au), platinum (Pt), palladium (Pd), rhodium (Rh), ruthenium (Ru), iridium (Ir), osmium (Os), or alloy thereof)