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| Number | Title | Issue Date |
| 8034717 | Mass production method of semiconductor integrated circuit device and manufacturing method of electronic device In order to prevent the contamination of wafers made of a transition metal in a semiconductor mass production process, the mass production method of a semiconductor integrated circuit device of the invention comprises the steps of depositing an Ru film on individual... | 10/11/2011 |
| 7998864 | Noble metal cap for interconnect structures An interconnect structure that includes a dielectric material having a dielectric constant of about 3.0 or less is provided. This low k dielectric material has at least one conductive material having an upper surface embedded therein. The dielectric material also ha... | 08/16/2011 |
| 7884018 | Method for improving the selectivity of a CVD process A method of forming a noble metal cap on a conductive material embedded in a dielectric material in an interconnect structure. The method includes the step of contacting (i) a conductive material having a bare upper surface partially embedded in a dielectric materia... | 02/08/2011 |
| 7713876 | Method for integrating a ruthenium layer with bulk copper in copper metallization A method for integrating a Ru layer with bulk Cu in semiconductor manufacturing. The method includes depositing a Ru layer onto a substrate in a chemical vapor deposition process, modifying the deposited Ru layer by oxidation, or nitridation, or a combination thereo... | 05/11/2010 |
| 7659205 | Amorphous carbon-based non-volatile memory A resistance variable memory element and a method for forming the same. The memory element has an amorphous carbon layer between first and second electrodes. A metal-containing layer is formed between the amorphous carbon layer and the second electrode. ... | 02/09/2010 |
| 7541284 | Method of depositing Ru films having high density A ruthenium film deposition method is disclosed. In one embodiment of the method, a first ruthenium film is deposited by using a PEALD process until a substrate is substantially entirely covered with the first ruthenium film. Then, a second ruthenium film is deposit... | 06/02/2009 |
| 7538035 | Lapping of gold pads in a liquid medium for work hardening the surface of the pads A method for work hardening gold contact pads is disclosed. The method includes providing gold contact pads, providing lapping pads, and placing the lapping pads in contact with the gold contact pads to create a contact interface. A liquid medium is then applied to ... | 05/26/2009 |
| 7507665 | Method of manufacturing electrical parts A method of manufacturing electrical parts is provided, which method comprises the steps of: forming a photoresist on a part of the surface of a substrate; forming a metal layer on the surface of the substrate after the photoresist has been formed; removing a part o... | 03/24/2009 |
| 7491646 | Electrically conductive feature fabrication process A process for fabricating an electrically conductive feature comprising: (a) liquid depositing a low viscosity composition comprising starting ingredients including an organic anine, a silver compound, and optionally an organic acid, to result in a deposited composi... | 02/17/2009 |
| 7476618 | Selective formation of metal layers in an integrated circuit A method for enhancing the reliability of copper interconnects and/or contacts, such as the bottom of vias exposing top surfaces of buried copper, or at the top of copper lines just after CMP. The method comprises contacting the exposed copper surface with a vapor p... | 01/13/2009 |
| 7442633 | Decoupling capacitor for high frequency noise immunity Systems and methods are provided for an on-chip decoupling device and method. One aspect of the present subject matter is a capacitor. One embodiment of the capacitor includes a substrate, a high K dielectric layer doped with nano crystals disposed on the substrate,... | 10/28/2008 |
| 7439178 | Technique for stable processing of thin/fragile substrates A semiconductor on insulator (SOI) wafer includes a semiconductor substrate having first and second main surfaces opposite to each other. A dielectric layer is disposed on at least a portion of the first main surface of the semiconductor substrate. A device layer ha... | 10/21/2008 |
| 7436066 | Semiconductor element It is an object of the present invention to provide a highly reliable and high-quality semiconductor element by effectively preventing the migration of silver to a nitride semiconductor when an electrode main entirely or mostly of silver having high reflection effic... | 10/14/2008 |
| 7435679 | Alloyed underlayer for microelectronic interconnects Apparatus and methods of fabricating a microelectronic interconnect having an underlayer which acts as both a barrier layer and a seed layer. The underlayer is formed by co-depositing a noble metal and a barrier material, such as a refractory metal, or formed during... | 10/14/2008 |
| 7435678 | Method of depositing noble metal electrode using oxidation-reduction reaction Provided is a method of depositing a noble metal layer using an oxidation-reduction reaction. The method includes flowing a noble metal source gas, an oxidizing gas, and a reducing gas into a reaction chamber; and generating plasma in the reaction chamber to form a ... | 10/14/2008 |
| 7432202 | Method of substrate manufacture that decreases the package resistance A method includes forming a coating on a land contact of a package substrate, the coating including a first material disposed between a first layer and a second layer, each of the first layer and the second layer being made of a second material including gold. An ap... | 10/07/2008 |
| 7410900 | Metallisation This invention relates to photosensitive organometallic compounds which are used in the production of metal deposits. In particular, this invention relates to photosensitive organometallic compounds such as bis-(perfluoropropyl)-1,5-cyclooctadiene platinum (II) (i.e... | 08/12/2008 |
| 7405153 | Method for direct electroplating of copper onto a non-copper plateable layer A process for the formation of an interconnect in a semiconductor structure including the steps of forming a dielectric layer on a substrate, forming a first barrier layer on the dielectric layer, forming a second barrier layer on the first barrier layer, wherein th... | 07/29/2008 |
| 7400042 | Substrate with adhesive bonding metallization with diffusion barrier A metallization layer that includes a tantalum layer located on the component, a tantalum silicide layer located on the tantalum layer, and a platinum silicide layer located on the tantalum silicide layer. In another embodiment the invention is a component having a ... | 07/15/2008 |
| 7396766 | Low-temperature chemical vapor deposition of low-resistivity ruthenium layers A low-temperature chemical vapor deposition process for depositing of a low-resistivity ruthenium metal layers that can be used as barrier/seed layers in Cu metallization schemes. The method includes providing a substrate in a process chamber of a deposition system,... | 07/08/2008 |
| 7393785 | Methods and apparatus for forming rhodium-containing layers A method of forming a rhodium-containing layer on a substrate, such as a semiconductor wafer, using complexes of the formula LyRhYz is provided. Also provided is a chemical vapor co-deposited platinum-rhodium alloy barriers and electrodes for c... | 07/01/2008 |
| 7390678 | Method for fabricating semiconductor device A PLZT film (30) is formed as the material film of a capacitor dielectric film and a top electrode film (31) is formed on the PLZT film (30). The top electrode film (31) comprises two IrOx films having different composition. Su... | 06/24/2008 |
| 7365005 | Method for filling of a recessed structure of a semiconductor device This invention relates to process sequence by high-speed atomic layer chemical vapor processing that includes deposition for diffusion barriers in the etched features on substrate followed by gap fill and subsequent in-situ removal of the blanket films on the top by... | 04/29/2008 |
| 7365441 | Semiconductor device fabricating apparatus and semiconductor device fabricating method A semiconductor device fabricating method comprises a substrate forming step of forming a plurality of separate conductive pads 20 on an adhesive layer included in an adhesive sheet 50, and a semiconductor chip mounting step of bonding semiconductor ch... | 04/29/2008 |
| 7364965 | Semiconductor device and method of fabrication A semiconductor device having a DRAM has a capacitor in which a dielectric film and an upper electrode are laminated on a lower electrode comprising a polysilicone, in which a natural oxide film oxidized by oxygen in the atmosphere grows to at least 1.5 nm on the su... | 04/29/2008 |
| 7358188 | Method of forming conductive metal silicides by reaction of metal with silicon The invention includes methods of forming conductive metal silicides by reaction of metal with silicon. In one implementation, such a method includes providing a semiconductor substrate comprising an exposed elemental silicon containing surface. At least one of a ni... | 04/15/2008 |
| 7351655 | Copper interconnect systems which use conductive, metal-based cap layers An integrated circuit (IC) may include a substrate, a first dielectric layer adjacent the substrate, and at least one trench in the first dielectric layer. The IC may also include a metal liner within the at least one trench, and a first conductive region including ... | 04/01/2008 |
| 7351652 | Method of manufacturing semiconductor device A method of manufacturing a semiconductor device includes providing a semiconductor substrate on which a plurality of transistors are defined; forming a wiring pattern over the transistors, the wiring pattern contacting at least one transistor; depositing a first ox... | 04/01/2008 |
| 7344982 | System and method of selectively depositing Ruthenium films by digital chemical vapor deposition A chemical vapor deposition reaction system converts a reactant precursor, which includes the metal Ruthenium, to a vapor during a chemical reaction in order to deposit the metal on a semiconductor wafer. The reactant precursor is Bis(2,2,6,6-tetramethyl-3,5-heptane... | 03/18/2008 |
| 7341907 | Single wafer thermal CVD processes for hemispherical grained silicon and nano-crystalline grain-sized polysilicon Methods for depositing hemispherical grained silicon layers and nanocrystalline grain-sized polysilicon layers are provided. The hemispherical grained silicon layers and nanocrystalline grain-sized polysilicon layers are deposited in single substrate chemical vapor ... | 03/11/2008 |
| 7341946 | Methods for the electrochemical deposition of copper onto a barrier layer of a work piece Methods are provided for electrochemically depositing copper on a work piece. One method includes the step of depositing overlying the work piece a barrier layer having a surface and subjecting the barrier layer surface to a surface treatment adapted to facilitate d... | 03/11/2008 |
| 7341947 | Methods of forming metal-containing films over surfaces of semiconductor substrates The invention includes a method of forming a metal-containing film over a surface of a semiconductor substrate. The surface is exposed to a supercritical fluid. The supercritical fluid has H2, at least one H2-activating catalyst, and at least o... | 03/11/2008 |
| 7338884 | Interconnecting substrate for carrying semiconductor device, method of producing thereof and package of semiconductor device An interconnecting substrate for carrying a semiconductor device, comprising: an insulating layer; an interconnection set on an obverse surface of the insulating layer; an electrode which is set on a reverse surface side of the insulating layer and formed in such a ... | 03/04/2008 |
| 7335591 | Method for forming three-dimensional structures on a substrate A method of forming a resist layer on a non-planar surface of a substrate includes placing the non-planar surface into an electrophoretic resist. While the non-planar surface is in the electrophoretic resist, an electrical voltage is applied between the substrate an... | 02/26/2008 |
| 7332435 | Silicide structure for ultra-shallow junction for MOS devices A method of forming a semiconductor device comprising: forming a gate dielectric layer over a channel region; forming a gate electrode on the gate dielectric layer; forming source/drain regions substantially aligned with respective edges of the gate electrode with t... | 02/19/2008 |
| 7326602 | Fabricating method of a thin film transistor array A fabricating method of the thin film array is provided. The thin film transistor array includes a substrate, a plurality of scan lines, a plurality of data lines, a plurality of thin film transistors, an etch barrier layer and a plurality of pixel electrodes. The s... | 02/05/2008 |
| 7312150 | Method of forming cobalt disilicide layer and method of manufacturing semiconductor device using the same A method of forming a cobalt disilicide layer and a method of manufacturing a semiconductor device using the same are provided. The method of forming a cobalt disilicide layer includes forming a cobalt layer on at least a silicon surface of a semiconductor device us... | 12/25/2007 |
| 7302982 | Label applicator and system A label applicator including a support surface having a central area and curving downwardly from the central area. A post assembly extends up from the central area such that a label having a label through-hole can be positioned in a support position generally on the... | 12/04/2007 |
| 7300815 | Method for fabricating a gold contact on a microswitch Described is a process to pattern adhesion and top contact layers in such a way that at least some portion of the top contact layers overlaps the adhesion layer, while another portion of the top contact layer overlaps with the bottom contacts, but does not overlap w... | 11/27/2007 |
| 7285196 | Methods and apparatus for making integrated-circuit wiring from copper, silver, gold, and other metals In recent years, copper wiring has emerged as a promising substitute for the aluminum wiring in integrated circuits, because copper offers lower electrical resistance and better reliability at smaller dimensions than aluminum. However, use of copper typically requir... | 10/23/2007 |
