Did You Know...
...that when IBM conducted a market study of Chester Carlson's invention in 1959, the company concluded that it would take only 5000 units of his new product to saturate the market? IBM therefore declined to be part of the new product introduction. Too bad for IBM. Carlson's invention was the xerography process, and his new product was the beginning of the Xerox Corporation. It is estimated that every day, worldwide, 3,000,000,000 copies are made!!
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| Number | Title | Issue Date |
| 6602786 | One-step process for forming titanium silicide layer on polysilicon A single rapid thermal anneal (RTA) process is used to form a low resistivity titanium silicide layer atop a polysilicon gate layer for a MOSgated device. The process employs an amorphous silicon layer formed atop the polysilicon layer, followed by formin... | 08/05/2003 |
| 6599831 | Metal gate electrode using silicidation and method of formation thereof A semiconductor device is fabricated by providing a substrate, and providing a dielectric layer on the substrate. A polysilicon body is formed on the dielectric layer, and a metal layer is provided on the polysilicon body. A silicidation process is undert... | 07/29/2003 |
| 6599832 | Silicide pattern structures and methods of fabricating the same Silicide interfaces for integrated circuits, thin film devices, and backend integrated circuit testing devices are formed using a barrier layer, such as titanium nitride, disposed over a porous, thin dielectric layer which is disposed between a silicon-co... | 07/29/2003 |
| 6596615 | Semiconductor device and method of manufacturing the same A sidewall oxide layer and a sidewall insulation layer are formed to cover the edge portion of an SOI layer. A channel stopper region is formed in the vicinity of the edge portion of the SOI layer. A protruded insulation layer is formed on the channel sto... | 07/22/2003 |
| 6593217 | Method of manufacturing semiconductor device A semiconductor device with low contact resistance which can cope with the miniaturization of semiconductor devices as well as a manufacturing method thereof which is easy and inexpensive can be obtained. Impurity regions on an Si substrate, an interlayer... | 07/15/2003 |
| 6593219 | Method for fabricating electrode structure and method for fabricating semiconductor device A first metal film of a first metal is deposited on a silicon-containing film containing silicon as a principal constituent, and a second metal film of a nitride of a second metal is deposited on the first metal film. Thereafter, a metal film with a high ... | 07/15/2003 |
| 6593234 | Methods of utilizing metal rich silicide in forming semiconductor constructions The invention includes a method of forming a semiconductor construction. A metal-rich metal silicide layer is formed on a silicon-comprising substrate, and a metal nitride layer is formed on the metal-rich metal silicide layer. The metal-rich metal silici... | 07/15/2003 |
| 6586321 | Method for forming metal silicide layer A method of forming a metal silicide layer with low resistance, with minimal consumption of silicon, includes depositing a first metal layer over a silicon-containing region, depositing a second metal layer over the first metal layer, forming an antioxida... | 07/01/2003 |
| 6586331 | Low sheet resistance of titanium salicide process A method for establishing low sheet resistance for the Titanium Salicide process that teaches a C-54 TiSix process by means of an additional vacuum bake. The present invention teaches an additional vacuum bake step prior to pre-metal HF dip dur... | 07/01/2003 |
| 6586345 | Method of manufacturing a semiconductor device wiring layer having an oxide layer between the polysilicon and silicide layers In forming a conduction film in a semiconductor device, after an uneven natural oxide film on a silicon film has been once removed, an even and clean silicon oxide film is formed by an oxidizing chemical solution treatment. After that, a silicide film is ... | 07/01/2003 |
| 6586332 | Deep submicron silicide blocking A method for blocking formation of a reacted metal layer on a structure in an integrated circuit. The integrated circuit has a source region, a drain region, a gate, an isolation area formed of a material, and a protective layer formed of substantially th... | 07/01/2003 |
| 6582757 | Method for tungsten deposition without fluorine-contaminated silicon substrate A method for forming tungsten structures over silicon substrates, including the following steps. A silicon substrate is having a patterned dielectric layer formed thereon defining a tungsten structure opening is provided. The silicon substrate is pre-heat... | 06/24/2003 |
| 6583042 | Semiconductor method of making electrical connection between an electrically conductive line and a node location, and integrated circuitry A semiconductor processing method of making electrical connection between an electrically conductive line and a node location includes, a) forming an electrically conductive line over a substrate, the substrate having an outwardly exposed silicon containi... | 06/24/2003 |
| 6583059 | Semiconductor device and method of manufacturing the same A method of manufacturing a semiconductor device comprises the steps of: (a) forming a thermal oxide film on a surface of a silicon layer; (b) removing the thermal oxide film; and (c) forming a silicide film on the resulting surface of the silicon layer.... | 06/24/2003 |
| 6583012 | Semiconductor devices utilizing differently composed metal-based in-laid gate electrodes MOS transistor and CMOS devices comprising a plurality of transistors including in-laid, metal-based gate electrodes of different composition are formed by a process comprising: depositing a first blanket layer of a first metal filling openings in an insu... | 06/24/2003 |
| 6583052 | Method of fabricating a semiconductor device having reduced contact resistance A method of fabricating a semiconductor device having the steps of forming an isolation layer in a silicon substrate to define an active region and a device isolation region; forming a junction region in the active region of the silicon substrate; forming... | 06/24/2003 |
| 6573180 | PECVD method of forming a tungsten silicide layer on a polysilicon layer A semiconductor substrate having a polysilicon layer is loaded into a process chamber of a plasma enhanced chemical vapor deposition device. A silicon source gas, a tungsten source gas, and a hydrogen compound gas for reducing a chlorine radical are intro... | 06/03/2003 |
| 6569759 | Semiconductor device having interconnection implemented by refractory metal nitride layer and refractory metal silicide layer and process of fabrication thereof A semiconductor integrated circuit device is implemented by circuit components and a multi-layered wiring structure, and titanium nitride is used for a part of the integrated circuit such as a conductive plug, an accumulating electrode and a conductive li... | 05/27/2003 |
| 6566213 | Method of fabricating multi-thickness silicide device formed by disposable spacers A transistor device formed on a semiconductor-on-insulator (SOI) substrate with a buried oxide (BOX) layer disposed thereon and an active layer disposed on the BOX layer having active regions defined by isolation trenches. The device includes a gate defin... | 05/20/2003 |
| 6566214 | Method of making a semiconductor device by annealing a metal layer to form metal silicide and using the metal silicide as a hard mask to pattern a polysilicon layer A method of making a semiconductor device is provided. A polysilicon layer is formed over a substrate and a metal layer is formed on the polysilicon layer. The metal layer and the polysilicon layer are annealed to form a metal silicide layer on the polysi... | 05/20/2003 |
| 6566257 | Method for producing semiconductor device A semiconductor device is produced by forming a gate electrode on a semiconductor substrate, and by then forming source/drain regions by an ion implantation using the gate electrode as a mask. A suicide film is formed on at least the surface of the gate e... | 05/20/2003 |
| 6558739 | Titanium nitride/titanium tungsten alloy composite barrier layer for integrated circuits A method for forming a barrier layer upon an electrode contact. There is first provided a silicon substrate layer having an electrode contact region formed within the silicon substrate layer. There is then formed over the silicon substrate layer a titaniu... | 05/06/2003 |
| 6551913 | Method for fabricating a gate electrode of a semiconductor device The present invention relates to a semiconductor technology and more specifically to a method of fabricating a gate electrode of a semiconductor device, where a re-oxidation process that may cause an abnormal oxidation can be eliminated. In a polysilicon/... | 04/22/2003 |
| 6551928 | Method of forming a semiconductor device with a multi-layer WSix film with small grain size structure A method of forming a semiconductor device with a polysilicon layer having a multi-layer tungsten-silicide (WSix) film formed on a surface thereof includes the steps of (1) forming a first layer of tungsten-silicide on the surface of the polysi... | 04/22/2003 |
| 6548389 | Semiconductor device and method for fabricating the same After an insulating film serving as a gate insulating film is formed on a semiconductor substrate, a titanium nitride film is deposited by chemical vapor deposition on the insulating film. Then, a tungsten film is deposited by sputtering on the titanium n... | 04/15/2003 |
| 6544887 | Polycide etch process A method for etching contact openings into a polycide layer including a metal silicide layer and a polysilicon layer comprises providing a substrate that includes a polycide layer, forming a patterned photoresist mask, and etching with a series of plasmas... | 04/08/2003 |
| 6537909 | Method of preventing silicide spiking A polysilicon layer is formed on a semiconductor substrate followed by performing a collimator physical vapor deposition (PVD) process to form a titanium nitride layer on the polysilicon layer. A rapid thermal nitridation (RTN) process is then performed t... | 03/25/2003 |
| 6534400 | Method for depositing a tungsten silicide layer Disclosed is a method for depositing a tungsten silicide layer on a wafer coated with a polysilicon layer in a CVD process chamber. A surface of the polysilicon layer is pre-treated by introducing a hydrogen compound gas including any elements among group... | 03/18/2003 |
| 6535413 | Method of selectively forming local interconnects using design rules The invention includes a method of fabricating a circuit in a manner to place certain structures within a predefined distance of one another. Electrical connections are formed between certain structures of silicon, by annealing a conductive material to ca... | 03/18/2003 |
| 6531393 | Salicide integrated solution for embedded virtual-ground memory A salicide integrate solution for embedded virtual-ground memory of the present invention provides a controlled distance between poly gates. In this way, the spacers formed on the sidewalls of the poly gates become self fill-upon spacers, and the surface ... | 03/11/2003 |
| 6531394 | Method for forming gate electrode of semiconductor device A method for forming a gate electrode of a semiconductor device, which improves thermal stability of a tungsten/polysilicon structure. The method for forming a gate electrode of a semiconductor device includes: sequentially forming a first insulating film... | 03/11/2003 |
| 6528401 | Method for fabricating polycide dual gate in semiconductor device Method for fabricating a polycide dual gate in a semiconductor device fabricates a dual gate having polycide gate electrodes. The polycide can be a cobalt polycide, for example. The method can include forming polysilicon pattern layers on a first and a se... | 03/04/2003 |
| 6528422 | Method to modify 0.25μm 1T-RAM by extra resist protect oxide (RPO) blocking A method to fabricate a 1T-RAM device, comprising the following steps. A semiconductor substrate having an access transistor area and an exposed bottom plate within a capacitor area proximate the access transistor area is provided. A gate with an underlyi... | 03/04/2003 |
| 6528421 | Method for forming silicide A method for forming silicide, at least includes following steps: provide substrate which is covered by semiconductor structure with a rugged topography; form silicon layer on semiconductor structure, where topography of silicon layer is similar to rugged... | 03/04/2003 |
| 6524953 | Asymmetric, double-sided self-aligned silicide and method of forming the same Disclosed are structures and processes which are related to asymmetric, self-aligned silicidation in the fabrication of integrated circuits. A pre-anneal contact stack includes a silicon substrate, a metal source layer such as titanium-rich titanium nitri... | 02/25/2003 |
| 6521528 | Semiconductor device and method of making thereof A semiconductor device includes a semiconductor substrate having a first and a second region, a first wiring layer including a lower layer having polycrystal silicon portions including impurities at a high concentration and formed over the first region of... | 02/18/2003 |
| 6521550 | Process for manufacturing semiconductor integrated circuit device including treatment of gas used in the process In a gas-phase treating process of a semiconductor wafer using hydrogen, there is provided a technique for safely eliminating the hydrogen in an exhaust gas discharged from a gas-phase treating apparatus. The profile at the end portions of the side walls ... | 02/18/2003 |
| 6518155 | Device structure and method for reducing silicide encroachment A semiconductor device having a novel spacer structure and method of fabrication. The present invention describes a semiconductor device which has an electrode with a first thickness. A silicide layer having a second thickness is formed on the electrode. ... | 02/11/2003 |
| 6518178 | Method for forming a field effect transistor having increased breakdown voltage A method of fabricating bipolar junction transistors particularly suitable for electrostatic discharge protection and high voltage MOSFETs. In accordance with the invention, a mask covers bird's beaks formed between field oxide layers and doped regions of... | 02/11/2003 |
| 6514859 | Method of salicide formation with a double gate silicide A method of forming a self-aligned silicide (salicide) with a double gate silicide. The method improves transistor speed by lowering the leakage current in the source and drain areas and lowering the polysilicon sheet resistance of the gate. As a result o... | 02/04/2003 |
