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| Number | Title | Issue Date |
| 8187970 | Process for forming cobalt and cobalt silicide materials in tungsten contact applications Methods for forming cobalt silicide materials are disclosed herein. In one example, a method for forming a cobalt silicide material includes exposing a substrate having a silicon-containing material to either a wet etch solution or a pre-clean plasma during a first ... | 05/29/2012 |
| 8148262 | Method for manufacturing semiconductor device A method of manufacturing a semiconductor device includes forming a gate electrode, a source region and a drain region, forming a first metal layer, forming silicide layers by first annealing, removing a remainder of the first meta... | 04/03/2012 |
| 8017519 | Semiconductor device and manufacturing method thereof Disclosed is a semiconductor device including: a substrate; a wiring layer formed on the substrate and made of copper or a copper alloy; a copper diffusion barrier film formed on the wiring layer and made of an amorphous carbon film formed by CVD using a processing ... | 09/13/2011 |
| 8008194 | Method of manufacturing semiconductor device The semiconductor manufacturing method comprises the step of forming a metal alloy film of an alloy of a metal of Ni or others and a noble metal over a semiconductor substrate containing a region where silicon is partially exposed; the step of selectively reacting t... | 08/30/2011 |
| 7968457 | Sandwiched metal structure silicidation for enhanced contact Embodiments of an apparatus and methods for forming enhanced contacts using sandwiched metal structures are generally described herein. Other embodiments may be described and claimed. ... | 06/28/2011 |
| 7964500 | Method of manufacturing semiconductor integrated circuit device To solve a problem that it becomes difficult to lower contact resistance between nickel-based metal silicide and metal for contact as the result of the miniaturization of the hole. One invention of the present application is a method of manufacturing a semiconductor... | 06/21/2011 |
| 7960280 | Process method to fully salicide (FUSI) both N-poly and P-poly on a CMOS flow An improved method of forming a fully silicided (FUSI) gate in both NMOS and PMOS transistors of the same MOS device is disclosed. In one example, the method comprises forming a first silicide in at least a top portion of a gate electrode of the PMOS devices and not... | 06/14/2011 |
| 7867898 | Method forming ohmic contact layer and metal wiring in semiconductor device A method of forming an ohmic contact layer including forming an insulation layer pattern on a substrate, the insulation pattern layer having an opening selectively exposing a silicon bearing layer, forming a metal layer on the exposed silicon bearing layer using an ... | 01/11/2011 |
| 7867899 | Wordline resistance reduction method and structure in an integrated circuit memory device Methods and structures for reducing resistance in wordlines of an integrated circuit memory device are disclosed. In one embodiment, the method includes forming multiple columns of polycrystalline silicon for respective number of wordlines, forming core transistor j... | 01/11/2011 |
| 7867900 | Aluminum contact integration on cobalt silicide junction Embodiments herein provide methods for forming an aluminum contact on a cobalt silicide junction. In one embodiment, a method for forming materials on a substrate is provided which includes forming a cobalt silicide layer on a silicon-containing surface of the subst... | 01/11/2011 |
| 7863186 | Fully and uniformly silicided gate structure and method for forming same Fully and uniformly silicided gate conductors are produced by deeply “perforating” silicide gate conductors with sub-lithographic, sub-critical dimension, nanometer-scale openings. A silicide-forming metal (e.g. cobalt, tungsten, etc.) is then deposited, polysil... | 01/04/2011 |
| 7781337 | Forming method of silicide film A manufacturing method of a semiconductor device includes forming a cobalt film on a silicon substrate on which a diffusion layer is formed, forming a titanium film on the cobalt film using a titanium target that has a surface from which a nitride film has previousl... | 08/24/2010 |
| 7767579 | Protection of SiGe during etch and clean operations A method of making a semiconductor device includes forming a transistor structure having one of an embedded epitaxial stressed material in a source and drain region and a stressed channel and well, subjecting the transistor structure to plasma oxidation, and removin... | 08/03/2010 |
| 7741217 | Dual workfunction silicide diode A CMOS diode and method of making it are disclosed. In one embodiment, the diode comprises a silicon substrate having an N doped region and a P doped region. A first silicide region is formed on the N doped region of the silicon substrate, and a second silicide regi... | 06/22/2010 |
| 7666786 | Methods of fabricating semiconductor devices having a double metal salicide layer A semiconductor device is fabricated by forming a gate electrode structure, comprising a gate oxide layer pattern, a polysilicon layer pattern, and sidewall spacers on a silicon substrate, forming source/drain regions on both sides of the gate electrode structure in... | 02/23/2010 |
| 7629254 | Semiconductor device Embodiments relater to a semiconductor device and a method of fabricating the same. A source/drain area may be formed by using the spacer having the dual structure of the oxide layer and nitride layer. After etching a part of the oxide layer, the salicide layer may ... | 12/08/2009 |
| 7618891 | Method for forming self-aligned metal silicide contacts The present invention relates to a method for forming self-aligned metal silicide contacts over at least two silicon-containing semiconductor regions that are spaced apart from each other by an exposed dielectric region. Preferably, each of the self-aligned metal si... | 11/17/2009 |
| 7585767 | Semiconductor device and method for fabricating the same A gate electrode is formed on a silicon substrate, and then source/drain regions are formed at both sides of the gate electrode in the silicon substrate. Thereafter, an alloyed silicide layer is formed on the source/drain regions. The step of forming the alloyed sil... | 09/08/2009 |
| 7550381 | Contact clean by remote plasma and repair of silicide surface Method for recovering treated metal silicide surfaces or layers are provided. In at least one embodiment, a substrate having an at least partially oxidized metal silicide surface disposed thereon is cleaned to remove the oxidized regions to provide an altered metal ... | 06/23/2009 |
| 7538029 | Method of room temperature growth of SiOon silicide as an etch stop layer for metal contact open of semiconductor devices Silicide is protected during MC RIE etch by first forming an oxide film over the silicide and, after performing MC RIE etch, etching the oxide film. The oxide film is formed from a film of alloyed metal-silicon (M-Si) on the layer of silicide, then wet etching the m... | 05/26/2009 |
| 7482270 | Fully and uniformly silicided gate structure and method for forming same Fully and uniformly silicided gate conductors are produced by deeply “perforating” silicide gate conductors with sub-lithographic, sub-critical dimension, nanometer-scale openings. A silicide-forming metal (e.g. cobalt, tungsten, etc.) is then deposited, polysil... | 01/27/2009 |
| 7432184 | Integrated PVD system using designated PVD chambers A method for making a film stack containing one or more metal-containing layers and a substrate processing system for forming the film stack on a substrate are provided. The substrate processing system includes at least one transfer chamber coupled to at least one l... | 10/07/2008 |
| 7429770 | Semiconductor device and manufacturing method thereof A technique capable of reducing threshold voltage and reducing high-temperature heat treatment after forming a gate electrode is provided. An n-type MIS transistor or a p-type MIS transistor is formed on an active region isolated by an element isolation region of a ... | 09/30/2008 |
| 7419907 | Eliminating metal-rich silicides using an amorphous Ni alloy silicide structure The present invention provides a method for producing thin nickel (Ni) monosilicide or NiSi films (having a thickness on the order of about 30 nm or less), as contacts in CMOS devices wherein an amorphous Ni alloy silicide layer is formed during annealing which elim... | 09/02/2008 |
| 7411254 | Semiconductor substrate The invention includes methods of forming conductive metal silicides by reaction of metal with silicon. In one implementation, such a method includes providing a semiconductor substrate comprising an exposed elemental silicon containing surface. At least one of a cr... | 08/12/2008 |
| 7407880 | Semiconductor device and manufacturing process therefore A semiconductor device which can prevent a leak current between a silicide layer on a polysilicon and another part, as well as a manufacturing process therefor. The semiconductor device includes neighboring n- and p-type polysilicons; and a silicide layer thereon ex... | 08/05/2008 |
| 7407882 | Semiconductor component having a contact structure and method of manufacture A semiconductor component having a titanium silicide contact structure and a method for manufacturing the semiconductor component. A layer of dielectric material is formed over a semiconductor substrate. An opening having sidewalls is formed in the dielectric layer ... | 08/05/2008 |
| 7405101 | CMOS imager with selectively silicided gate The invention also relates to an apparatus and method for selectively providing a silicide coating over the transistor gates of a CMOS imager to improve the speed of the transistor gates. The method further includes an apparatus and method for forming a self aligned... | 07/29/2008 |
| 7405112 | Low contact resistance CMOS circuits and methods for their fabrication A low contact resistance CMOS integrated circuit and method for its fabrication are provided. The CMOS integrated circuit comprises a first transition metal electrically coupled to the N-type circuit regions and a second transition metal different than the first tra... | 07/29/2008 |
| 7400042 | Substrate with adhesive bonding metallization with diffusion barrier A metallization layer that includes a tantalum layer located on the component, a tantalum silicide layer located on the tantalum layer, and a platinum silicide layer located on the tantalum silicide layer. In another embodiment the invention is a component having a ... | 07/15/2008 |
| 7399701 | Semiconductor device manufacturing method including forming a metal silicide layer on an indium-containing layer The present invention provides a semiconductor device manufacturing method of a semiconductor device having a contact plug, in which a contact hole formed by a surface portion of a high-concentration N-type diffusion layer formed on a semiconductor silicon substrate... | 07/15/2008 |
| 7399702 | Methods of forming silicide Methods of fully siliciding semiconductive materials of semiconductor devices are disclosed. A preferred embodiment comprises depositing an alloy comprised of a first metal and a second metal over a semiconductive material. The device is heated, causing atoms of the... | 07/15/2008 |
| 7396764 | Manufacturing method for forming all regions of the gate electrode silicided The technology which can improve the performance of a MOS transistor in which all the regions of the gate electrode were silicided is offered. A gate insulating film and a gate electrode of an nMOS transistor are laminated and formed in this order on a semico... | 07/08/2008 |
| 7396724 | Dual-hybrid liner formation without exposing silicide layer to photoresist stripping chemicals Methods of fabricating a semiconductor device including a dual-hybrid liner in which an underlying silicide layer is protected from photoresist stripping chemicals by using a hard mask as a pattern during etching, rather than using a photoresist. The hard mask preve... | 07/08/2008 |
| 7384877 | Technique for reducing silicide defects by reducing deleterious effects of particle bombardment prior to silicidation By reducing the effect of particle bombardment during the sequence for forming a metal silicide in semiconductor devices, the defect rate and the metal silicide uniformity may be enhanced. For this purpose, the metal may be deposited without an immediately preceding... | 06/10/2008 |
| 7378344 | Method of manufacturing a semiconductor device including a silicide layer having an NiSi phase provided on source and drain regions A method for manufacturing a MOSFET equipped with a silicide layer over shallow source and drain junctions without leakage generation is provided. By restricting the temperature of manufacturing steps after the silicide formation below a critical temperature Tc, whi... | 05/27/2008 |
| 7371667 | Semiconductor device and method of fabricating same There are disclosed TFTs that have excellent characteristics and can be fabricated with a high yield. The TFTs are fabricated, using an active layer crystallized by making use of nickel. Gate electrodes are comprising tantalum. Phosphorus is introduced into source/d... | 05/13/2008 |
| 7364995 | Method of forming reduced short channel field effect transistor A method for manufacturing a semiconductor device capable of reducing a short channel effect, whereby the semiconductor device includes a pair of impurity regions for a source and a drain formed on a semiconductor substrate, a gate having a gate electrode used to co... | 04/29/2008 |
| 7364963 | Method for fabricating semiconductor device A method for fabricating a semiconductor device is provided. The method includes: implanting impurities onto a substrate by performing an ion implantation process; recessing portions of the substrate to form a plurality of trenches; performing a first thermal proces... | 04/29/2008 |
| 7354854 | Nickel silicide method and structure Nickel silicide contact regions are formed on a source (2), drain (3) and polycrystalline silicon gate (5) of an integrated circuit transistor by annealing it after a nickel layer has been deposited on the source, drain, and gate, with no cap la... | 04/08/2008 |