Class 438/649 - Silicide

Subclass of Class 438 - Semiconductor device manufacturing: process
Definition: Processes for forming a conductive layer using the chemical
No. of patents: 596
Last issue date: 12/27/2011

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Number	Title	Issue Date
4983543	Method of manufacturing a semiconductor integrated circuit having an interconnection wire embedded in a protective layer covering the semiconductor integrated circuit A method of manufacturing a semiconductor integrated circuit comprises steps of forming at least one semiconductor device on a substrate, depositing an insulator layer on the substrate so as to bury the semiconductor device, providing a contact hole throu...	01/08/1991
4962414	Method for forming a contact VIA A method for forming a connection between two levels in a semiconductor structure includes first forming a VIA (14) through an insulating layer (12) to an underlying structure (10). Sidewall spacers (22) and (24) are formed on the vertical walls of the VI...	10/09/1990
4935376	Making silicide gate level runners Integrated circuits are fabricated with thick self-aligned silicide runners on the field oxide by etching back the first dielectric to expose patterned polysilicon on the field oxide and then forming a silicide on the patterned polysilicon....	06/19/1990
4924294	Structure and method for selectively producing a conductive region on a substrate In a multi-chip module, a structure for selectively connecting two conductors. A switchable connector (36) is disposed between a first and second portion (30,32) of a copper conductor (28). The switchable connector comprises an amorphous silicon layer (58...	05/08/1990
4914056	Method of manufacturing a semiconductor device having tapered pillars A method of manufacturing a semiconductor device having multi-layer structure with tapered pillars containing a refractory metal used for connecting interconnection layers. An aluminum containing layer is formed on the semiconductor substrate and a refrac...	04/03/1990
4897287	Metallization process for an integrated circuit A simple method for forming a metallization for an integrated circuit comprises depositing on a silicon substrate a first layer of refractory metal and nitrogen solid mixture and depositing thereon a second layer of refractory metal. The resulting structu...	01/30/1990
4873205	Method for providing silicide bridge contact between silicon regions separated by a thin dielectric A method for forming a silicide bridge bewteen a diffusion region and an adjacent poly-filled trench separated by a thin dielectric. Silicon is selectively grown over exposed silicon regions under conditions that provide controlled lateral growth over the...	10/10/1989
4873204	Method for making silicide interconnection structures for integrated circuit devices A method for forming a contact to a selective region of an integrated circuit characterized by the steps of: forming a layer of refractory metal over and around the selected region; forming a layer of amorphous silicon over the layer of refractory metal; ...	10/10/1989
4851369	Method of establishing a structure of electrical interconnections on a silicon semiconductor device After having formed contact islands (20) comprising at least one layer of silicide (20) of titanium or cobalt, these islands are covered by a complementary metallic layer (30) obtained by selective growth of tungsten or molybdenum, which is localized at t...	07/25/1989
4851295	Low resistivity tungsten silicon composite film A composite film is provided which has a first layer of WSix, where x is greater than 2, over which is disposed a second layer of a tungsten complex consisting substantially of tungsten with a small amount of silicon therein, typically less tha...	07/25/1989
4849363	Integrated circuit having laser-alterable metallization layer An integrated circuit and a method of altering such an integrated circuit (e.g., during final testing of the circuit) are disclosed. The method can be used to program a circuit, wire around defective portions of a circuit, or otherwise permanently alter a...	07/18/1989
4822753	Method for making a w/tin contact A method is disclosed for fabricating a semiconductor device and especially for contacting a semiconductor device. A silicon substrate is provided which has a device region formed at the surface thereof and which is contacted with a silicide. An insulatin...	04/18/1989
4818723	Silicide contact plug formation technique An integrated circuit fabrication process for improving step coverage of the metal lines and of metal layer interconnections is disclosed. A conductive polysilicon, polycide, or polycide-on-polysilicon plug is formed in contact apertures by successive sil...	04/04/1989
4812419	Via connection with thin resistivity layer A via connection and method for making the same for integrated circuits having multiple layers of electrically conductive interconnect lines separated by an insulative layer. The via connection is characterized by a very thin layer of high resistivity mat...	03/14/1989
4804636	Process for making integrated circuits having titanium nitride triple interconnect Disclosed is a process for making VLSI integrated circuits and a local interconnect system, wherein first poly, second poly and moat are all interconnected in any desired pattern by a TiN local interconnect. No masks are required beyond those which would ...	02/14/1989
4800177	Semiconductor device having multilayer silicide contact system and process of fabrication thereof A process for making a semiconductor device including a semiconductor layer heavily doped to a predetermined dopant concentration and a multilayer contact system in contact with a surface portion of the heavily doped semiconductor layer, the multilayer co...	01/24/1989
4796081	Low resistance metal contact for silicon devices A three-layer metal contact including aluminum is provided for silicon-based semiconductor devices to minimize the effects of formation of silicon precipitates in the aluminum layer and low contact junction leakage. The metal contact comprises a first lay...	01/03/1989
4793896	Method for forming local interconnects using chlorine bearing agents A method for etching titanium nitride local interconnects is disclosed. A layer of titanium nitride is formed as a by-product of the formation of titanium silicide by direct reaction; this layer of titanium nitride is present over the titanium silicide la...	12/27/1988
4782380	Multilayer interconnection for integrated circuit structure having two or more conductive metal layers Construction of a novel multilayer conductive interconnection for an integrated circuit having more than one conductive layer is disclosed comprising a lower barrier layer which may be in contact with an underlying silicon substrate and comprising a mater...	11/01/1988
4746219	Local interconnect A local interconnect system for VLSI integrated circuits. After titanium is deposited for self-aligned silicidation of exposed moat and gate regions in a nitrogen atmosphere, a hardmask is deposited and patterned over the titanium. When a conductive titan...	05/24/1988
4744861	Method of producing semiconductor device using reactive ion etching A method of producing a semiconductor device comprises the steps of forming on a substrate a layer of a material selected from a group consisting of aluminum, aluminum alloy, titanium, polysilicon and a metal silicide, and carrying out a dry etching of th...	05/17/1988
4735680	Method for the self-aligned silicide formation in IC fabrication The invention discloses an improved process to form a silicide layer on an integrated circuit structure. The conventional lateral silicide growth is prevented by employing a slot configuration which is formed with the self-aligned process. It is simple to...	04/05/1988
4715109	Method of forming a high density vertical stud titanium silicide for reachup contact applications The disclosure relates to the formation of reachup contacts for VLSI integrated circuit interconnects wherein studs are formed of a conducting material which reaches up through subsequently applied insulating films or the like to contact metal patterns. T...	12/29/1987
4690730	Oxide-capped titanium silicide formation A cap oxide (or oxide/nitride) prevents silicon outdiffusion during the reaction step which forms direct-react titanium silicide....	09/01/1987
4635347	Method of fabricating titanium silicide gate electrodes and interconnections A method for constructing titanium silicide integrated circuit gate electrodes and interconnections is disclosed. The method finds particularly useful applications in metal-oxide semiconductor integrated circuit fabrication. Following standard active and ...	01/13/1987
4528744	Method of manufacturing a semiconductor device A method of manufacturing a semiconductor device which comprises the steps of forming an interconnection layer through an insulating film on a semiconductor substrate, and connecting the diffusion interconnection region in the surface portion of said subs...	07/16/1985
4507852	Method for making a reliable ohmic contact between two layers of integrated circuit metallizations A method of fabricating a semiconductor integrated circuit by providing a semiconductor body having a major surface; depositing a first layer of a conductive material on the major surface of the semiconductor body, and depositing a layer of a refractory s...	04/02/1985
4486266	Integrated circuit method A CMOS integrated circuit made up of complementary insulated gate field effect transistors incorporates isolation trenches formed by a combination of thermal growth of silicon dioxide and chemical vapor deposition of polycrystalline silicon to prevent air...	12/04/1984
4462149	Method for producing integrated MOS field effect transistors with an additional track level of metal silicides A method for producing integrated MOS field effect transistors, particularly complementary MOS field effect transistor circuits (CMOS-FET's) is provided wherein a metal silicide level, comprised preferably of tantalum silicide, is utilized as an additiona...	07/31/1984
4441246	Method of making memory cell by selective oxidation of polysilicon A dynamic read/write memory cell of the one transistor N-channel silicon gate type is made by an improved process employing selective oxidation of polysilicon using PN junction capacitors. A relatively flat surface results from the process, which is favor...	04/10/1984
4398335	Multilayer metal silicide interconnections for integrated circuits A process and resulting structure are disclosed for forming vias in integrated circuit structures using metal silicide interconnections. A lower conductor is formed by sequentially depositing silicon and a refractory metal which reacts with the silicon to...	08/16/1983
4381215	Method of fabricating a misaligned, composite electrical contact on a semiconductor substrate Disclosed is a method of fabricating an electrical contact to a region which lies at the surface of a semiconductor substrate and is doped opposite thereto. The method includes the steps of forming the combination of a silicide of a noble metal at the sur...	04/26/1983
4332839	Method for making integrated semiconductor circuit structure with formation of Ti or Ta silicide The compounds TiSi2 and TaSi2 have been found to be suitable substitutes for polysilicon layers in semiconductor integrated circuits. Suitable conducting properties of the compounds are ensured by providing a relatively thin substrat...	06/01/1982
4228212	Composite conductive structures in integrated circuits A composite conductive structure in integrated circuit devices is described. The composite conductive structure includes an insulating substrate on which is provided a conductor of a refractory metal substantially nonreactive with silicon dioxide. A layer...	10/14/1980
4215156	Method for fabricating tantalum semiconductor contacts A silicon semiconductor device having contacts which include tantalum. The tantalum is useful in particular for fabricating Schottky barrier diodes having a low barrier height. The method includes: precleaning the silicon substrate prior to depositing the...	07/29/1980
4075045	Method for fabricating FET one-device memory cells with two layers of polycrystalline silicon and fabrication of integrated circuits containing arrays of the memory cells charge storage capacitors utilizing five basic pattern deliberating steps Fabricating an integrated circuit array of FET one-device memory cells which includes providing a semiconductive substrate of a first conductive type; delineating field insulation regions; delineating polycrystalline silicon gate regions employing an oxid...	02/21/1978

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Class 438/649 - Silicide