Bizarre Patents
A banana protective device for storing and transporting a banana carefully.
PatentStorm News
Make the Most of Our Site
See this month's Top Inventors and Most Cited Patents.
Stay on top of the latest innovations by subscribing to an RSS feed.
Registered users: Manage your profile.
| Number | Title | Issue Date |
| 8183150 | Semiconductor device having silicon carbide and conductive pathway interface The present invention provides semiconductor device formed by an in situ plasma reducing process to reduce oxides or other contaminants, using a compound of nitrogen and hydrogen, typically ammonia, at relatively low temperatures prior to depositing a subsequent lay... | 05/22/2012 |
| 8178437 | Barrier material and process for Cu interconnect A semiconductor diffusion barrier layer and its method of manufacture is described. The barrier layer includes of at least one layer of TaN, TiN, WN, TbN, VN, ZrN, CrN, WC, WN, WCN, NbN, AlN, and combinations thereof. The barrier layer may further include a metal ri... | 05/15/2012 |
| 8143157 | Fabrication of a diffusion barrier cap on copper containing conductive elements A method for fabricating a self-aligned diffusion-barrier cap on a Cu-containing conductive element in an integrated-circuit device comprises:—providing a substrate having a Cu-containing conductive element embedded laterally into a dielectric layer and having an ... | 03/27/2012 |
| 8124524 | Methods of forming metal interconnection structures Methods of forming a metal interconnection structure are provided. The methods include forming an insulating layer on a semiconductor substrate including a first metal interconnection. The insulating layer is patterned to form an opening that exposes the first metal... | 02/28/2012 |
| 8119520 | Semiconductor device and method for manufacturing the same A semiconductor device and method for manufacturing the same is provided, capable of gap-filling a copper metal wiring while minimizing void generation. A semiconductor device according to an embodiment includes a copper sulfide layer formed on a first barrier metal... | 02/21/2012 |
| 8080472 | Metal line having a MoSi/Mo diffusion barrier of semiconductor device and method for forming the same A metal line having a MoxSiy/Mo diffusion barrier of a semiconductor device and corresponding methods of fabricating the same are presented. The metal line includes an insulation layer, a diffusion barrier, and a metal layer. The insulation lay... | 12/20/2011 |
| 8076235 | Semiconductor device and fabrication method thereof Semiconductor devices and methods for fabricating the same. The devices includes a substrate, a first etch stop layer, a dielectric layer, an opening, and an anti-diffusion layer. The first etch stop layer overlies the substrate. The dielectric layer overlies the fi... | 12/13/2011 |
| 8058164 | Methods of fabricating electronic devices using direct copper plating The present invention relates to methods and structures for the metallization of semiconductor devices. One aspect of the present invention is a method of forming a semiconductor device having copper metallization. In one embodiment, the method includes providing a ... | 11/15/2011 |
| 8053355 | Methods and systems for low interfacial oxide contact between barrier and copper metallization The present invention relates to methods and systems for the metallization of semiconductor devices. One aspect of the present invention is a method of depositing a copper layer onto a barrier layer so as to produce a substantially oxygen free interface therebetween... | 11/08/2011 |
| 8034709 | Method for forming composite barrier layer Provided is a method for forming a composite barrier layer with superior barrier qualities and superior adhesion properties to both dielectric materials and conductive materials as the composite barrier layer extends throughout the semiconductor device. The composit... | 10/11/2011 |
| 8034710 | Bilayer metal capping layer for interconnect applications The invention provides semiconductor interconnect structures that have improved reliability and technology extendibility. In the present invention, a second metallic capping layer is located on a surface of a first metallic cap layer which is, in turn, located on a ... | 10/11/2011 |
| 8030205 | Method for fabricating semiconductor device with metal line A method for fabricating a semiconductor device includes forming an inter-layer insulation layer on a substrate; forming openings in the inter-layer insulation layer; forming a metal barrier layer in the openings and on the inter-layer insulation layer; forming a fi... | 10/04/2011 |
| 8030204 | Semiconductor device and method of manufacturing the same In a method of forming a wiring structure for a semiconductor device, an insulation layer is formed on a semiconductor substrate on which a plurality of conductive structures is positioned. An upper surface of the insulation layer is planarized and spaces between th... | 10/04/2011 |
| 8026167 | Semiconductor device and method of manufacturing the same A metal interconnection of semiconductor device and method for fabricating the same is provided. The semiconductor device can include a semiconductor substrate formed with device structures such as transistors. An interlayer dielectric layer can be formed on the sem... | 09/27/2011 |
| 8003518 | Semiconductor device fabrication method A semiconductor device fabrication method including the steps of: forming an interlayer insulating film on a substrate; forming an opening in the interlayer insulating film; forming an alloy layer containing manganese and copper to cover the inner surface of the ope... | 08/23/2011 |
| 7994047 | Integrated circuit contact system An integrated circuit contact system is provided including forming a contact plug in a dielectric and forming a first barrier layer in a trench in the dielectric and on the contact plug. Further, the system includes removing a portion of the first barrier layer from... | 08/09/2011 |
| 7989339 | Vapor deposition processes for tantalum carbide nitride materials Embodiments of the invention generally provide methods for depositing and compositions of tantalum carbide nitride materials. The methods include deposition processes that form predetermined compositions of the tantalum carbide nitride material by controlling the de... | 08/02/2011 |
| 7981791 | Thin films Thin films are formed by formed by atomic layer deposition, whereby the composition of the film can be varied from monolayer to monolayer during cycles including alternating pulses of self-limiting chemistries. In the illustrated embodiments, varying amounts of impu... | 07/19/2011 |
| 7968451 | Method for forming self-assembled mono-layer liner for Cu/porous low-k interconnections A method for fabricating an integrated circuit comprises forming a low-k dielectric layer over a semiconductor substrate, etching the low-k dielectric layer to form an opening, and treating the low-k dielectric layer with a gaseous organic chemical to cause a reacti... | 06/28/2011 |
| 7964496 | Schemes for forming barrier layers for copper in interconnect structures A method of forming a semiconductor structure includes providing a substrate; forming a low-k dielectric layer over the substrate; embedding a conductive wiring into the low-k dielectric layer; and thermal soaking the conductive wiring in a carbon-containing silane-... | 06/21/2011 |
| 7964497 | Structure to facilitate plating into high aspect ratio vias Improved high aspect ratio vias and techniques for the formation thereof are provided. In one aspect, a method of fabricating a copper plated high aspect ratio via is provided. The method comprises the following steps. A high aspect ratio via is etched in a dielectr... | 06/21/2011 |
| 7943507 | Atomic layer deposition systems and methods including silicon-containing tantalum precursor compounds The present invention provides atomic layer deposition systems and methods that include at least one compound of the formula (Formula I): Ta(NR1)(NR2R3)3, wherein each R1, R2, and R3 is ind... | 05/17/2011 |
| 7943506 | Semiconductor device and production method therefor A semiconductor device provided with: a first interconnection layer provided on a semiconductor substrate; an interlevel insulation film provided over the first interconnection layer; a second interconnection layer of gold provided as an uppermost interconnection la... | 05/17/2011 |
| 7935624 | Fabrication method of semiconductor device having a barrier layer containing Mn A method for fabricating a semiconductor device includes the steps of forming an opening defined by an inner wall surface in an insulation film, forming a Cu—Mn alloy layer in the opening, depositing a Cu layer on the Cu—Mn alloy layer and filling the opening wi... | 05/03/2011 |
| 7932176 | Self-aligned barrier layers for interconnects An interconnect structure for integrated circuits incorporates manganese silicate and manganese silicon nitride layers that completely surrounds copper wires in integrated circuits and methods for making the same are provided. The manganese silicate forms a barrier ... | 04/26/2011 |
| 7902063 | Methods for discretized formation of masking and capping layers on a substrate The present invention provides methods and systems for discretized, combinatorial processing of regions of a substrate such as for the discovery, implementation, optimization, and qualification of new materials, processes, and process sequence integration schemes us... | 03/08/2011 |
| 7902064 | Method of forming a layer to enhance ALD nucleation on a substrate A layer to enhance nucleation of a substrate is described, including a method to form the layer, the method including obtaining a substrate comprising a patterned feature comprising a dielectric region and a conductive region, selectively forming a self-aligned mono... | 03/08/2011 |
| 7897507 | Barrier layer configurations and methods for processing microelectronic topographies having barrier layers A microelectronic topography includes a dielectric layer (DL) with a surface higher than an adjacent bulk metal feature (BMF) and further includes a barrier layer (BL) upon the BMF and extending higher than the DL. Another microelectronic topography includes a BL wi... | 03/01/2011 |
| 7884010 | Wiring structure and method for fabricating the same A wiring structure has a silicon layer, a backing layer provided on the silicon layer, the backing layer comprising a copper alloy containing a manganese, and a copper layer provided on the backing layer, and a diffusion barrier layer having an electrical conductivi... | 02/08/2011 |
| 7879716 | Metal seed layer deposition A method and structure for reducing the corrosion of the copper seed layer during the fabrication process of a semiconductor structure. Before the structure (or the wafer containing the structure) exits the vacuum environment of the sputter tool, the structure is wa... | 02/01/2011 |
| 7858514 | Integrated circuit, intermediate structure and a method of fabricating a semiconductor structure In a method of fabricating a semiconductor structure, a carbon containing mask is fabricated over a dielectric layer. The mask exposes the surface of the dielectric layer at least partly in a region between two adjacent conducting lines. A contact hole is etched int... | 12/28/2010 |
| 7851351 | Manufacturing method for semiconductor devices with enhanced adhesivity and barrier properties A method for manufacturing semiconductor devices includes the steps of; forming an insulating film comprising a fluorine added carbon film on a substrate; forming a first barrier layer comprising a silicon nitride film on the insulating film by exposing a surface of... | 12/14/2010 |
| 7846832 | Semiconductor device and fabrication method thereof Semiconductor devices and methods for fabricating the same. The devices includes a substrate, a first etch stop layer, a dielectric layer, an opening, and an anti-diffusion layer. The first etch stop layer overlies the substrate. The dielectric layer overlies the fi... | 12/07/2010 |
| 7846833 | Manufacture method for semiconductor device suitable for forming wirings by damascene method and semiconductor device An interlayer insulating film having a concave portion is formed on a semiconductor substrate. A tight adhesion film is formed on the inner surface of the concave portion and the upper surface of the insulating film. The surface of the adhesion layer is covered with... | 12/07/2010 |
| 7842603 | Method for fabricating semiconductor memory device A method for fabricating a semiconductor memory device includes forming an insulation layer including a contact plug over a substrate structure, forming a metal line structure over the insulation layer, the metal line structure including a patterned diffusion barrie... | 11/30/2010 |
| 7842604 | Low-k b-doped SiC copper diffusion barrier films The present invention provides a low dielectric constant copper diffusion barrier film composed, at least in part, of boron-doped silicon carbide suitable for use in a semiconductor device and methods for fabricating such a film. The copper diffusion barrier maintai... | 11/30/2010 |
| 7842605 | Atomic layer profiling of diffusion barrier and metal seed layers Material is removed from a substrate surface (e.g., from a bottom portion of a recessed feature on a partially fabricated semiconductor substrate) by subjecting the surface to a plurality of profiling cycles, wherein each profiling cycle includes a net etching opera... | 11/30/2010 |
| 7829455 | Method for creating barriers for copper diffusion A barrier layer for a semiconductor device is provided. The semiconductor device comprises a dielectric layer, an electrically conductive copper containing layer, and a barrier layer separating the dielectric layer from the copper containing layer. The barrier layer... | 11/09/2010 |
| 7816255 | Methods of forming a semiconductor device including a diffusion barrier film Methods of forming a semiconductor device that includes a diffusion barrier film are provided. The diffusion barrier film includes a metal nitride formed by using a MOCVD process and partially treated with a plasma treatment. Thus, a specific resistance of the diffu... | 10/19/2010 |
| 7799674 | Ruthenium alloy film for copper interconnects A method for forming interconnect wiring, includes: (i) covering a surface of a connection hole penetrating through interconnect dielectric layers formed on a substrate for interconnect wiring, with an underlying alloy layer selected from the group consisting of an ... | 09/21/2010 |
