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| Number | Title | Issue Date |
| 4808549 | Method for fabricating a silicon force transducer A silicon substrate having {100} nominal crystalline planes is anisotropically etched to form a pair of V-shaped grooves along the top planar surface and a first plate between the grooves. The top planar surface is then doped to form a conductor region in... | 02/28/1989 |
| 4671852 | Method of forming suspended gate, chemically sensitive field-effect transistor A method is disclosed for forming a chemically sensitive field-effect transistor having a suspended gate which enables the uniform and reproducible manufacture of such devices. Controlled uniformity and device response is provided by this method which mak... | 06/09/1987 |
| 4670297 | Evaporated thick metal and airbridge interconnects and method of manufacture A first masking layer of a first resist is provided over a semiconductor substrate and is patterned in a selected region to provide a masked region over which an airbridge interconnect will be provided. A second relatively thick layer of a second, differe... | 06/02/1987 |
| 4571608 | Integrated voltage-isolation power supply Disclosed is an integrated voltage-isolation power supply comprising a thin film heater, a thin film thermocouple, and a thin film of dielectric. A semiconductor body supports a portion of the thin film of dielectric out of contact with the body. The thin... | 02/18/1986 |
| 4566935 | Spatial light modulator and method Methods of fabrication of spatial light modulators with deflectable beams by plasma etching after dicing of a substrate into chips, each of the chips an SLM, is disclosed. Also, various architectures available with such plasma etching process are disclose... | 01/28/1986 |
| 4561173 | Method of manufacturing a wiring system A self-registering method of manufacturing an air-(vacuum) -insulated crossing multilayer wiring system of large density is disclosed. Between the lowermost and uppermost wiring layers an intermediate layer is provided in which recesses are formed between... | 12/31/1985 |
| 4536948 | Method of manufacturing programmable semiconductor device A blowable fuse is provided over a part of its length separately from the walls of an enveloping cavity and separated from a supporting member. As a result of this the fuse is readily thermally isolated so that it fuses more rapidly and with less energy. ... | 08/27/1985 |
| 4389429 | Method of forming integrated circuit chip transmission line The invention includes methods and apparatus for providing relatively long conductors on integrated chips with substantially reduced RC time constants. The preferred mode utilizes a substrate having a metallization pattern wherein etching or milling into ... | 06/21/1983 |
| 4384400 | Method of fabricating monolithically interconnected series-parallel avalanche diodes Disclosed is an array of avalanche diodes and its method of manufacture which results in plural pairs of series connected mesa-etched avalanche (TRAPATT) diodes being selectively connected in parallel by metallized air bridges for increasing the impedance... | 05/24/1983 |
| 4379307 | Integrated circuit chip transmission line The invention includes methods and apparatus for providing relatively long conductors on integrated chips with substantially reduced RC time constants. The preferred mode utilizes a substrate having a metallization pattern wherein etching or milling into ... | 04/05/1983 |
| 4308090 | Method of manufacturing a semiconductor device A method of manufacturing a semiconductor device having a multi-layer wiring system includes the steps of providing a first pattern of conductive regions on a major surface, providing an intermediate conductive layer over the major surface and the first p... | 12/29/1981 |
| 4289846 | Process for forming low-reactance interconnections on semiconductors Several methods are disclosed for forming an air gap between crossing thin film conductors utilized to interconnect electronic components on a substrate. Each of the methods involves the use of photolithographic techniques to form overpassing conductors o... | 09/15/1981 |
| 4198744 | Process for fabrication of fuse and interconnects Fuses and interconnects are fabricated by applying a metallic layer on a substrate and a fusible layer on the metallic layer. Portions of the fusible layer are removed to define discrete fuse elements having a necked portion. Portions of the metallic laye... | 04/22/1980 |
| 4089734 | Integrated circuit fusing technique A fusing technique whereby a fuse is fabricated upon a substrate by integrated circuit techniques. Three or more layers of chemically dissimilar metals are deposited upon the region where the fuse is to be formed. The top layers are then etched away from ... | 05/16/1978 |
| 4080722 | Method of manufacturing semiconductor devices having a copper heat capacitor and/or copper heat sink A metal film is deposited on both sides of a semiconductor wafer. A conductive support layer, e.g. gold, is deposited on one of the metal film layers. Using standard procedures, the semiconductor material is then etched to form a plurality of semiconducto... | 03/28/1978 |
| 4054484 | Method of forming crossover connections Disclosed is a crossover fabrication technique which is compatible with interconnect metallization for thin film and hybrid circuits which comprises a layer of copper. In one embodiment, evaporated layers of Ti and Cu are used as the base layers to build ... | 10/18/1977 |
| 4026759 | Method of making ingrown lead frame with strain relief A method for providing a large number of interconnections between a circuitizable wafer and a circuitizable substrate provides very fine line interconnections with built-in strain relief. A channel between the respective substrates is filled with a solven... | 05/31/1977 |
| 3932226 | Method of electrically interconnecting semiconductor elements An improved method of electrically interconnecting a plurality of spaced semiconductor elements adjacent to a substrate, each element having a mesa shape with a top surface spaced apart from the substrate and a side surface, includes coating the side surf... | 01/13/1976 |
