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One pet-friendly inventor patented "a device for watering pets, e.g., a dog or cat." The device, he helpfully noted, "has the general shape of a toilet."
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| Number | Title | Issue Date |
| 7510958 | Method of manufacturing a semiconductor device including a bump forming process A method of manufacturing a semiconductor device includes an improved bump forming process. The bump forming process includes a bump forming step for forming a bump on the pad by feeding a gold wire from a capillary while moving the capillary; a sliding step of slig... | 03/31/2009 |
| 7507654 | Method for mounting electronic element on a circuit board Method for mounting an electronic component on a circuit board firstly flip-chip bonding positioning bumps of the electronic component to pads of the circuit board by applying ultrasonic vibrations to the electronic component. Bonding bumps, whose diameters are shor... | 03/24/2009 |
| 7507655 | Method of forming solder connection portions, method of forming wiring substrate and method of producing semiconductor device A method of forming solder connection portions on first electrode pads and on second electrode pads, comprises a first step of arranging solder balls on the first electrode pads by arranging a first mask on a base mask; a second step of arranging solder balls on the... | 03/24/2009 |
| 7498251 | Redistribution circuit structure A method of manufacturing a redistribution circuit structure is provided. First, a substrate is provided. The substrate has a plurality of pads and a passivation layer. The passivation layer has a plurality of first openings exposing a portion of each of the pads, r... | 03/03/2009 |
| 7494913 | Microball placement solutions Microball delivery solutions for solder bumping are generally described. In this regard, according to one example embodiment, a microball delivery assembly includes a mask with at least two microball holder(s) to hold at least two different sizes of microball(s) tha... | 02/24/2009 |
| 7488674 | Semiconductor device and manufacturing method thereof When forming a silicon nitride film to protect and insulate a surface on which a silicon substrate has been ground or polishing, by use of a mixed gas containing SiH4, N2, and NH3 as a reaction gas, a film is formed by a single-frequ... | 02/10/2009 |
| 7485564 | Undercut-free BLM process for Pb-free and Pb-reduced C4 A system and method for eliminating undercut when forming a C4 solder bump for BLM (Ball Limiting Metallurgy) and improving the C4 pitch. In the process, a barrier layer metal stack is deposited above a metal pad layer. A top layer of the barrier layer metals (e.g.,... | 02/03/2009 |
| 7485562 | Method of making multichip wafer level packages and computing systems incorporating same The present invention defines a packaging implementation providing a multichip multilayer system on a chip solution. Greater integration of a plurality and variety of known good die contained within cavities formed in a separate substrate is achieved. Additional red... | 02/03/2009 |
| 7485563 | Method of providing solder bumps of mixed sizes on a substrate using a sorting mask and bumped substrate formed according to the method A method of providing electrically conductive bumps on electrode pads of a microelectronic substrate, and bumped substrate formed according to the method. The method includes: providing a microelectronic substrate including electrode pads; providing a sorting mask d... | 02/03/2009 |
| 7473628 | Method of manufacturing semiconductor device and semiconductor device According to an embodiment of the present invention, a method of manufacturing a semiconductor device, comprising forming a conducting layer on a substrate; forming a resist mask having an opening in a prescribed position on the conducting layer; forming a first pla... | 01/06/2009 |
| 7473629 | Substrate structure having a solder mask and a process for making the same A substrate structure having a solder mask and a process for making the same, including (a) providing a substrate having a top surface, the top surface having a die pad and a plurality of solder pads; (b) forming a first solder mask on the top surface, the first sol... | 01/06/2009 |
| 7465653 | Reliable metal bumps on top of I/O pads after removal of test probe marks In accordance with the objectives of the invention a new method is provided for the creation of metal bumps over surfaces of I/O pads. Contact pads are provided over the surface of a layer of dielectric. The aluminum of the I/O pads, which have been used as I/O pads... | 12/16/2008 |
| 7462556 | Method of forming low stress multi-layer metallurgical structures and high reliable lead free solder termination electrodes Techniques for manufacturing a bond pad structure are provide. A method includes providing a substrate. A metal pad and passivation layer are formed over the substrate. The passivation layer includes an opening to expose a portion of the metal pad. A first film is d... | 12/09/2008 |
| 7459386 | Method for forming solder bumps of increased height A method for forming solder bumps (or solder balls after reflow) of improved height and reliability is provided. In one embodiment, a semiconductor substrate having at least one contact pad and an upper passivation layer having at least one opening formed therein ex... | 12/02/2008 |
| 7456089 | Semiconductor device and method of manufacturing the semiconductor device A semiconductor device comprises a semiconductor chip, a wiring layer formed on the semiconductor chip, a column electrode connected at a first end to the wiring layer, and an encapsulation resin formed on the semiconductor chip. In the semiconductor device, the col... | 11/25/2008 |
| 7456088 | Integrated circuit package system including stacked die An integrated circuit package system is provided including providing a wafer with bond pads formed on the wafer. A solder bump is deposited on one or more bond pads. The bond pads and the solder bump are embedded within a mold compound formed on the wafer. A groove ... | 11/25/2008 |
| 7456090 | Method to reduce UBM undercut A method of manufacturing a solder bump structure on a semiconductor device is provided. In one embodiment, a semiconductor substrate is provided having a bonding pad and a passivation layer formed thereabove, the passivation layer having an opening therein exposing... | 11/25/2008 |
| 7452799 | Ball film for integrated circuit fabrication and testing According to one embodiment of the invention, a method of fabricating ball grid array packages includes providing a substrate, providing a ball film that includes a plurality of metal balls movably contained within respective slots of a thin film, coupling the metal... | 11/18/2008 |
| 7443040 | Aluminum cap with electroless nickel/immersion gold A resulting solder bump structure comprising the following steps. A structure having a metal bond pad formed thereover is provided. A patterned cover layer is formed over the structure. The patterned cover layer including an opening exposing a portion of the metal b... | 10/28/2008 |
| 7442634 | Method for constructing contact formations According to one aspect of the invention, a method for forming contact formations is provided. A substrate may be placed in an electrolytic solution. The substrate may have an exposed conductive portion and the electrolytic solution may include a plurality of metall... | 10/28/2008 |
| 7439170 | Design structure for final via designs for chip stress reduction A design structure to provide a package for a semiconductor chip that minimizes the stresses and strains that arise from differential thermal expansion in chip to substrate or chip to card interconnections. An improved set of design structure vias above the final co... | 10/21/2008 |
| 7435624 | Method of reducing mechanical stress on a semiconductor die during fabrication A method of reducing mechanical stress on an integrated circuit is disclosed including applying solder columns to the substrate for adding structural support to the package during the fabrication process. ... | 10/14/2008 |
| 7435620 | Low temperature methods of forming back side redistribution layers in association with through wafer interconnects Low temperature processed back side redistribution lines (RDLs) are disclosed. Low temperature processed back side RDLs may be electrically connected to the active surface devices of a semiconductor substrate using through wafer interconnects (TWIs). The TWIs may be... | 10/14/2008 |
| 7435680 | Method of manufacturing a circuit substrate and method of manufacturing an electronic parts packaging structure A method of manufacturing a circuit substrate of the present invention, includes the steps of forming an n-layered (n is an integer of 1 or more) wiring layer connected electrically to a metal plate on the metal plate, forming an electroplating layer on a connection... | 10/14/2008 |
| 7432129 | Bonding apparatus and method of bonding for a semiconductor chip A method of bonding and a bonding apparatus for a semiconductor chip that apply ultrasonic vibration to the semiconductor chip to bond the semiconductor chip to a substrate carry out leveling effectively at low cost and in a short time and can improve the bonding be... | 10/07/2008 |
| 7427527 | Method for aligning devices A method is provided for aligning parts such as MEMS devices and photonics devices. One approach involves: providing between first and second parts a bonding material having fluid and solid states; applying a control field in the region of the bonding material, the ... | 09/23/2008 |
| 7427565 | Multi-step etch for metal bump formation The present invention uses a two step plasma etch process to create a via contact with an integral bump. After the via and bump have been plated, the semiconductor substrate is planarized to remove the excess metal, using the semiconductor substrate as a planar stop... | 09/23/2008 |
| 7427557 | Methods of forming bumps using barrier layers as etch masks Forming an electronic structure may include forming a seed layer on a substrate, and forming a mask on the seed layer. The mask may include an aperture therein exposing a portion of the seed layer, and a barrier layer may be formed on the exposed portion of the seed... | 09/23/2008 |
| 7427558 | Method of forming solder ball, and fabricating method and structure of semiconductor package using the same A method of forming solder balls may involve forming bumps through wire boding on land patterns of a circuit substrate. Solder cream may be applied to the bumps through screen printing. The solder cream may be melted via reflow to form solder balls in which the bump... | 09/23/2008 |
| 7425468 | Method for making flip chip on leadframe package A flip chip on leadframe package and manufacturing method includes providing a leadframe having a plurality of inner leads; providing a chip having an active surface; forming a plurality of first bumps and at least one second bump on the active surface, the material... | 09/16/2008 |
| 7422974 | Method of manufacturing electronic component mounting body, electronic component mounting body, and electro-optical device A method of manufacturing an electronic component mounting body is used for mounting an IC chip having a bumps as an external mounting terminal on a base material made of thermoplastic resin, comprising: a bump burying step of burying the bumps into the base materia... | 09/09/2008 |
| 7419852 | Low temperature methods of forming back side redistribution layers in association with through wafer interconnects, semiconductor devices including same, and assemblies Low temperature processed back side redistribution lines (RDLs) are disclosed. Low temperature processed back side RDLs may be electrically connected to the active surface devices of a semiconductor substrate using through wafer interconnects (TWIs). The TWIs may be... | 09/02/2008 |
| 7419897 | Method of fabricating circuit board having different electrical connection structures A method of fabricating an electrical connecting structure of a circuit board is disclosed. The method includes: providing a circuit board having a plurality of first and a plurality of second conductive pads; forming on the circuit board a solder mask having a plur... | 09/02/2008 |
| 7416969 | Void free solder arrangement for screen printing semiconductor wafers A process for the production of a void-free semiconductor wafer for the electronics industry, comprising the steps of: applying a coating of a solder paste to a semiconductor wafer through a photoresist film; heating and applying a vacuum to the wafer in a reflow fu... | 08/26/2008 |
| 7413929 | Integrated chip package structure using organic substrate and method of manufacturing the same An integrated chip package structure and method of manufacturing the same is by adhering dies on an organic substrate and forming a thin-film circuit layer on top of the dies and the organic substrate. Wherein the thin-film circuit layer has an external circuitry, w... | 08/19/2008 |
| 7411295 | Circuit board, device mounting structure, device mounting method, and electronic apparatus A circuit board has a metal pattern that is formed on a surface of the circuit board to be connected with bumps in two-dimensional arrangement for mounting an electronic device that has the bumps. A plurality of the bumps which has even electrical potentials is elec... | 08/12/2008 |
| 7411296 | Method, system, and apparatus for gravity assisted chip attachment A method, system, and apparatus, the apparatus including a metal layer on silicon, photo-resist material disposed on the metal layer, a bump pad reservoir adjacent to the metal layer, a quantity of interconnect metal disposed in the bump pad reservoir, and a resist ... | 08/12/2008 |
| 7407877 | Self-coplanarity bumping shape for flip-chip A stud bump structure for electrical interconnection between a pair of members includes a base portion, and a stem portion. The base portion is affixed to a pad or trace in one of the pair of members to be interconnected (such as an integrated circuit chip), and the... | 08/05/2008 |
| 7405105 | Stack package using anisotropic conductive film (ACF) and method of making same Provided is a stack package using an anisotropic conductive film (ACF) for reducing thermal stresses exerted on chip scale packages (CSPs) during the initial manufacture of stack packages from a plurality of CSPs and for facilitating the repair and/or rework of stac... | 07/29/2008 |
| 7405145 | Ball grid array package substrates with a modified central opening and method for making the same An electrically and mechanically enhanced die-down tape substrate ball grid array (BGA) package substrate is described. An IC package includes a substrate that has a first surface. The first surface has a central opening. A stiffener/heat spreader has a first surfac... | 07/29/2008 |
