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| Number | Title | Issue Date |
| 4593457 | Method for making gallium arsenide NPN transistor with self-aligned base enhancement to emitter region and metal contact A gallium arsenide transistor is provided having a self-aligned base enhancement to emitter region and a method of applying metal to the emitter region. A series of steps provide an NPN structure overlying a substrate and includes an N region of aluminum ... | 06/10/1986 |
| 4593307 | High temperature stable ohmic contact to gallium arsenide This invention relates generally to ohmic contacts to substrates made of III-V compounds and to a process for fabricating such contacts. More specifically, the invention is directed to a contact to gallium arsenide having a given level of n-type dopant th... | 06/03/1986 |
| 4570324 | Stable ohmic contacts for gallium arsenide semiconductors Ohmic contacts are formed on an n-type gallium arsenide semiconductor by applying a layer of nickel to a contact surface of the semiconductor, bombarding the nickel layer with a beam of germanium ions to drive nickel and germanium atoms into the contact a... | 02/18/1986 |
| 4558509 | Method for fabricating a gallium arsenide semiconductor device A method for forming a FET in a gallium arsenide substrate whereby a gate is positioned on a [100] surface of the gallium arsenide substrate in the [011] orientation, active impurities are ion implanted to form FET source and drain regions which are self-... | 12/17/1985 |
| 4510514 | Ohmic contacts for semiconductor devices Disclosed is an indium-containing semiconductor device which includes an ohmic contact formed by application of successive layers of Au-Sn-Cr-Au. The combination of Sn and Cr layers provides an effective barrier to the diffusion of indium to the surface o... | 04/09/1985 |
| 4499656 | Deep mesa process for fabricating monolithic integrated Schottky barrier diode for millimeter wave mixers A method of fabricating gallium arsenide devices in which contact isolation is provided by a deep mesa step structure. Step coverage of deposited conductive films is facilitated by preferential orientation of the non-centrosymmetric crystal substrate and ... | 02/19/1985 |
| 4471005 | Ohmic contact to p-type Group III-V semiconductors A plurality of pairs of layers comprising gold and zinc are successively evaporated onto a p-type Group III-V semiconductor material such as indium phosphide. A final layer of gold is evaporated onto the pairs of layers prior to heating the multilayer con... | 09/11/1984 |
| 4414561 | Beryllium-gold ohmic contact to a semiconductor device An ohmic contact to a semiconductor device comprising p-type InP is formed by sequentially depositing beryllium-gold and gold layers on InP and then heat-treating the device at a temperature less than 440 degrees C. An ohmic contact to p-type InGaAsP can ... | 11/08/1983 |
| 4398963 | Method for making non-alloyed heterojunction ohmic contacts Ultra low resistance heterojunction ohmic contacts to semiconductors such gallium arsenide (GaAs) is described wherein a single crystal layer of germanium degenerately doped with arsenic is deposited on gallium arsenide using molecular-beam epitaxy (MBE)... | 08/16/1983 |
| 4366186 | Ohmic contact to p-type InP An ohmic contact to a semiconductor device comprising p-type InP is formed by sequentially depositing beryllium-gold and gold layers on InP and then heat-treating the device at a temperature less than 440 degrees C. An ohmic contact to p-type InGaAsP can ... | 12/28/1982 |
| 4325181 | Simplified fabrication method for high-performance FET A method for making reproducible FET's with gate dimensions in the submiceter range, reduced source-gate channel resistance, and reduced gate and source contact resistances comprising forming, in order, on a semi-insulating substrate, of GaAs, an N-type ... | 04/20/1982 |
| 4312112 | Method of making field-effect transistors with micron and submicron gate lengths Field-effect transistors using Schottky junctions formed of tantalum on N-doped gallium arsenide with tantalum oxide and native oxide passivations.... | 01/26/1982 |
| 4310570 | Field-effect transistors with micron and submicron gate lengths A method for forming ohmic contacts of gold and germanium gold on a gallium arsenide substrate in which a layer of silicon dioxide is placed over the gold in the contact area prior to sinter alloying to improve wetting and reduce contact resistance.... | 01/12/1982 |
| 4251621 | Selective metal etching of two gold alloys on common surface for semiconductor contacts Low resistance or ohmic contacts to p and n-type conductivity semiconductor material sometimes requires a different metal for each contact. Intermixing of these metals is undesirable so that special measures are necessary to form such contacts in close pr... | 02/17/1981 |
| 4238764 | Solid state semiconductor element and contact thereupon The device has a laser diode with an upper face of gallium arsenide which is partly covered with titanium which forms with the gallium arsenide an ohmic contact of low resistivity. Beneath the gallium arsenide an active layer for emitting light is interpo... | 12/09/1980 |
| 4218271 | Method of manufacturing semiconductor devices utilizing a sure-step molecular beam deposition Method of making a semiconductor device which includes a III-V compound stratum. A film consisting of one of the elements Sn, Ge, Si, Be, Mn or Mg is deposited by an M.B.E. process on an exposed surface of the III-V compound stratum. A III-V compound laye... | 08/19/1980 |
| 4179534 | Gold-tin-gold ohmic contact to N-type group III-V semiconductors A semiconductor device with a low resistance ohmic contact, strongly adherent to the n-type surface of a body (11) of Group III-V compound semiconductor is obtained by a process including the sequential deposition of gold (13), tin (14) and gold (15) at a... | 12/18/1979 |
| 4081824 | Ohmic contact to aluminum-containing compound semiconductors A consistently low resistance ohmic contact is made to an aluminum-containing compound semiconductor by a multilayer deposition and heat treatment process. The process includes the deposition of a transition layer on the semiconductor surface to be contac... | 03/28/1978 |
| 4011583 | Ohmics contacts of germanium and palladium alloy from group III-V n-type semiconductors A metallization scheme for providing an ohmic contact to n-type III-V semiconductors is described. A metallurgical combination including germanium and palladium is formed on the semiconductor surface either in the form of an alloy or discrete layers. The ... | 03/08/1977 |
| 3993515 | Method of forming raised electrical contacts on a semiconductor device Raised electrical contacts are electroplated on selected previously metallized contacts of a semiconductor device. Each metallized contact is on a surface of a separate mesa, respectively, of the device and extends in a cantilever manner beyond the surfac... | 11/23/1976 |
| 3984261 | Ohmic contact A contact of an indium gallium arsenide alloy forms an ohmic contact with a body of n-type or p-type single crystal gallium arsenide of a resistivity of 1 ohm-cm or greater. The method for forming the contact utilizes a low temperature range. This low tem... | 10/05/1976 |
| 3965279 | Ohmic contacts for group III-V n-type semiconductors A metallization scheme for providing an ohmic contact to n-type III-V semiconductors is described. A metallurgical combination including germanium and palladium is formed on the semiconductor surface either in the form of an alloy or discrete layers. The ... | 06/22/1976 |
| 3959522 | Method for forming an ohmic contact Gold is deposited onto a heated surface of N type semiconductor material composed of either gallium arsenide, gallium phosphide, aluminum gallium arsenide or aluminum gallium phosphide. The surface of the gallium compound is cooled to room temperature whe... | 05/25/1976 |
| 3942243 | Ohmic contact for semiconductor devices An ohmic contact for semiconductor devices, typically for contact to the P-type region of a GAsP Light Emitting Diode. The ohmic contact comprises a sequential deposition of a multi-layered structure comprising, respectively, aluminum, zinc and aluminum. ... | 03/09/1976 |
