Did You Know...
...that the inventor of the electric motor was a blacksmith named Thomas Davenport? Described as "a brilliantly unsuccessful inventor", Davenport invented the first rotary electric motor. In 1836 he headed out -- on foot -- from his Vermont home to file a patent application at the Patent Office in Washington, D.C. By the time he got there, he had squandered away his money and couldn't afford the $30 filing fee so he turned around and went home. When he later mailed in his application with money he'd raised, the Patent office was destroyed in a fire. He did finally get credit for his invention on Feb. 5, 1837.
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| Number | Title | Issue Date |
| 8153515 | Methods of fabricating strain balanced nitride heterojunction transistors A nitride based heterojunction transistor includes a substrate and a first Group III nitride layer, such as an AlGaN based layer, on the substrate. The first Group III-nitride based layer has an associated first strain. A second Group III-nitride based layer, such a... | 04/10/2012 |
| 8148252 | Methods of forming III/V semiconductor materials, and semiconductor structures formed using such methods Methods of forming ternary III-nitride materials include epitaxially growing ternary III-nitride material on a substrate in a chamber. The epitaxial growth includes providing a precursor gas mixture within the chamber that includes a relatively high ratio of a parti... | 04/03/2012 |
| 8080469 | Method for increasing the area of non-polar and semi-polar nitride substrates A method for fabricating a high quality freestanding nonpolar and semipolar nitride substrate with increased surface area, comprising stacking multiple films by growing the films one on top of each other with different and non-orthogonal growth directions. ... | 12/20/2011 |
| 8062967 | Process for group III-V semiconductor nanostructure synthesis and compositions made using same Methods for producing nanostructures, particularly Group III-V semiconductor nanostructures, are provided. The methods include use of novel Group III and/or Group V precursors, novel surfactants, oxide acceptors, high temperature, and/or stable co-products. Related ... | 11/22/2011 |
| 8017513 | Method of manufacturing semiconductor active layer, method of manufacturing thin film transistor using the same and thin film transistor having semiconductor active layer A method of manufacturing an IGZO active layer includes depositing ions including In, Ga, and Zn from a first target, and depositing ions including In from a second target having a different atomic composition from the first target. The deposition of ions from the s... | 09/13/2011 |
| 8008181 | Propagation of misfit dislocations from buffer/Si interface into Si Misfit dislocations are redirected from the buffer/Si interface and propagated to the Si substrate due to the formation of bubbles in the substrate. The buffer layer growth process is generally a thermal process that also accomplishes annealing of the Si substrate s... | 08/30/2011 |
| 7981787 | Semiconductor device manufacturing method A semiconductor device manufacturing method includes: providing a laminated member in which at least a first GaAs layer, an InAlGaAs layer and a second GaAs layer are laminated on or above a substrate in this order; and etching the second GaAs layer using the InAlGa... | 07/19/2011 |
| 7842595 | Fabricating electronic-photonic devices having an active layer with spherical quantum dots A method for manufacturing an electronic-photonic device. Epitaxially depositing an n-doped III-V composite semiconductor alloy buffer layer on a crystalline surface of a substrate at a first temperature. Forming an active layer on the n-doped III-V epitaxial compos... | 11/30/2010 |
| 7825020 | Method for manufacturing semiconductor device Disclosed herein is a method of manufacturing a semiconductor device that includes forming a metal catalytic pattern on a semiconductor substrate; etching the semiconductor substrate using the metal catalytic pattern as an etching mask to form a recess; forming an i... | 11/02/2010 |
| 7820542 | Nitride semiconductor light-emitting device and method for fabrication thereof An adhesion layer of a hexagonal crystal is laid on a facet an optical resonator of a nitride semiconductor laser bar having a nitride-based III-V group compound semiconductor layer, and a facet coat is laid on the adhesion layer. In this way, a structure in which t... | 10/26/2010 |
| 7820541 | Process for forming low defect density heterojunctions A method for forming a low defect density heterojunction between a first and a second compound, the first and second compounds each includes a group III element combined with a group V element in the periodic table, the method includes the steps of introducing in th... | 10/26/2010 |
| 7727873 | Production method of gallium nitride-based compound semiconductor multilayer structure An object of the present invention is to provide a method for producing a gallium nitride-based compound semiconductor multilayer structure useful for the production of a gallium nitride-based compound semiconductor light-emitting device which can ensure that the op... | 06/01/2010 |
| 7727874 | Non-polar and semi-polar GaN substrates, devices, and methods for making them Non-polar or semi-polar (Al, Ga, In)N substrates are fabricated by re-growth of (Al, Ga, In)N crystal on (Al, Ga, In)N seed crystals, wherein the size of the seed crystal expands or is increased in the lateral and vertical directions, resulting in larger sizes of no... | 06/01/2010 |
| 7557028 | Process for group III-V semiconductor nanostructure synthesis and compositions made using same Methods for producing nanostructures, particularly Group III-V semiconductor nanostructures, are provided. The methods include use of novel Group III and/or Group V precursors, novel surfactants, oxide acceptors, high temperature, and/or stable co-products. Related ... | 07/07/2009 |
| 7550374 | Thin film electrode for forming ohmic contact in light emitting diodes and laser diodes using nickel-based solid solution for manufacturing high performance gallium nitride-based optical devices, and method for fabricating the same Disclosed herein is a technique for forming a high quality ohmic contact utilizable in the fabrication of short-wavelength light emitting diodes (LEDs) emitting blue and green visible light and ultraviolet light, and laser diodes (LDs) using a gallium nitride (GaN) ... | 06/23/2009 |
| 7534714 | Radial temperature control for lattice-mismatched epitaxy Methods are disclosed of fabricating a compound nitride semiconductor structure. A substrate is disposed over a susceptor in a processing chamber, with the susceptor in thermal communication with the substrate. A group-III precursor and a nitrogen precursor are flow... | 05/19/2009 |
| 7514349 | Semiconductor optical device and manufacturing method thereof The object of the invention is to reduce the deterioration of crystallinity in the vicinity of an active layer when C, which is a p-type dopant, is doped and to suppress the diffusion of Zn, which is a p-type dopant, into an undoped active layer, thus to realize a s... | 04/07/2009 |
| 7510957 | Complimentary lateral III-nitride transistors A semiconductor device which includes a laterally extending stack of laterally adjacent conductive semiconductor regions formed over a support surface of a substrate, and a method for fabricating the device. ... | 03/31/2009 |
| 7494911 | Buffer layers for device isolation of devices grown on silicon Various embodiments proved a buffer layer that is grown over a silicon substrate that provides desirable isolation for devices formed relative to III-V material device layers, such as InSb-based devices, as well as bulk thin film grown on a silicon substrate. In add... | 02/24/2009 |
| 7479448 | Method of manufacturing a light emitting device with a doped active layer Oxygen is doped in a quantum well active layer. First, an n-type In0.02Ga0.98N barrier layer 550 of 10 nm is formed by supplying TMG at 10 sccm, TMI at 30 sccm, O2 at 20 sccm, and NH3 at 10 slm, on the n-type GaN op... | 01/20/2009 |
| 7449404 | Method for improving Mg doping during group-III nitride MOCVD A method for improving Mg doping of Group III-N materials grown by MOCVD preventing condensation in the gas phase or on reactor surfaces of adducts of magnesocene and ammonia by suitably heating reactor surfaces between the location of mixing of the magnesocene and ... | 11/11/2008 |
| 7432186 | Method of surface treating substrates and method of manufacturing III-V compound semiconductors Affords methods of surface treating a substrate and of manufacturing Group III-V compound semiconductors, in which a substrate made of a Group III-V semiconductor compound is rendered stoichiometric, and microscopic roughness on the surface following epitaxial growt... | 10/07/2008 |
| 7399692 | III-nitride semiconductor fabrication A process for fabricating a III-nitride power semiconductor device which includes forming a gate structure while providing a protective body over areas that are to receive power electrodes. ... | 07/15/2008 |
| 7384834 | Semiconductor device and a method of manufacturing the same A semiconductor device and a method of manufacturing such a semiconductor device having a field effect transistor with improved current driving performance (e.g., an increase of drain current) of the field effect transistor comprising the steps of ion implanting an ... | 06/10/2008 |
| 7371671 | System and method for photolithography in semiconductor manufacturing A method for forming a semiconductor device includes forming a photoresist layer over a substrate and patterning the photoresist layer to form photoresist portions. A second layer is formed over the substrate in areas not covered by the photoresist portions and the ... | 05/13/2008 |
| 7365366 | Boron phosphide-based semiconductor light-emitting device and production method thereof A boron phosphide-based semiconductor light-emitting device, comprising: a crystalline substrate; a first semiconductor layer formed on said crystalline substrate, said first semiconductor layer including a light-emitting layer, serving as a base layer and having a ... | 04/29/2008 |
| 7358112 | Method of growing a semiconductor layer A method of growing a p-type nitride semiconductor material having magnesium as a p-type dopant by molecular beam epitaxy (MBE), comprises supplying ammonia gas, gallium and magnesium to an MBE growth chamber containing a substrate so as to grow a p-type nitride sem... | 04/15/2008 |
| 7354850 | Directionally controlled growth of nanowhiskers Nanowhiskers are grown in a non-preferential growth direction by regulation of nucleation conditions to inhibit growth in a preferential direction. In a preferred implementation, III-V semiconductor nanowhiskers are grown on an (001) III-V semiconductor substr... | 04/08/2008 |
| 7351283 | System and method for fabricating a crystalline thin structure A crystalline thin structure (104, 204, 404) is grown on a surface (108, 228) of a substrate (112, 208, 400) by depositing molecules (136, 220) from a molecular precursor to a lateral growth front (144, 224) of the structure using ... | 04/01/2008 |
| RE40163 | Semiconductor light-emitting element In a semiconductor light-emitting element, an underlayer is composed of a high crystallinity AlN layer having a FWHM in X-ray rocking curve of 90 seconds or below, and a first cladding layer is composed of an n-AlGaN layer. A light-emitting layer is composed of a ba... | 03/25/2008 |
| 7345812 | Method and apparatus for use of III-nitride wide bandgap semiconductors in optical communications The present disclosure relates to the use of III-nitride wide bandgap semiconductor materials for optical communications. In one embodiment, an optical device includes an optical waveguide device fabricated using a III-nitride semiconductor material. The III-nitride... | 03/18/2008 |
| 7338828 | Growth of planar non-polar {1 -1 0 0} m-plane gallium nitride with metalorganic chemical vapor deposition (MOCVD) A method of growing planar non-polar m-plane III-Nitride material, such as an m-plane gallium nitride (GaN) epitaxial layer, wherein the III-Nitride material is grown on a suitable substrate, such as an m-plane silicon carbide (m-SiC) substrate, using metalorganic c... | 03/04/2008 |
| 7319064 | Nitride based semiconductor device and process for preparing the same A process for preparing a nitride based semiconductor device in accordance with the present invention comprises growing a high temperature AlN single crystal layer on a substrate; growing a first GaN layer on the high temperature AlN single crystal layer in a first ... | 01/15/2008 |
| 7303933 | Process of manufacturing a semiconductor device A process of manufacturing a semiconductor device includes the steps of forming a stacked structure of a first III-V compound semiconductor layer containing In and having a composition different from InP and a second III-V compound semiconductor layer containing In.... | 12/04/2007 |
| 7297625 | Group III-V crystal and manufacturing method thereof A method of manufacturing a group III-V crystal is made available by which good-quality group III-V crystals are easily obtained at low cost without causing cracks, even when using a variety of substrates. A method of manufacturing a group III-V crystal, characteriz... | 11/20/2007 |
| 7259084 | Growth of GaAs epitaxial layers on Si substrate by using a novel GeSi buffer layer This invention provides a process for growing Ge epitaxial layers on Si substrate by using ultra-high vacuum chemical vapor deposition (UHVCVD), and subsequently growing a GaAs layer on Ge film of the surface of said Ge epitaxial layers by using metal organic chemic... | 08/21/2007 |
| 7255746 | Nitrogen sources for molecular beam epitaxy MBE nitrogen sources of dimethylhydrazine, tertiarybutlyhydrazine, nitrogentrifloride, and NHx radicals. Those nitrogen sources are beneficial in forming nitrogen-containing materials on crystalline subtrates using MBE. Semiconductor lasers in general, and VCSEL in ... | 08/14/2007 |
| 7250360 | Single step, high temperature nucleation process for a lattice mismatched substrate A single step process for nucleation and subsequent epitaxial growth on a lattice mismatched substrate is achieved by pre-treating the substrate surface with at least one group III reactant or at least one group II reactant prior to the introduction of a group V rea... | 07/31/2007 |
| 7247889 | III-nitride material structures including silicon substrates III-nitride material structures including silicon substrates, as well as methods associated with the same, are described. Parasitic losses in the structures may be significantly reduced which is reflected in performance improvements. Devices (such as RF devices) for... | 07/24/2007 |
| 7242049 | Memory device A floating gate transistor has a reduced barrier energy at an interface with an adjacent gate insulator, allowing faster charge transfer across the gate insulator at lower voltages. Data is stored as charge on the floating gate. The data charge retention time on the... | 07/10/2007 |
