...that power steering was invented by independent inventor Francis W. Davis? As chief engineer in the 1920s of the truck division of the Pierce Arrow Motor Car Company, he saw how hard it was to steer heavy vehicles. So that he would be able to keep the profits from his future invention, Davis left his job, rented a small engineering shop in Waltham, Mass., and developed a hydraulic power steering system that led to power steering.
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| Number | Title | Issue Date |
| 8173534 | Method for producing a semiconductor wafer with rear side identification A semiconductor wafer with rear side identification and to a method for producing the same is disclosed. In one embodiment, the rear side identification has a multiplicity of information regarding the monocrystalline and surface and also rear side constitution. A mu... | 05/08/2012 |
| 8158504 | Conductive compositions and processes for use in the manufacture of semiconductor devices—organic medium components Embodiments of the invention relate to a silicon semiconductor device, and a conductive paste for use in the front side of a solar cell device. ... | 04/17/2012 |
| 8158503 | Multilayer interconnection substrate and method of manufacturing the same A multilayer interconnection substrate is disclosed that includes a multilayer interconnection layer having at least a first interconnection layer and a second interconnection layer stacked with an insulating layer provided therebetween, and a connection via configu... | 04/17/2012 |
| 8148250 | Method for manufacturing semiconductor device for preventing occurrence of short circuit between bit line contact plug and storage node contact plug A method for manufacturing a semiconductor device includes the steps of forming a plug on a semiconductor substrate, forming an insulation layer over the semiconductor substrate having the plug formed thereon, defining a line type trench through a first etching of a... | 04/03/2012 |
| 8143153 | Method for manufacturing semiconductor device A method of manufacturing a semiconductor device, including: forming a moisture resistant ring surrounding a multilayer interconnection structure in a layered body formed of stacked layers of a plurality of interlayer insulating films lower in dielectric constant th... | 03/27/2012 |
| 8133805 | Methods for forming dense dielectric layer over porous dielectrics Methods for forming a dense dielectric layer over the surface of an opening in a porous inter-layer dielectric having an ultra-low dielectric constant are disclosed. The disclosure provides methods for exposing the sidewall surface and the bottom surface of the open... | 03/13/2012 |
| 8124516 | Trilayer resist organic layer etch A method of forming dual damascene features in a porous low-k dielectric layer is provided. Vias are formed in the porous low-k dielectric layer. An organic planarization layer is formed over the porous low-k dielectric layer, wherein the organic layer fills the via... | 02/28/2012 |
| 8124517 | Method of forming an interconnect joint A method of forming an interconnect joint includes providing a first metal layer (210, 310), providing a film (220, 320) including metal particles (221, 321) and organic molecules (222, 322), placing the film over the first metal layer, p... | 02/28/2012 |
| 8119512 | Method for fabricating semiconductor device with damascene bit line A method for fabricating a semiconductor device includes forming an interlayer dielectric layer over a substrate; forming a dual storage node contact plug to be buried in the interlayer dielectric layer, forming a first damascene pattern to isolate the dual storage ... | 02/21/2012 |
| 8114765 | Methods for increased array feature density The embodiments generally relate to methods of making semiconductor devices, and more particularly, to methods for making semiconductor pillar structures and increasing array feature pattern density using selective or directional gap fill. The technique has applicat... | 02/14/2012 |
| 8101513 | Manufacture method for semiconductor device using damascene method (a) A recess is formed through an insulating film formed over a semiconductor substrate. (b) After the recess is formed, a temperature of the substrate is raised to 300° C. or higher at a temperature rising rate of 10° C./s or slower and a first degassing process ... | 01/24/2012 |
| 8084347 | Resist feature and removable spacer pitch doubling patterning method for pillar structures A method of making a semiconductor device includes forming at least one layer over a substrate, forming at least two spaced apart features of imagable material over the at least one layer, forming sidewall spacers on the at least two features and filling a space bet... | 12/27/2011 |
| 8039383 | Formation of a masking layer on a dielectric region to facilitate formation of a capping layer on electrically conductive regions separated by the dielectric regions A masking layer is formed on a dielectric region of an electronic device so that, during subsequent formation of a capping layer on electrically conductive regions of the electronic device that are separated by the dielectric region, the masking layer inhibits forma... | 10/18/2011 |
| 8039382 | Method for forming self-aligned metal silicide contacts The present invention relates to a method for forming self-aligned metal silicide contacts over at least two silicon-containing semiconductor regions that are spaced apart from each other by an exposed dielectric region. Preferably, each of the self-aligned metal si... | 10/18/2011 |
| 8034702 | Methods of forming through substrate interconnects A method of forming a through substrate interconnect includes forming a via into a semiconductor substrate. The via extends into semiconductive material of the substrate. A liquid dielectric is applied to line at least an elevationally outermost portion of sidewalls... | 10/11/2011 |
| 8017511 | Method of manufacturing semiconductor device Etching is performed on an insulating layer 23 and a conductive layer 32 with a photoresist 41 as the mask, to form an opening 51 in the conductive layer 32. After removing the photoresist 41, another insulating layer 24 | 09/13/2011 |
| 8008179 | Methods using silver compositions for micro-deposition direct writing silver conductor lines on photovoltaic wafers Embodiments of the invention relate to a silicon semiconductor device, and a conductive thick film composition for use in a solar cell device. ... | 08/30/2011 |
| 8008180 | Method of forming an OHMIC contact on a P-type 4H-SIC substrate A method of forming an Ohmic contact on a P-type 4H—SiC and an Ohmic contact formed by the same are provided. A method of forming an Ohmic contact on a P-type 4H—SiC substrate including a deposition step of successively depositing a 1 to 60 nm thick first Al lay... | 08/30/2011 |
| 8003509 | Semiconductor manufacturing apparatus and semiconductor manufacturing method A plated film having a uniform film thickness is formed on a surface of a substrate. A semiconductor manufacturing apparatus includes: a holding mechanism for holding a substrate rotatably; a nozzle for supplying a processing solution for performing a plating proces... | 08/23/2011 |
| 7989334 | Method of manufacturing semiconductor device In a method of manufacturing a semiconductor device which method is made up of a process of forming a wiring groove using a hard mask, a metal hard mask 107 is used to form a wiring groove 111, allowing the shape of the wiring groove 111 to be s... | 08/02/2011 |
| 7989335 | Methods of forming insulation layer patterns and methods of manufacturing semiconductor devices including insulation layer patterns In a method of forming an insulation layer pattern, an insulation layer is formed on a substrate. An organic layer and a hard mask layer are successively formed on the insulation layer. A preliminary hard mask pattern having first openings is formed by patterning th... | 08/02/2011 |
| 7985671 | Structures and methods for improving solder bump connections in semiconductor devices Structures with improved solder bump connections and methods of fabricating such structures are provided herein. The method includes forming an upper wiring layer in a dielectric layer and depositing one or more dielectric layers on the upper wiring layer. The metho... | 07/26/2011 |
| 7977228 | Methods for the formation of interconnects separated by air gaps The microelectronic device interconnects are fabricated by a process that utilizes a silicon-based interlayer dielectric material layer, such as carbon-doped oxide, and a chemical mixture selective to materials used in the formation of the interconnects, including, ... | 07/12/2011 |
| 7968444 | Lead-free tin alloy electroplating compositions and methods Disclosed are electrolyte compositions for depositing a tin alloy on a substrate. The electrolyte compositions include tin ions, ions of one or more alloying metals, a flavone compound and a dihydroxy bis-sulfide. The electrolyte compositions are free of lead and cy... | 06/28/2011 |
| 7964490 | Methods of forming nickel sulfide film on a semiconductor device Embodiments of the present invention describe a method of forming nickel sulfide layer on a semiconductor device. A nickel sulfide layer is formed on a substrate by alternatingly exposing the substrate to a nickel-containing precursor and a sulfur-containing precurs... | 06/21/2011 |
| 7955965 | Nanophotovoltaic devices The present invention provides nanophotovoltaic devices having sizes in a range of about 50 nm to about 5 microns, and method of their fabrication. In some embodiments, the nanophotovoltaic device includes a semiconductor core, e.g., formed of silicon, sandwiched be... | 06/07/2011 |
| 7951698 | Method of fabricating electronic device using nanowires A method of fabricating an electronic device using nanowires, minimizing the number of E-beam processing steps and thus improving a yield, includes the steps of: forming electrodes on a substrate; depositing a plurality of nanowires on the substrate including the el... | 05/31/2011 |
| 7951697 | Embedded die metal etch stop fabrication method and structure A method of forming an electronic component package includes forming a patterned dielectric layer comprising circuit pattern artifacts and at least one electronic component opening. An etch stop metal protected circuit pattern is plated with the circuit pattern arti... | 05/31/2011 |
| 7943502 | Method of forming a phase change memory device Provided are a phase change memory device and a method for forming the phase change memory device. The method includes forming a phase change material layer by providing reactive radicals to a substrate. The reactive radicals may comprise precursors for a phase chan... | 05/17/2011 |
| 7932168 | Method for fabricating bitline in semiconductor device A method of a fabricating a bitline in a semiconductor device, comprising: forming an interlayer insulation layer that defines a bitline contact hole on a semiconductor substrate; forming a contact layer to fill the bitline contact hole; forming a bitline contact by... | 04/26/2011 |
| 7932167 | Phase change memory cell with vertical transistor A memory cell in an integrated circuit is fabricated in part by forming a lower electrode feature, an island, a sacrificial feature, a gate feature, and a phase change feature. The island is formed on the lower electrode feature and has one or more sidewalls. It com... | 04/26/2011 |
| 7915157 | Chip structure and process for forming the same A chip structure comprises a substrate, a first built-up layer, a passivation layer and a second built-up layer. The substrate includes many electric devices placed on a surface of the substrate. The first built-up layer is located on the substrate. The first built-... | 03/29/2011 |
| 7910470 | Metallised film for sheet contacting An embodiment of the present invention discloses a method for contacting at least one electrical contact surface on a surface of a substrate and/or at least one component arranged on the substrate, especially a semiconductor chip. The method includes the following s... | 03/22/2011 |
| 7910469 | Electrical circuit, thin film transistor, method for manufacturing electric circuit and method for manufacturing thin film transistor An electrical circuit containing a substrate having thereon a receptive layer, wherein the receptive layer has a conductive polymer impregnated in the receptive layer, and a method for forming the electrical circuit. ... | 03/22/2011 |
| 7906420 | Method and apparatus for forming planar alloy deposits on a substrate A method for forming alloy deposits at selected areas on a receiving substrate includes the steps of: providing an alloy carrier including at least a first decal including a first plurality of openings and a second decal including a second plurality of openings, the... | 03/15/2011 |
| 7888254 | Semiconductor device having a refractory metal containing film and method for manufacturing the same A semiconductor device and a method for manufacturing the same of the present invention in which the semiconductor device is provided with a fuse structure or an electrode pad structure, suppress the copper blowing-out from a copper containing metal film. The semico... | 02/15/2011 |
| 7888253 | Method of fabricating semiconductor device A method of fabricating a semiconductor device according to an embodiment includes: forming a precursor film containing therein a predetermined metallic element on a surface of a recess portion formed in an insulating film on a semiconductor substrate; forming a wir... | 02/15/2011 |
| 7879710 | Substrate processing including a masking layer Methods for substrate processing are described. The methods include forming a material layer on a substrate. The methods include selecting constituents of a molecular masking layer (MML) to remove an effect of variations in the material layer as a result of substrat... | 02/01/2011 |
| 7875543 | Strain-silicon CMOS using etch-stop layer and method of manufacture Recesses are formed in the drain and source regions of an MOS transistor. An ohmic contact layer is formed in the recesses, and a stressed silicon-nitride layer is formed over the ohmic contact layer. The recesses allow the stressed silicon nitride layer to provide ... | 01/25/2011 |
| 7875542 | Methods for forming wiring and manufacturing thin film transistor and droplet discharging method It is required that a line width of a wiring is prevented from being wider to be miniaturized when the wiring or the like is formed by a dropping method typified by an ink-jetting method. The invention provides a method for narrowing (miniaturizing) a line width acc... | 01/25/2011 |